CN110579640B - Current signal transmitting circuit for low-voltage power station area - Google Patents
Current signal transmitting circuit for low-voltage power station area Download PDFInfo
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- CN110579640B CN110579640B CN201910994866.1A CN201910994866A CN110579640B CN 110579640 B CN110579640 B CN 110579640B CN 201910994866 A CN201910994866 A CN 201910994866A CN 110579640 B CN110579640 B CN 110579640B
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- controlled rectifier
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 61
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 61
- 239000010703 silicon Substances 0.000 claims abstract description 61
- 239000003990 capacitor Substances 0.000 claims abstract description 13
- 238000001514 detection method Methods 0.000 claims description 5
- 230000011664 signaling Effects 0.000 claims 9
- 230000001960 triggered effect Effects 0.000 abstract description 9
- 230000008054 signal transmission Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/175—Indicating the instants of passage of current or voltage through a given value, e.g. passage through zero
Abstract
The invention discloses a current signal transmitting circuit for a low-voltage power station area, which comprises a CPU, a load resistor R7, a silicon controlled rectifier K1, a capacitor C1, a resistor R1 and a silicon controlled rectifier trigger circuit, wherein the load resistor R1 is connected with the load resistor R1; the live wire L of the alternating current power supply is connected with one end of a load resistor R7 through a fuse tube F1, the other end of the load resistor R7 is connected with the A pole of a silicon controlled rectifier K1, the K pole of the silicon controlled rectifier K1 is connected with the zero line N of the alternating current power supply, and a capacitor C1 is connected with the resistor R1 in series and then connected between the A pole and the K pole of the silicon controlled rectifier; the thyristor trigger circuit comprises a direct-current working power supply VCC, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a triode Q1, a triode Q2, a triode Q3 and a triode Q4; when no trigger signal exists, the trigger loop is in a low-resistance state, so that the interference signal can be directly released, and the current signal transmitting circuit is ensured not to be triggered and started by mistake; the invention has stable signal transmission, no false triggering, no circuit burning phenomenon, and accurate topology drawing.
Description
Technical Field
The invention belongs to the technical field of electric power, relates to a signal transmitting circuit for drawing a wiring topological graph of a power line station area of electric power, and particularly relates to a current signal transmitting circuit for the power line station area of electric power.
Background
With the construction of the smart grid, the drawing of the topological graph of the power distribution area becomes a basic requirement. The functions of accurately calculating the line loss of the transformer area, searching faults, positioning electricity stealing and the like can be realized by the aid of the topological graph. The wiring of the power line station area is complex, the topology diagram is drawn manually, the workload is large, and the work is inaccurate. There is an urgent need for a technology capable of automatically and accurately drawing a topological graph of a transformer area, and a key link of the technology is a current signal sending circuit, which is damaged if the circuit is started by interference triggering.
Disclosure of Invention
In view of the above, in order to solve the above-mentioned shortcomings in the prior art, an object of the present invention is to provide a current signal transmitting circuit for a low-voltage power station, in which when there is no trigger signal, the trigger circuit is in a low-resistance state, and can directly release the interference signal, so as to ensure that the current signal transmitting circuit will not be triggered and started by mistake; the invention has stable signal transmission, no false triggering, no circuit burning phenomenon, accurate topology drawing, and more accurate and wide application in lean station area management.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
a current signal transmitting circuit for a voltage power station area comprises a CPU, a load resistor R7, a silicon controlled rectifier K1, a capacitor C1, a resistor R1 and a silicon controlled rectifier trigger circuit; the live wire L of the alternating current power supply is connected with one end of a load resistor R7 through a fuse tube F1, the other end of the load resistor R7 is connected with the A pole of a silicon controlled rectifier K1, the K pole of the silicon controlled rectifier K1 is connected with the zero line N of the alternating current power supply, and the capacitor C1 is connected with the resistor R1 in series and then connected between the A pole and the K pole of the silicon controlled rectifier;
the controllable silicon trigger circuit comprises a direct current working power supply VCC, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a triode Q1, a triode Q2, a triode Q3 and a triode Q4, wherein the CPU is connected with one end of the resistor R4, the other end of the resistor R4 is connected with the B pole of the triode Q2, the C pole of the triode Q2 is connected with one end of the resistor R3, the other end of the resistor R3 is connected with the B pole of the triode Q1, and the C pole of the triode Q1 is connected with the resistor R2; the CPU is further connected with one end of a resistor R6, the other end of the resistor R6 is connected with the B pole of a triode Q3, the C pole of the triode Q3 is respectively connected with the R5 pole and the B pole of a triode Q4, the C pole of the triode Q4 is respectively connected with the R2 pole and the G pole of a silicon controlled rectifier K1, and the E pole of the triode Q4 is connected with a zero line N of an alternating current power supply.
Further, the silicon controlled rectifier K1 is a power control device, and the silicon controlled rectifier K1 is used for switching on and off the sending current.
Further, G of the thyristor K1 is the trigger terminal.
Further, the resistor R2 is connected with the G pole of the silicon controlled rectifier K1.
Further, the capacitor C1 is connected in series with the resistor R1 to form a protection circuit, so that the thyristor K1 is prevented from being broken down by the spike.
Further, the CPU is connected with a low-voltage alternating-current voltage zero-crossing detection device.
Further, the electrode E and the resistor R5 of the triode Q1 are respectively connected to the dc power supply VCC.
Further, the E pole of the triode Q2 and the E pole of the triode Q3 are grounded.
Furthermore, the triode Q1 is a PNP triode, and the triode Q2, the triode Q3 and the triode Q4 are NPN triodes.
The beneficial effects of the invention are as follows:
according to the current signal transmitting circuit for the low-voltage power station area, when no trigger signal exists, the trigger loop is in a low-resistance state, and the interference signal can be directly released, so that the current signal transmitting circuit is prevented from being started by false triggering; the invention has stable signal transmission, no false triggering, no circuit burning phenomenon, accurate topology drawing, and more accurate and wide application in lean station area management. The following points are specifically shown:
firstly, the invention adopts a low-voltage alternating-current voltage zero-crossing detection technology to accurately detect the zero crossing point of alternating-current voltage;
secondly, the silicon controlled rectifier K1 is a power control device, and the silicon controlled rectifier K1 is used for switching on and switching off the current; the silicon controlled rectifier K1 is adopted, and the silicon controlled rectifier K1 is triggered and conducted near the zero crossing point of the alternating voltage, so that high current is sent;
the thyristor trigger circuit comprises a direct-current working power supply VCC, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a triode Q1, a triode Q2, a triode Q3 and a triode Q4; the low-impedance silicon controlled trigger circuit is adopted, so that the anti-interference capability is improved, and false triggering is prevented;
fourth, the function of the protective tube F1 is to prevent short circuit; the load resistor R7 determines the current of the signal transmitting circuit; the capacitor C1 is connected with the resistor R1 in series to form a protection circuit, so that the thyristor K1 is prevented from being broken down by sharp pulses.
Drawings
In order to more clearly illustrate the embodiments of the invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic circuit diagram of the present invention;
fig. 2 is a schematic waveform diagram of the present invention.
Detailed Description
Specific examples are given below to further clarify, complete and detailed description of the technical scheme of the invention. The present embodiment is a preferred embodiment based on the technical solution of the present invention, but the scope of the present invention is not limited to the following embodiments.
A current signal transmitting circuit for a voltage power station area comprises a CPU, a load resistor R7, a silicon controlled rectifier K1, a capacitor C1, a resistor R1 and a silicon controlled rectifier trigger circuit; the live wire L of the alternating current power supply is connected with one end of a load resistor R7 through a fuse tube F1, and the other end of the load resistor R7 is connected with the A pole of a silicon controlled rectifier K1, wherein the fuse tube F1 has the function of preventing short circuit; the load resistor R7 determines the current of the signal transmitting circuit; the K pole of the controlled silicon K1 is connected with a zero line N of an alternating current power supply, and the capacitor C1 is connected with the resistor R1 in series and then connected between the A pole and the K pole of the controlled silicon; in the invention, a capacitor C1 is connected with a resistor R1 in series to form a protection circuit to prevent the thyristor K1 from being broken down by sharp pulse;
in the invention, a low-impedance silicon controlled trigger circuit is adopted, so that the anti-interference capability is improved, and false triggering is prevented; the controllable silicon trigger circuit comprises a direct current working power supply VCC, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a triode Q1, a triode Q2, a triode Q3 and a triode Q4, wherein the CPU is connected with one end of the resistor R4, the other end of the resistor R4 is connected with the B pole of the triode Q2, the C pole of the triode Q2 is connected with one end of the resistor R3, the other end of the resistor R3 is connected with the B pole of the triode Q1, and the C pole of the triode Q1 is connected with the resistor R2; the CPU is further connected with one end of a resistor R6, the other end of the resistor R6 is connected with the B pole of a triode Q3, the C pole of the triode Q3 is respectively connected with the R5 pole and the B pole of a triode Q4, the C pole of the triode Q4 is respectively connected with the R2 pole and the G pole of a silicon controlled rectifier K1, and the E pole of the triode Q4 is connected with a zero line N of an alternating current power supply. In fig. 2, when there is no trigger pulse in fig. 1, the connection between the CPU and the resistor R4 is at low level, the transistor Q2 is turned off, the transistor Q2 is at high level, the transistor Q1 is turned off, and the transistor Q1 outputs low level, i.e. indicates no trigger pulse output; meanwhile, the connection part of the CPU and the resistor R6 is also low level, the triode Q3 is cut off, the C pole of the triode Q3 is in high level due to the current provided by the direct current power supply VCC and the resistor R5, and the high level of the triode Q enables the triode Q4 to be conducted, so that the trigger end G of the silicon controlled rectifier K1 is grounded, the trigger end G of the silicon controlled rectifier K1 is grounded in a low resistance state, and an interference signal of the outside to the trigger end G of the silicon controlled rectifier K1 is released by the triode Q4, so that the silicon controlled rectifier K1 is prevented from being triggered by errors; when trigger pulse exists, the connection part of the CPU and the resistor R4 is at a high level, the triode Q2 is conducted, the C electrode of the triode Q2 is at a low level, the triode Q1 is conducted, the C electrode of the triode Q1 outputs a high level, and the trigger pulse is provided for the silicon controlled rectifier K1 through the current limitation of the resistor R2; meanwhile, the connection part of the CPU and the resistor R6 is also high level, the triode Q3 is conducted, the C level of the triode Q3 is extremely low level, and the low level of the triode Q3 enables the triode Q4 to be cut off, so that pulse current provided by the triode Q1 can only flow from the G pole and the K pole of the silicon controlled rectifier K1, and the silicon controlled rectifier K1 is triggered and conducted.
Furthermore, the triode Q1 is a PNP triode, and the triode Q2, the triode Q3 and the triode Q4 are NPN triodes.
Further, the capacitor C1 is connected in series with the resistor R1 to form a protection circuit, so that the thyristor K1 is prevented from being broken down by the spike.
Further, the electrode E and the resistor R5 of the triode Q1 are respectively connected to the dc power supply VCC.
Further, the E pole of the triode Q2 and the E pole of the triode Q3 are grounded.
Further, the silicon controlled rectifier K1 is a power control device, and the silicon controlled rectifier K1 is used for switching on and off the sending current. And the silicon controlled rectifier K1 is adopted, and the silicon controlled rectifier K1 is triggered and conducted near the zero crossing point of the alternating voltage, so that high current is sent.
Further, G of the thyristor K1 is the trigger terminal.
Further, the resistor R2 is connected with the G pole of the silicon controlled rectifier K1.
Further, the CPU is connected with a low-voltage alternating-current voltage zero-crossing detection device. The invention adopts the low-voltage alternating voltage zero-crossing detection technology to accurately detect the zero crossing point of the alternating voltage.
As shown in fig. 1, which is a schematic circuit diagram of the present invention, the working principle of the present invention is:
the thyristor trigger circuit comprises a direct-current working power supply VCC, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a triode Q1, a triode Q2, a triode Q3 and a triode Q4; when no trigger pulse exists, the connection part of the CPU and the resistor R4 is at a low level, the triode Q2 is cut off, the C electrode of the triode Q2 is at a high level, the triode Q1 is cut off, and the C electrode of the triode Q1 outputs a low level, namely the output of the trigger pulse does not exist; meanwhile, the connection part of the CPU and the resistor R6 is also low level, the triode Q3 is cut off, the C pole of the triode Q3 is in high level due to the current provided by the direct current power supply VCC and the resistor R5, and the high level of the triode Q enables the triode Q4 to be conducted, so that the trigger end G of the silicon controlled rectifier K1 is grounded, the trigger end G of the silicon controlled rectifier K1 is grounded in a low resistance state, and an interference signal of the outside to the trigger end G of the silicon controlled rectifier K1 is released by the triode Q4, so that the silicon controlled rectifier K1 is prevented from being triggered by errors;
when trigger pulse exists, the connection part of the CPU and the resistor R4 is at a high level, the triode Q2 is conducted, the C electrode of the triode Q2 is at a low level, the triode Q1 is conducted, the C electrode of the triode Q1 outputs a high level, and the trigger pulse is provided for the silicon controlled rectifier K1 through the current limitation of the resistor R2; meanwhile, the connection part of the CPU and the resistor R6 is also high level, the triode Q3 is conducted, the C level of the triode Q3 is extremely low level, and the low level of the triode Q3 enables the triode Q4 to be cut off, so that pulse current provided by the triode Q1 can only flow from the trigger end G pole and the trigger end K pole of the silicon controlled rectifier K1, and the silicon controlled rectifier K1 is triggered and conducted.
Fig. 2 is a schematic waveform diagram of the present invention, which is shown in the drawings: the A point is the waveform of alternating current 220V voltage; the point B is the zero crossing point of the alternating voltage; the point C is the trigger pulse of the silicon controlled rectifier K1, and the trigger pulse starts to trigger in the positive half cycle of the alternating voltage in advance of the zero crossing point B of the alternating current, so that the silicon controlled rectifier K1 starts to be conducted, and the silicon controlled rectifier K1 is naturally turned off when the zero crossing point B of the alternating current is reached; the point D is the current waveform of the thyristor K1 after triggering and conducting, namely the current signal sent by the current signal sending circuit.
In summary, in the current signal transmitting circuit for the low-voltage power station area, when no trigger signal exists, the trigger loop is in a low-resistance state, and the interference signal can be directly released, so that the current signal transmitting circuit is ensured not to be triggered and started by mistake; the invention has stable signal transmission, no false triggering, no circuit burning phenomenon, accurate topology drawing, and more accurate and wide application in lean station area management.
The foregoing has outlined and described the features, principles, and advantages of the present invention. It will be understood by those skilled in the art that the present invention is not limited to the above-described embodiments, and that the above-described embodiments and descriptions are merely illustrative of the principles of the present invention, and that various changes and modifications may be made in the invention without departing from the spirit and scope of the invention, which is defined by the appended claims. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (9)
1. A current signaling circuit for a power distribution area, characterized by: the device comprises a CPU, a load resistor R7, a silicon controlled rectifier K1, a capacitor C1, a resistor R1 and a silicon controlled rectifier trigger circuit; the live wire L of the alternating current power supply is connected with one end of a load resistor R7 through a fuse tube F1, the other end of the load resistor R7 is connected with the A pole of a silicon controlled rectifier K1, the K pole of the silicon controlled rectifier K1 is connected with the zero line N of the alternating current power supply, and the capacitor C1 is connected with the resistor R1 in series and then connected between the A pole and the K pole of the silicon controlled rectifier;
the controllable silicon trigger circuit comprises a direct current working power supply VCC, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a triode Q1, a triode Q2, a triode Q3 and a triode Q4, wherein the CPU is connected with one end of the resistor R4, the other end of the resistor R4 is connected with the B pole of the triode Q2, the C pole of the triode Q2 is connected with one end of the resistor R3, the other end of the resistor R3 is connected with the B pole of the triode Q1, and the C pole of the triode Q1 is connected with the resistor R2; the CPU is further connected with one end of a resistor R6, the other end of the resistor R6 is connected with the B pole of a triode Q3, the C pole of the triode Q3 is respectively connected with the R5 pole and the B pole of a triode Q4, the C pole of the triode Q4 is respectively connected with the R2 pole and the G pole of a silicon controlled rectifier K1, and the E pole of the triode Q4 is connected with a zero line N of an alternating current power supply.
2. A current signaling circuit for a power station of claim 1, wherein: the silicon controlled rectifier K1 is a power control device, and the silicon controlled rectifier K1 is used for switching on and switching off a sending current.
3. A current signaling circuit for a power station of claim 1, wherein: g of the silicon controlled rectifier K1 is the trigger end.
4. A current signaling circuit for a power station of claim 1, wherein: and the resistor R2 is connected with the G pole of the silicon controlled rectifier K1.
5. A current signaling circuit for a power station of claim 1, wherein: the capacitor C1 is connected with the resistor R1 in series to form a protection circuit, so that the thyristor K1 is prevented from being broken down by the spike.
6. A current signaling circuit for a power station of claim 1, wherein: and the CPU is connected with a low-voltage alternating-current voltage zero-crossing detection device.
7. A current signaling circuit for a power station of claim 1, wherein: the E pole of the triode Q1 and the resistor R5 are respectively connected with a direct current power supply VCC.
8. A current signaling circuit for a power station of claim 1, wherein: the E pole of the triode Q2 and the E pole of the triode Q3 are grounded.
9. A current signaling circuit for a power station of claim 1, wherein: the triode Q1 is a PNP triode, and the triode Q2, the triode Q3 and the triode Q4 are NPN triodes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910994866.1A CN110579640B (en) | 2019-10-18 | 2019-10-18 | Current signal transmitting circuit for low-voltage power station area |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910994866.1A CN110579640B (en) | 2019-10-18 | 2019-10-18 | Current signal transmitting circuit for low-voltage power station area |
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| Publication Number | Publication Date |
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| CN110579640A CN110579640A (en) | 2019-12-17 |
| CN110579640B true CN110579640B (en) | 2023-11-28 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201910994866.1A Active CN110579640B (en) | 2019-10-18 | 2019-10-18 | Current signal transmitting circuit for low-voltage power station area |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113708482A (en) * | 2020-05-22 | 2021-11-26 | 深圳市均方根科技有限公司 | Topological structure measuring device, communication module, metering device and system |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3646423A (en) * | 1969-06-20 | 1972-02-29 | Matsushita Electric Ind Co Ltd | Converter for changing alternating current into direct current |
| CN202474873U (en) * | 2012-02-23 | 2012-10-03 | 深圳市友邦怡电气技术有限公司 | Reactive-power-compensation switching switch |
| CN203251133U (en) * | 2012-11-24 | 2013-10-23 | 西藏金凯新能源技术开发有限公司 | UPS power frequency heavy current charging circuit |
| CN211236008U (en) * | 2019-10-18 | 2020-08-11 | 联桥科技有限公司 | Current signal sending circuit for low-voltage power distribution area |
-
2019
- 2019-10-18 CN CN201910994866.1A patent/CN110579640B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3646423A (en) * | 1969-06-20 | 1972-02-29 | Matsushita Electric Ind Co Ltd | Converter for changing alternating current into direct current |
| GB1323441A (en) * | 1969-06-20 | 1973-07-18 | Matsushita Electric Ind Co Ltd | Converter for changing alternating current into direct current |
| CN202474873U (en) * | 2012-02-23 | 2012-10-03 | 深圳市友邦怡电气技术有限公司 | Reactive-power-compensation switching switch |
| CN203251133U (en) * | 2012-11-24 | 2013-10-23 | 西藏金凯新能源技术开发有限公司 | UPS power frequency heavy current charging circuit |
| CN211236008U (en) * | 2019-10-18 | 2020-08-11 | 联桥科技有限公司 | Current signal sending circuit for low-voltage power distribution area |
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