CN110571151B - Manufacturing method of polycrystalline silicon layer, flash memory and manufacturing method thereof - Google Patents
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 title claims abstract description 126
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 34
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 63
- 238000000034 method Methods 0.000 claims abstract description 56
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 56
- 230000012010 growth Effects 0.000 claims abstract description 47
- 239000007789 gas Substances 0.000 claims abstract description 37
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims abstract description 32
- 229910000041 hydrogen chloride Inorganic materials 0.000 claims abstract description 32
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 claims abstract description 32
- 230000008569 process Effects 0.000 claims abstract description 27
- 229920005591 polysilicon Polymers 0.000 claims description 48
- 239000000758 substrate Substances 0.000 claims description 23
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 16
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 16
- 230000005641 tunneling Effects 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 230000034655 secondary growth Effects 0.000 abstract description 9
- 239000000463 material Substances 0.000 description 4
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 102000052666 B-Cell Lymphoma 3 Human genes 0.000 description 1
- 108700009171 B-Cell Lymphoma 3 Proteins 0.000 description 1
- 101150072667 Bcl3 gene Proteins 0.000 description 1
- 229910003910 SiCl4 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
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- Condensed Matter Physics & Semiconductors (AREA)
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- Manufacturing & Machinery (AREA)
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Abstract
The invention provides a method for manufacturing a polycrystalline silicon layer, a flash memory and a method for manufacturing the same, wherein the growth process of the polycrystalline silicon layer is interrupted, a silicon oxide layer is formed after the polycrystalline silicon layer is contacted with air, hydrogen chloride gas is introduced, and the hydrogen chloride gas reacts with the silicon oxide layer within a preset temperature range to consume the silicon oxide layer; and continuing to grow the polycrystalline silicon layer, and adjusting the growth time of the polycrystalline silicon layer to reach the preset thickness. The silicon oxide layer is consumed within a preset temperature range through hydrogen chloride gas, then the polycrystalline silicon layer with the preset growth thickness (final) is obtained through secondary growth (compensation), the silicon oxide layer and high heat are not introduced into the polycrystalline silicon layer, the quality of the polycrystalline silicon layer with the preset growth thickness obtained through secondary growth is the same as that of the polycrystalline silicon layer without interruption (one-time manufacturing), the problems that once the polycrystalline silicon layer is interrupted abnormally in the growth process, the thickness of the polycrystalline silicon layer cannot reach the preset thickness, and the product can only be scrapped are solved, and the performance and the yield of the flash memory are improved.
Description
Technical Field
The invention relates to the field of semiconductor manufacturing, in particular to a manufacturing method of a polycrystalline silicon layer, a flash memory and a manufacturing method thereof.
Background
In the current semiconductor industry, memory devices account for a significant proportion of the integrated circuit products, and flash memory in memory has grown particularly rapidly. It features that the stored information can be maintained for a long time without power-on, and has the advantages of high integration level, fast access speed and easy erasing, so it is widely used in microcomputer and automatic control.
For flash memory products, the manufacture of the word line polycrystalline silicon layer is a crucial process in the whole process flow, the thickness of the word line polycrystalline silicon layer is a key index of the flash memory and determines the performance of the flash memory device, and in the actual production, once the growth process of the word line polycrystalline silicon layer is interrupted abnormally, the thickness of the word line polycrystalline silicon layer cannot reach the preset thickness, the product can only be scrapped, and the performance and yield of the flash memory product are affected.
Disclosure of Invention
One object of the present invention is: when the growth process of the polycrystalline silicon layer is abnormal, a proper manufacturing (compensation) method is provided, the polycrystalline silicon layer is regrown until the growth of the polycrystalline silicon layer reaches the preset thickness, and the polycrystalline silicon layer with qualified quality is provided.
Another object of the invention is: when the growth process of the polysilicon layer in the flash memory is abnormal, a proper manufacturing (compensation) method is provided, the polysilicon layer in the flash memory is regrown until the growth of the polysilicon layer in the flash memory reaches the preset thickness, and the performance and the yield of the flash memory are improved.
In order to achieve the above object, the present invention provides a method for fabricating a polysilicon layer, wherein the polysilicon layer is interrupted during the growth process and forms a silicon oxide layer after contacting air, comprising:
introducing hydrogen chloride gas, reacting the hydrogen chloride gas with the silicon oxide layer within a preset temperature range, and consuming the silicon oxide layer;
and continuing to grow the polycrystalline silicon layer, and adjusting the growth time of the polycrystalline silicon layer to reach the preset thickness.
Further, the preset temperature range is as follows: 680-720 ℃.
Further, the flow rate of the hydrogen chloride gas is as follows: 300 ml/s-500 ml/s.
The invention also provides a manufacturing method of the flash memory, which comprises the following steps:
providing a substrate, wherein a structural layer is formed on the substrate, and a first groove is formed in the structural layer;
forming a side wall structure on the side wall of the first groove;
forming a tunneling oxide layer, wherein the tunneling oxide layer covers the bottom of the first groove, the side wall structure and the structural layer;
forming a polysilicon layer filling the first trench, the polysilicon layer serving as a shared word line; the polycrystalline silicon layer is interrupted in the growth process and forms a silicon oxide layer after contacting air;
introducing hydrogen chloride gas, reacting the hydrogen chloride gas with the silicon oxide layer within a preset temperature range, and consuming the silicon oxide layer;
and continuing to grow the polycrystalline silicon layer, and adjusting the growth time of the polycrystalline silicon layer to reach the preset growth thickness.
Further, the preset temperature range is as follows: 680-720 ℃.
Further, the flow rate of the hydrogen chloride gas is as follows: 300 ml/s-500 ml/s.
Further, the structural layer includes: and the substrate oxide layer, the floating gate, the ONO film layer, the control gate and the first silicon nitride layer are sequentially formed on the substrate.
Further, the structural layer further includes: a first silicon oxide layer formed in the first silicon nitride layer and on the control gate.
Further, the step of forming the sidewall structure includes:
depositing a second silicon dioxide layer on the side wall of the first groove;
and covering a second silicon nitride layer on the second silicon dioxide layer.
The present invention also provides a flash memory including:
the device comprises a substrate, a side wall structure, a tunneling oxide layer and a polycrystalline silicon layer.
The structure layer is formed on the substrate, and a first groove is formed in the structure layer; the side wall structure covers the side wall of the first groove; the tunneling oxide layer covers the bottom of the first groove and the side wall structure; the polysilicon layer fills the first trench, the polysilicon layer serving as a shared word line.
Compared with the prior art, the method has the following beneficial effects:
the invention provides a manufacturing method of a polycrystalline silicon layer, a flash memory and a manufacturing method thereof.A hydrogen chloride gas is introduced, and the hydrogen chloride gas reacts with the silicon oxide layer within a preset temperature range to consume the silicon oxide layer; and continuing to grow the polycrystalline silicon layer, and adjusting the growth time of the polycrystalline silicon layer to reach the preset growth thickness. The silicon oxide layer is consumed within a preset temperature range through hydrogen chloride gas, then the polycrystalline silicon layer with the preset growth thickness (final) is obtained through secondary growth (compensation), an intermediate dielectric layer (silicon oxide layer) and high heat are not introduced into the polycrystalline silicon layer, the quality of the polycrystalline silicon layer with the preset growth thickness obtained through the secondary growth (compensation) is the same as that of the polycrystalline silicon layer without interruption (one-time manufacture), the problem that once the polycrystalline silicon layer is interrupted due to abnormity in the growth process, the thickness of the polycrystalline silicon layer cannot reach the preset thickness, and only products can be scrapped is solved, and the performance and the yield of the flash memory are improved.
Drawings
FIG. 1 is a flow chart of a method for fabricating a polysilicon layer according to an embodiment of the present invention;
FIG. 2 is a flow chart illustrating a method for manufacturing a flash memory according to an embodiment of the present invention;
fig. 3 to 11 are schematic diagrams illustrating steps of a method for manufacturing a flash memory according to the present invention.
Description of reference numerals:
100-substrate, 110-structural layer, 111-substrate oxide layer, 112-floating gate, 113-ONO film layer, 114-control gate, 115-first silicon nitride layer, 116-first silicon oxide layer, 120-side wall, 121-second silicon oxide layer, 122-second silicon nitride layer, 140-tunneling oxide layer, 200-polysilicon layer, 210-first trench, 220-second trench and 300-silicon oxide layer.
Detailed Description
For example, the thickness of the word line polysilicon layer is a key indicator of the flash memory, which determines the performance of the flash memory device and also affects the yield of the flash memory product.
The inventor researches and discovers that the growth of a polycrystalline silicon layer (or an epitaxial polycrystalline silicon layer) is related to temperature, pressure, gas flow and the like, and particularly, the polycrystalline silicon layer is grown on the surface of a carrier by decomposing silane into the polycrystalline silicon layer under the environment of high temperature and low pressure. In the growth process of the polycrystalline silicon layer, once an element for controlling temperature, pressure and gas flow fails, the growth of the polycrystalline silicon layer is interrupted, and the thickness of the polycrystalline silicon layer grown for the first time does not reach the preset thickness, so that the thickness of the grown polycrystalline silicon layer is too thin to meet the product requirement. And the first grown polysilicon layer and O in the air2A contact generation dielectric layer (e.g., silicon oxide). If the elements controlling temperature, pressure and gas flow return to normal, continue the first stepThe polysilicon layer is grown twice to reach a preset thickness, and a dielectric layer (such as silicon oxide) and heat between the two grown polysilicon layers are found to influence the quality of the finally manufactured polysilicon layer.
Based on the above research, the present invention provides a method for manufacturing a polysilicon layer and a method for manufacturing a flash memory. To further clarify the objects, advantages and features of the present invention, a more particular description of the invention will be rendered by reference to the appended drawings. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Fig. 1 is a flow chart illustrating a method for fabricating a polysilicon layer according to the present embodiment. As shown in fig. 1, the present embodiment provides a method for manufacturing a polysilicon layer, in which the growth process of the polysilicon layer is interrupted, and a silicon oxide layer is formed after contacting air, the method comprising:
introducing hydrogen chloride gas, reacting the hydrogen chloride gas with the silicon oxide layer within a preset temperature range, and consuming the silicon oxide layer, wherein the flow of the hydrogen chloride gas is as follows: 300 ml/s-500 ml/s; the preset temperature range is as follows: 680-720 ℃. The preset temperature range (680 ℃ -720 ℃) is lower than the temperature of the conventional process. The conventional process is carried out at high temperature (850 ℃ -1300 ℃), and H is introduced2The silicon oxide layer is consumed, and higher heat is introduced at high temperature, which affects the quality of the final polycrystalline silicon layer.
And continuing to grow the polycrystalline silicon layer, and adjusting the growth time of the polycrystalline silicon layer to reach the preset thickness.
Fig. 2 is a flow chart illustrating a method for manufacturing a flash memory according to the present embodiment. As shown in fig. 2, the present embodiment provides a method for manufacturing a flash memory, including the following steps:
providing a substrate, wherein a structural layer is formed on the substrate, and a first groove is formed in the structural layer;
forming a side wall structure on the side wall of the first groove;
forming a tunneling oxide layer, wherein the tunneling oxide layer covers the bottom of the first groove, the side wall structure and the structural layer;
forming a polysilicon layer filling the first trench, the polysilicon layer serving as a shared word line; the growth process of the polycrystalline silicon layer is interrupted, a silicon oxide layer is formed after contacting air,
introducing hydrogen chloride gas, reacting the hydrogen chloride gas with the silicon oxide layer within a preset temperature range, and consuming the silicon oxide layer;
and continuing to grow the polycrystalline silicon layer, and adjusting the growth time of the polycrystalline silicon layer to reach the preset growth thickness.
Specifically, the flow rate of the hydrogen chloride gas is as follows: 300 ml/s-500 ml/s. The preset temperature range is as follows: 680-720 ℃. The preset temperature range (680 ℃ -720 ℃) is lower than the temperature of the conventional process. The conventional process is carried out at high temperature (850 ℃ -1300 ℃), and H is introduced2The silicon oxide layer is consumed, and higher heat is introduced at high temperature, which affects the quality of the final polycrystalline silicon layer. In the embodiment, the silicon oxide layer is consumed within a preset temperature range through hydrogen chloride gas, and then the polycrystalline silicon layer with the preset growth thickness (final) is obtained through secondary growth (compensation), so that an intermediate dielectric layer (silicon oxide layer) and high heat are not introduced into the polycrystalline silicon layer, the quality of the polycrystalline silicon layer with the preset growth thickness obtained through the secondary growth (compensation) is the same as that of the polycrystalline silicon layer without interruption (one-time manufacture), the problem that once the polycrystalline silicon layer is interrupted due to abnormity in the growth process, the thickness of the polycrystalline silicon layer cannot reach the preset thickness, and only products can be scrapped is solved, and the performance and the yield of the flash memory are improved.
The steps of the method for manufacturing a flash memory according to the embodiment of the invention are described in detail below with reference to fig. 3 to 11.
First, as shown in fig. 3 to 6, a substrate 100 is provided, a structural layer 110 is formed on the substrate 100, and a first trench 210 is formed in the structural layer 110.
Specifically, as shown in fig. 3, the substrate 100 may be silicon, germanium or silicon germanium, and the structural layer 110 includes: a substrate oxide layer 111, a floating gate 112, an ONO layer 113, a control gate 114 and a first silicon nitride layer 115 sequentially formed on the substrate 100. Wherein, theThe substrate oxide layer 111 has a deposition thickness between
The floating gate 112 is deposited to a thickness between
The ONO layer 113 is deposited to a thickness between
The control gate 114 is deposited to a thickness between
The first silicon nitride layer 115 is deposited to a thickness between
Preferably, as shown in fig. 4 and 5, the structural layer 110 further includes: a first silicon oxide layer 116 formed in the first silicon nitride layer 115 and on the control gate 114. Wherein the forming of the first silicon oxide layer 116 comprises: etching the first silicon nitride layer 115 and staying on the control gate 114 to form a second trench 220; the first silicon oxide layer 116 is formed, and the second trench 220 is filled with the first silicon oxide layer 116.
Further, as shown in fig. 6, the first silicon oxide layer 116, the control gate 114, the ONO layer 113 and the floating gate 112 are sequentially etched until the substrate oxide layer 111 is exposed to form the first trench 210, wherein the first silicon oxide layer 116, the control gate 114, the ONO layer 113 and the floating gate 112 are generally dry-etched using CF4/CHF4/CL2/BCL3/Ar/N2 and other gases.
Next, as shown in fig. 7, a sidewall structure 120 is formed on the sidewall of the first trench 210. The steps of fabricating the sidewall structure 120 include: depositing a side wall material layer, wherein the side wall material layer covers the side wall of the first trench 210 and the structural layer 110; then, anisotropic etching is performed on the sidewall material layer deposited on the structural layer 100, and the sidewall material layer on the structural layer 110 is removed, so as to manufacture the sidewall structure 120. The sidewall structure 120 includes a second silicon oxide layer 121 and a second silicon nitride layer 122 sequentially covering the sidewalls of the first trench 210.
Then, a tunnel oxide layer 140 is formed, and the tunnel oxide layer 140 covers the bottom wall of the first trench 210, the sidewall structure 120, and the structure layer 110. Specifically, the tunnel oxide layer 140 may be manufactured by a chemical vapor deposition process, in this embodiment, the tunnel oxide layer 140 is made of silicon oxide, and the thickness of the tunnel oxide layer 140 is between the two thicknesses
Therefore, the thickness of the portion of the tunnel oxide layer 140 on the structural layer 110 is between
Next, as shown in fig. 7 and 8, a polysilicon layer 200 is formed, the polysilicon layer 200 filling the first trench 210, the polysilicon layer serving as a shared word line; the polycrystalline silicon layer is interrupted in the growth process and is in contact with air to manufacture a silicon oxide layer;
specifically, the polysilicon layer 200 covers the tunnel oxide layer 140 in the first trench 210, and in this embodiment, the polysilicon layer 200 may be deposited by a chemical vapor deposition process. In the process of growing the polysilicon layer of the flash memory, once the elements for controlling the temperature, the pressure and the gas flow fail, the growth of the polysilicon layer is interrupted, and the thickness of the polysilicon layer 200 grown for the first time does not reach the preset thickness, so that the thickness of the polysilicon layer 200 grown for the first time is causedThe thickness is too thin to meet the product requirement. And the first grown polysilicon layer 200 and O in the air2The contact creates a silicon oxide layer 300.
Next, as shown in fig. 8 and 9, hydrogen chloride gas is introduced, and the hydrogen chloride gas reacts with the silicon oxide layer 300 within a predetermined temperature range to consume the silicon oxide layer 300. The reaction mechanism is as follows: SiO 22+HCl—SiCl4+H2And O. The flow of the hydrogen chloride gas is as follows: 300 ml/s-500 ml/s. The preset temperature range is as follows: 680-720 ℃.
Then, as shown in fig. 10, the polysilicon layer 200 continues to grow, and the growth time of the polysilicon layer is adjusted to reach a preset growth thickness h, and the polysilicon layer 200 fills the first trench. And (3) introducing hydrogen chloride gas, consuming the silicon oxide layer 300 at a lower temperature (680-720 ℃), introducing no more heat, then adjusting the growth time for continuously growing the polycrystalline silicon layer to reach a preset growth thickness h, and further performing secondary growth to obtain the final polycrystalline silicon layer with the same quality as the uninterrupted (one-time manufacturing) polycrystalline silicon layer.
Next, as shown in fig. 10 and 11, the surface of the polysilicon layer 200 is cleaned and a portion of the tunnel oxide layer 140 on the first silicon nitride layer 115 is removed.
Specifically, the step of cleaning the surface of the polysilicon layer 200 is to remove impurities remaining on the surface of the polysilicon layer 200, wherein the process time required for cleaning the surface of the polysilicon layer 200 and removing the portion of the tunnel oxide layer 140 located on the first silicon nitride layer 115 is between 30s and 150 s. In this embodiment, hydrofluoric acid with a concentration of 0.5% to 10% is used to clean the surface of the polysilicon layer 200 and remove the portion of the tunnel oxide layer 140 on the first silicon nitride layer 115.
The present invention also provides a flash memory, as shown in fig. 7 and 11, including: a substrate 100, a sidewall structure 120, a tunnel oxide layer 140, and a polysilicon layer 200.
A structural layer 110 is formed on the substrate 100, and a first trench 210 is formed in the structural layer 110; the sidewall structures 120 cover the sidewalls of the first trenches 210; the tunnel oxide layer 140 covers the bottom of the first trench 210 and the sidewall structure 120; the polysilicon layer 200 fills the first trench 210.
In summary, the present invention provides a method for fabricating a polysilicon layer, a flash memory and a method for fabricating the same, wherein the polysilicon layer is interrupted during the growth process, a silicon oxide layer is fabricated after contacting air, hydrogen chloride gas is introduced, and the hydrogen chloride gas reacts with the silicon oxide layer within a preset temperature range to consume the silicon oxide layer; and continuing to grow the polycrystalline silicon layer, and adjusting the growth time of the polycrystalline silicon layer to reach the preset thickness. The silicon oxide layer is consumed within a preset temperature range through hydrogen chloride gas, then the polycrystalline silicon layer with the preset growth thickness (final) is obtained through secondary growth (compensation), an intermediate dielectric layer (silicon oxide layer) and high heat are not introduced into the polycrystalline silicon layer, the quality of the polycrystalline silicon layer with the preset growth thickness obtained through the secondary growth (compensation) is the same as that of the polycrystalline silicon layer without interruption (one-time manufacture), the problem that once the polycrystalline silicon layer is interrupted due to abnormity in the growth process, the thickness of the polycrystalline silicon layer cannot reach the preset thickness, and only products can be scrapped is solved, and the performance and the yield of the flash memory are improved.
It is to be understood that while the present invention has been described in conjunction with the preferred embodiments thereof, it is not intended to limit the invention to those embodiments. It will be apparent to those skilled in the art from this disclosure that many changes and modifications can be made, or equivalents modified, in the embodiments of the invention without departing from the scope of the invention. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention are still within the scope of the protection of the technical solution of the present invention, unless the contents of the technical solution of the present invention are departed.
Claims (9)
1. A method for manufacturing a polycrystalline silicon layer is interrupted in the growth process of the polycrystalline silicon layer, and a silicon oxide layer is formed after the polycrystalline silicon layer is contacted with air, and the method is characterized by comprising the following steps:
introducing hydrogen chloride gas, reacting the hydrogen chloride gas with the silicon oxide layer within a preset temperature range, and consuming the silicon oxide layer;
and continuing to grow the polycrystalline silicon layer, and adjusting the growth time of the polycrystalline silicon layer to reach the preset thickness.
2. The method for fabricating a polysilicon layer according to claim 1, wherein the predetermined temperature range is: 680-720 ℃.
3. The method for manufacturing a polysilicon layer according to claim 1, wherein the flow rate of the hydrogen chloride gas is: 300 ml/s-500 ml/s.
4. A method for manufacturing a flash memory is characterized by comprising the following steps:
providing a substrate, wherein a structural layer is formed on the substrate, and a first groove is formed in the structural layer;
forming a side wall structure on the side wall of the first groove;
forming a tunneling oxide layer, wherein the tunneling oxide layer covers the bottom of the first groove, the side wall structure and the structural layer;
forming a polysilicon layer filling the first trench, the polysilicon layer serving as a shared word line; the polycrystalline silicon layer is interrupted in the growth process and forms a silicon oxide layer after contacting air;
introducing hydrogen chloride gas, reacting the hydrogen chloride gas with the silicon oxide layer within a preset temperature range, and consuming the silicon oxide layer;
and continuing to grow the polycrystalline silicon layer, and adjusting the growth time of the polycrystalline silicon layer to reach the preset growth thickness.
5. The method of claim 4, wherein the predetermined temperature range is: 680-720 ℃.
6. The method of claim 4, wherein the flow of hydrogen chloride gas is: 300 ml/s-500 ml/s.
7. The method of claim 4, wherein the structural layer comprises: and the substrate oxide layer, the floating gate, the ONO film layer, the control gate and the first silicon nitride layer are sequentially manufactured on the substrate.
8. The method of claim 7, wherein the structural layer further comprises: a first silicon oxide layer formed in the first silicon nitride layer and on the control gate.
9. The method of claim 4, wherein the step of forming the sidewall structure comprises:
depositing a second silicon dioxide layer on the side wall of the first groove;
and covering a second silicon nitride layer on the second silicon dioxide layer.
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