CN110504003A

CN110504003A - The method of ATE quick obtaining out of memory address

Info

Publication number: CN110504003A
Application number: CN201910788133.2A
Authority: CN
Inventors: 舒颖; 代瑞娟; 郑鹏飞
Original assignee: Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Current assignee: Shanghai Huali Integrated Circuit Manufacturing Co Ltd
Priority date: 2019-08-26
Filing date: 2019-08-26
Publication date: 2019-11-26

Abstract

The invention discloses a kind of methods of ATE quick obtaining out of memory address, when scanning entire fail bit crawl RAM, no longer read since initial address, but first invalidation period is first read from vector RAM, obtain the address pin state of invalidation period direction, construction is with the corresponding relationship of the address pin state of character representation and the pin state indicated with numerical value, then the corresponding address pin state of first invalidation period is converted into 16 system row address and column address, using the row address and column address as the initial address for scanning entire fail bit crawl RAM.The present invention can hardware resource present in reasonable employment ATE, the method that optimization obtains fail address reduces the testing time.

Description

The method of ATE quick obtaining out of memory address

Technical field

The present invention relates to semiconductor integrated circuit ATE (automatic test equipment) memory test fields, more particularly to one The method of kind ATE quick obtaining out of memory address.

Background technique

Memory construction is simple, symmetrically, during the test, obtains out of memory address, test program is debugged, And failure analysis is carried out to memory, there is vital effect.

ATE by ALPG (algorithm pattern generation algorithm model generator) mode to memory into Row test, the principle of test are shown in Fig. 1: by the way that storage address, memory data is pressed after calculating according to certain algorithm Chip is given to according to the state that certain corresponding relationship is converted to memory address and data pin to be tested, it then will be after test In the storage to ram region identical with storage address of/fail result.In Fig. 1, grid part indicates fail bit crawl Random memory unit, X indicate that memory row address, Y indicate memory column address, and 1 indicates fail address.

Fig. 2 is the method flow diagram that tradition obtains out of memory address: by reading monolith ram region, being lost reading It records the address of effect.

The method that tradition obtains out of memory address, advantage are simply that algorithm, which is realized, to be easy, and disadvantage is it is also obvious that such as Fruit fail address is seldom, in order to find fail address, needs to read monolith RAM from the beginning to the end, in the very big feelings of memory capacity Under condition, it will increase many additional testing times.

Summary of the invention

The technical problem to be solved in the present invention is to provide a kind of methods of ATE quick obtaining out of memory address, can Hardware resource present in reasonable employment ATE, the method that optimization obtains fail address reduce the testing time.

In order to solve the above technical problems, the method for ATE quick obtaining out of memory address of the invention is using as follows What technical solution was realized:

When scanning entire fail bit crawl RAM, first invalidation period is first read from vector RAM, obtains failure week The address pin state that phase is directed toward, construction are corresponding with the pin state that is indicated with numerical value with the address pin state of character representation Then the corresponding address pin state of first invalidation period is converted into 16 system row address and column address, by the row by relationship Address and column address are as the initial address for scanning entire fail bit crawl RAM.

High-end ATE (for example T2000, V93K) usually has vector RAM, can will be stored by/fail message according to the period In the Random Vector storage unit, by reading vector RAM, the invalidation period of starting can be quickly and easily read.

The innovative point of the method for the present invention is: sufficiently combining vector RAM and fail bit crawl RAM obtains the excellent of fail message Gesture, a kind of method for developing energy quick obtaining out of memory address.Compared to original method, entire fail bit crawl is scanned It when RAM, is no longer read since initial address, but first reads first invalidation period from vector RAM, it in this way can reasonable employment Hardware resource present in ATE reduces the testing time, effectively improves the efficiency that ATE obtains out of memory address.

Detailed description of the invention

Present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments:

Fig. 1 is the schematic illustration that ATE is tested using ALPG mode；

Fig. 2 is the flow chart that ATE usually obtains out of memory address；

Fig. 3 is the method flow diagram of the ATE quick obtaining out of memory address.

Specific embodiment

As shown in connection with fig. 3, the method for the ATE quick obtaining out of memory address in the following embodiments, specifically The mode of realization is as follows:

Step 1, by fail message according to storage address where it, be stored in fail bit crawl RAM (random storage list Member) in identical address；By fail message, according to invalidation period, there are in vector RAM (random memory unit).

Step 2 reads first invalidation period from vector RAM.

Step 3 obtains the corresponding storage address pin state of first invalidation period.

Step 4, construction are with the corresponding relationship of the address pin state of character representation and the pin state indicated with numerical value.

The data structure corresponding relationship of the pin state of construction see the table below 1

Table 1

Step 5, by the corresponding address pin state of first invalidation period by character type be converted into numeric type output (two into System output).

The corresponding address pin numeric type (binary system) of first invalidation period is converted to hexadecimal by step 6, including Memory lines initial address Xinitial, memory column initial address Yinitial.

Step 7, setting fail bit grab the address range that RAM is read: X=X=Xinitial~Xmax, Y= Yinitial~Ymax.

Step 8 reads fail bit crawl address ram X=X+1, Y=Y+1.

If step 9 is not 0, record current address is fail address.

If step 10, X < Xmax Y < Ymax, return step 7.

The read access time of two methods is calculated for reading the fail address 64M SRAM:

64M SRAM address range is A0-A19, in total 64 IO, if the last one address of most extreme situation 0xFFFFF is failed:

The use of the time that existing method obtains fail address is (assuming that reading the primary time is 200ns):

One IO need time 2^20x200=1048576ns=~1.049ms, 64 IO need 64x1.049=~ 67ms。

If obtaining fail address with method of the invention:

-- the fail address corresponding period is first obtained, needing the time is 2^20x200=~1.049ms.

-- the corresponding fail address 0xFFFFF of the invalidation period is obtained, needing the time is 64x200ns=12.8 μ s, substantially It can ignore.

-- only needing to read once find the fail address time is 200ns, can be ignored substantially.

It is 1/64 times of existing method the time required to the result present invention of estimation.

Above by specific embodiment, invention is explained in detail, but these are not constituted to of the invention Limitation.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, these It should be regarded as protection scope of the present invention.

Claims

1. a kind of method of ATE quick obtaining out of memory address, which is characterized in that when scanning entire fail bit crawl RAM, First invalidation period is first read from vector RAM, obtains the address pin state of invalidation period direction, is constructed with character list The corresponding relationship of the address pin state shown and the pin state indicated with numerical value, then correspondingly by first invalidation period Location pin state is converted into 16 system row address and column address, grabs using the row address and column address as entire fail bit is scanned The initial address of RAM.

2. the method as described in claim 1, it is characterised in that: the construction is with the address pin state of character representation and with number It is worth the corresponding relationship of the pin state indicated, with the following method: setting n-th address pin as An, character style pin shape State is ' 0 ', and binary form pin state is 0；Character style pin state is ' 1 ', and binary form pin state is 1, Middle n is the integer more than or equal to 0.

3. a kind of method of ATE quick obtaining out of memory address, which comprises the steps of:

Step 1, by fail message according to storage address where it, be stored in the identical address in fail bit crawl RAM；It will There are in vector RAM according to invalidation period for fail message；

Step 2 reads first invalidation period from vector RAM；

Step 3 obtains the corresponding storage address pin state of first invalidation period；

Step 4, construction are with the corresponding relationship of the address pin state of character representation and the pin state indicated with numerical value；

The corresponding address pin state of first invalidation period is converted into numeric type output by character type by step 5；

The corresponding address pin numeric type of first invalidation period is converted to hexadecimal by step 6, including memory lines are initial Address Xinitial, memory column initial address Yinitial；

The address range that step 7, setting fail bit crawl RAM are read: X=X=Xinitial~Xmax, Y=Yinitial~ Ymax；Wherein, Xmax indicates row address maximum value, and Ymax indicates column address maximum value；

Step 8 reads fail bit crawl address ram X=X+1, Y=Y+1；

If step 9 is not 0, record current address is fail address；

If step 10, X < Xmax Y < Ymax, return step 7.

4. method as claimed in claim 3, it is characterised in that: construction is described in step 4 with the address pin state of character representation With the corresponding relationship of the pin state indicated with numerical value, with the following method: setting n-th address pin as An, character style Pin state is ' 0 ', and binary form pin state is 0；Character style pin state is ' 1 ', binary form pin state It is 1, wherein n is the integer more than or equal to 0.