CN110502279A - Intelligent adjustment method for emission queue based on markable instruction - Google Patents
Intelligent adjustment method for emission queue based on markable instruction Download PDFInfo
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- CN110502279A CN110502279A CN201910788733.9A CN201910788733A CN110502279A CN 110502279 A CN110502279 A CN 110502279A CN 201910788733 A CN201910788733 A CN 201910788733A CN 110502279 A CN110502279 A CN 110502279A
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- 238000000034 method Methods 0.000 title claims abstract description 17
- 238000012544 monitoring process Methods 0.000 claims description 8
- 238000012790 confirmation Methods 0.000 claims description 3
- 238000007689 inspection Methods 0.000 claims description 3
- 230000001105 regulatory effect Effects 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 210000004209 hair Anatomy 0.000 description 3
- 238000012545 processing Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000009711 regulatory function Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/329—Power saving characterised by the action undertaken by task scheduling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3856—Reordering of instructions, e.g. using queues or age tags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4418—Suspend and resume; Hibernate and awake
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Computer And Data Communications (AREA)
Abstract
The invention discloses an intelligent adjusting method for a transmitting queue based on a markable instruction. The invention improves the utilization rate of the multi-port transmitting queue by utilizing an intelligent adjustable and distributing technology, and can enter a transmitting queue strategy through an intelligent adjusting instruction or intelligently adjust the strategy of transmitting the instruction from the transmitting queue on the basis of ensuring the original transmitting queue structure. The invention uses two-stage regulation modes of dispatching regulation and transmitting regulation, can effectively increase the utilization rate of transmitting queues and functional resources, avoids instruction transmitting conflict, reduces related control power consumption and improves the efficiency of instruction execution.
Description
Technical field
The present invention relates to out-of-order superscalar processor field, in particular to it is a kind of based on can mark instructions transmitting queue intelligence
It is adjustable method.
Background technique
With the progress of out-of-order superscalar processor designing technique, the design of associated transmissions queue also becomes increasingly complex.Refer to
The degree of concurrence of grade is enabled, largely by the projected depth of transmitting queue and transmitting strategy decision.The item number of transmitting queue is got over
Greatly, the instruction number that can emit simultaneously is more, and instruction-level parallelism obtained is bigger.But relevant power consumption and area overhead
Also increasing.Therefore, the design that queue is emitted in out-of-order superscalar processor has the performance, power consumption and area of processor
There is very important influence.
Using the adjustable utilization rate for improving multiport transmitting queue with distribution technique of intelligence, it can guarantee original transmitting
On the basis of queue structure, transmitting queue policies are entered by intelligent regulating command, or intelligent regulating command is from transmitting queue
The strategy of transmitting promotes the service efficiency of transmitting queue to greatest extent, promotes the concurrency of instruction-level, reduces hardware spending,
Improve cost performance.
Summary of the invention
In order to solve the disadvantage that conventional method exists, the present invention provides it is a kind of based on can mark instructions transmitting queue intelligence
It is adjustable method.The technical problem to be solved by the present invention is to adjustable using intelligence and distribution technique improves multiport and emits queue
Utilization rate, transmitting queue policies can be entered by intelligent regulating command on the basis of guaranteeing original transmitting queue structure,
Or the strategy that intelligent regulating command emits from transmitting queue.
To achieve the above object, the invention adopts the following technical scheme:
It is a kind of based on can mark instructions transmitting queue intelligent adjusting method, this method is related in out-of-order superscalar processor
Emit queue, transmitting queue includes that intelligent adjustable transmitting logic, the adjustable dispatch logic of intelligence, monitoring logic and wake-up are patrolled
Volume.It comprises the steps of:
Step 1: after processor reset, emitting outputting and inputting in general mode for queue；
Step 2: the adjustable dispatch logic of intelligence emits the port assignment state and hair of queue according to monitoring logic inspection
It penetrates in queue and saves the home state of instruction；
Step 3: the adjustable dispatch logic of intelligence according to monitor state judges whether that instruction is marked, and is saved in hair
Penetrate queue；
Step 4: in transmitting queue, the operand needed for each instruction waits is ready, and executes the instruction
Functional resources all Lothrus apterus, confirmation can enter Out-of-order execution；
Step 5: wakeup logic selects effective instruction from transmitting queue, and ready instruction is waken up；
Step 6: the adjustable transmitting logic of intelligence is according to the instruction type and required resource situation being waken up, judgement
Whether the instruction being waken up is re-flagged, is then scheduled according to cue mark；
Step 7: the subsequent functional unit for receiving instruction receives corresponding instruction from transmitting queue.
Instruction can be marked as follows in the step 3: label content includes the type, required of instruction
Resource type, estimated emission port.
The invention adopts the above technical scheme, which has the following advantages:
1. the present invention is capable of increasing the utilization rate of transmitting queue, reduce because emission port caused by resource contention blocks.
Relative to the transmitting cohort design of no regulatory function, is adjusted present invention uses assignment and transmitting adjusts the mode that two-stage is adjusted,
The utilization rate of transmitting queue and functional resources can effectively be increased, and reduce and conflicted due to caused by port or resource contention,
Improve the efficiency of instruction execution.
2. the present invention can avoid instruction issue conflict in advance, the power consumption of transmitting relevant control is effectively reduced.From assign and
Launching phase carries out advance demand flag adjusting to instruction, can be avoided because caused by conflicting with each other between a plurality of instruction repeatedly again
Transmitting, or even assign again, relevant control power consumption can be effectively reduced.
Detailed description of the invention
Fig. 1 is the transmitting queue structure for assigning the X item of n emission port of interface with m；
Fig. 2 is the basic implementation process diagram of the present invention；
Fig. 3 be based on can mark instructions the adjustable transmitting queue structure's schematic diagram of intelligence；
Fig. 4 is 24 transmitting queues of 2 assignment 2 emission ports of input interface of the embodiment of the present invention.
Specific embodiment
The present invention will be described in detail with specific embodiment With reference to embodiment.
The transmitting queue structure for the X item for assigning n emission port of interface with m is as shown in Figure 1.Basic implementing procedure shows
It is intended to as shown in Figure 2.Based on can mark instructions the adjustable transmitting queue structure's schematic diagram of intelligence it is as shown in Figure 3.
As shown in figure 4, the transmitting queue of the present embodiment can save 24 instructions, receives and divide from 2 assignment input interfaces
Group's instruction is chosen 2 ready instructions and is emitted from 2 emission ports, and implementation steps are as follows:
1. after processor reset, emitting outputting and inputting in general mode for queue, the step and general transmitting team
Column processing mode is consistent.
2. the adjustable dispatch logic of intelligence emits the distribution state of the corresponding ports of queue according to monitoring logic inspection, and
The home state of the instruction saved in transmitting queue, and according to the state of monitoring judge whether that instruction is marked, and protect
It is stored to instruction issue queue.Assign control information of the instruction come only comprising instruction, the adjustable dispatch logic of intelligence needs basis
Monitoring logic and the type of instruction, analyze instruction, and then according to resource status, each instruction is marked.Mark
The content of note Px includes: the type, required resource type, estimated emission port of instruction.
3. the instruction in instruction issue queue waits operand and resource ready.Emit in queue, each instruction waits
Required operand is ready, and executes functional resources all Lothrus apterus of the instruction, and confirmation can enter Out-of-order execution
Stage.
4. wakeup logic selects effective instruction from 24 of transmitting queue, and ready preceding 2 instructions are waken up.
Wakeup logic selects 2 oldest instructions from the instruction being ready, and is sent to slotj and slotk two pre- hairs respectively
Penetrate port.Because wakeup logic at most needs to select 2 oldest instructions to be emitted in the instruction having had been prepared for from 24, select
It is relative complex to select logic.
5. the adjustable transmitting logic of intelligence is according to 2 instruction types waken up and required resource situation, judgement
Whether 2 instructions being waken up are re-flagged, is then scheduled according to cue mark.Instruction in slotj than
Waiting time of the slotk in transmitting queue is longer, and therefore, the basic principle of the adjustable transmitting logic of intelligence is preferentially to guarantee
The instruction of slotj can be executed preferentially, but also need to consider following principle:
The resource that the instruction of slotj and slotk needs has conflict: preferential slotj uses resource, to slotk delay one
Bat processing, and feeds back to monitoring logic for the information, guarantees that next bat can only wake up an instruction and enter transmitting by slotj and patrols
Volume.Instruction in slotk and next bat slotj carries out intelligence again and emits judgement, if there are resource contentions to sentence for two instructions
The age information for needing to check the instruction of slotj and slotk in disconnected logic, guarantees oldest instruction preferential emission.
There is no conflicts for the resource that the instruction of slotj and slotk needs: the instruction of slotj and slotk is dispatched to pair respectively
The execution resource port transmitting answered.
6. functional unit selects corresponding instruction execution according to label result.According to the scheduling of intelligence transmitting logic, func0
The instruction func1 that can receive slotj perhaps slotk can receive the instruction of slotk or slotj.
Claims (2)
1. it is a kind of based on can mark instructions transmitting queue intelligent adjusting method, this method is related to sending out in out-of-order superscalar processor
Queue is penetrated, transmitting queue includes that intelligent adjustable transmitting logic, the adjustable dispatch logic of intelligence, monitoring logic and wake-up are patrolled
Volume；
It is characterized by: based on can mark instructions transmitting queue intelligent adjusting method comprising the steps of:
Step 1: after processor reset, emitting outputting and inputting in general mode for queue；
Step 2: the adjustable dispatch logic of intelligence emits port assignment state and the transmitting team of queue according to monitoring logic inspection
The home state of instruction is saved in column；
Step 3: the adjustable dispatch logic of intelligence according to monitor state judges whether that instruction is marked, and is saved in transmitting team
Column；
Step 4: in transmitting queue, the operand needed for each instruction waits is ready, and executes the function of the instruction
Resource all Lothrus apterus, confirmation can enter Out-of-order execution；
Step 5: wakeup logic selects effective instruction from transmitting queue, and ready instruction is waken up；
Step 6: the adjustable transmitting logic of intelligence judges whether according to the instruction type and required resource situation that are waken up
The instruction being waken up is re-flagged, is then scheduled according to cue mark；
Step 7: the subsequent functional unit for receiving instruction receives corresponding instruction from transmitting queue.
2. it is according to claim 1 based on can mark instructions transmitting queue intelligent adjusting method, which is characterized in that it is described
Instruction is marked as follows in step 3: label content includes the type of instruction, required resource type, expects
Emission port.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910788733.9A CN110502279A (en) | 2019-08-23 | 2019-08-23 | Intelligent adjustment method for emission queue based on markable instruction |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910788733.9A CN110502279A (en) | 2019-08-23 | 2019-08-23 | Intelligent adjustment method for emission queue based on markable instruction |
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| Publication Number | Publication Date |
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| CN110502279A true CN110502279A (en) | 2019-11-26 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201910788733.9A Withdrawn CN110502279A (en) | 2019-08-23 | 2019-08-23 | Intelligent adjustment method for emission queue based on markable instruction |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111552366A (en) * | 2020-04-07 | 2020-08-18 | 江南大学 | Dynamic delay wake-up circuit and out-of-order instruction transmitting architecture |
| CN114489812A (en) * | 2022-04-06 | 2022-05-13 | 海光信息技术股份有限公司 | Instruction transmitting method and device, electronic equipment and storage medium |
Citations (5)
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| US5761474A (en) * | 1996-05-24 | 1998-06-02 | Hewlett-Packard Co. | Operand dependency tracking system and method for a processor that executes instructions out of order |
| CN101187892A (en) * | 2006-11-17 | 2008-05-28 | 上海高性能集成电路设计中心 | Device for real-time monitoring inside of processor |
| CN101281513A (en) * | 2008-05-15 | 2008-10-08 | 中国人民解放军国防科学技术大学 | Stream processor IP core based on Avalon |
| CN105005463A (en) * | 2014-04-25 | 2015-10-28 | 美国博通公司 | Computer processor with generation renaming |
| CN105549952A (en) * | 2015-12-03 | 2016-05-04 | 上海高性能集成电路设计中心 | Two-stage buffer issue regulation and control device based on scoreboard principle |
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2019
- 2019-08-23 CN CN201910788733.9A patent/CN110502279A/en not_active Withdrawn
Patent Citations (5)
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| US5761474A (en) * | 1996-05-24 | 1998-06-02 | Hewlett-Packard Co. | Operand dependency tracking system and method for a processor that executes instructions out of order |
| CN101187892A (en) * | 2006-11-17 | 2008-05-28 | 上海高性能集成电路设计中心 | Device for real-time monitoring inside of processor |
| CN101281513A (en) * | 2008-05-15 | 2008-10-08 | 中国人民解放军国防科学技术大学 | Stream processor IP core based on Avalon |
| CN105005463A (en) * | 2014-04-25 | 2015-10-28 | 美国博通公司 | Computer processor with generation renaming |
| CN105549952A (en) * | 2015-12-03 | 2016-05-04 | 上海高性能集成电路设计中心 | Two-stage buffer issue regulation and control device based on scoreboard principle |
Non-Patent Citations (2)
| Title |
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| NIRANJAN SOUNDARARAJAN: "Analysis and solutions to issue queue process variation", 《2008 IEEE INTERNATIONAL CONFERENCE ON DEPENDABLE SYSTEMS AND NETWORKS WITH FTCS AND DCC (DSN)》 * |
| 邓凯伟: "超标量处理器高效发射队列的设计及与实现", 《第十八届计算机工程与工艺年会暨第四届微处理器技术论坛论文集》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111552366A (en) * | 2020-04-07 | 2020-08-18 | 江南大学 | Dynamic delay wake-up circuit and out-of-order instruction transmitting architecture |
| CN114489812A (en) * | 2022-04-06 | 2022-05-13 | 海光信息技术股份有限公司 | Instruction transmitting method and device, electronic equipment and storage medium |
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Application publication date: 20191126 |