CN110502210A - Low frequency integrating circuit and method - Google Patents
Low frequency integrating circuit and method Download PDFInfo
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- CN110502210A CN110502210A CN201810482126.5A CN201810482126A CN110502210A CN 110502210 A CN110502210 A CN 110502210A CN 201810482126 A CN201810482126 A CN 201810482126A CN 110502210 A CN110502210 A CN 110502210A
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- G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
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Abstract
The present invention provides a kind of low frequency integrating circuit and method, comprising: reference signal is subtracted to the subtracter of current sample values；The first switch that the output signal of low frequency integrating circuit is sampled；The adder of add operation is carried out to last time integrator output value and subtracter output signal；The second switch that the output signal of adder is sampled；For sample keep first capacitor and the second capacitor；Wherein, the first switch is opposite with the control signal polarity of the second switch.Last time integrator output value is fed back to the first adding input of adder, the value after reference signal to be subtracted to current sample values is input to the second adding input of adder, exports current integration output valve after carrying out add operation by adder.Low frequency filtering function can be realized without external capacitive, digital circuit, single-chip microcontroller in the present invention, at low cost convenient for integrated.
Description
Technical field
The present invention relates to IC design fields, more particularly to a kind of low frequency integrating circuit and method.
Background technique
Integrating circuit is mainly used for waveform convertion, the elimination of amplifying circuit offset voltage and the integral compensation in feedback control
Etc. occasions.Need to carry out the low-frequency periodic signals such as power current integral in circuit of power factor correction usually to be put down
Equal electric current carries out loop control.As shown in Figure 1, can realize the product of low-frequency periodic signal by simple operational amplifier circuit
Point, including operational amplifier 1, resistance R and capacitor C, one end of resistance R receives input signal, the other end connects the operation and puts
The inverting input terminal of big device 1, one end of capacitor C connect described in the inverting input terminal of the operational amplifier 11, other end connection
The normal phase input end of the output end of operational amplifier 1, the operational amplifier 11 connects reference signal Vref.The output of the circuit
Signal meets following relational expression:
Wherein, Vin (t) is the voltage signal that power current is converted into, and Vref is internal reference reference voltage signal, Vo
(t) output to obtain controls signal.In order to handle low-frequency periodic signal, capacitor C can be bigger, can not usually be integrated into chip
In, therefore the capacitor of this mode needs to be placed on chip exterior, and needs to use 2 pins.
In order to reduce number of pins, the output of a pin can be realized by using spaning waveguide operational amplifier, as shown in Fig. 2, across
The normal phase input end for leading operational amplifier 2 receives reference signal, inverting input terminal receives input signal, one end connection of capacitor C
The output end of the operational transconductance amplifier, other end ground connection.The output signal of the circuit meets following relational expression:
Equation (1) and equation (2) are normalized, equation (3) are obtained:
Wherein K is the proportionality coefficient after normalization, is met:
It is believed that low frequency signal remains unchanged in the sampling time when high frequency sampling, therefore can be digitally to average
Value is that the periodic signal of reference data value carries out numerical calculation to realize integrating function, obtains desired output control signal.But
It is that the cost for the low frequency integrator that digital circuit or single-chip microcontroller mode are realized is relatively high, it can not be in common analog circuit technique
Middle use.
Therefore, how to be avoided in integrator using bulky capacitor, reduce cost, suitable for analog circuit technique, it has also become
One of those skilled in the art's urgent problem to be solved.
Summary of the invention
In view of the foregoing deficiencies of prior art, the purpose of the present invention is to provide a kind of low frequency integrating circuit and sides
Method, for solving the low frequency integrator cost that bulky capacitor in the prior art can not integrate, digital circuit or single-chip microcontroller mode are realized
Height, the problems such as being unsuitable for analog circuit.
In order to achieve the above objects and other related objects, the present invention provides a kind of low frequency integrating circuit, the low frequency integral
Circuit includes at least:
Subtracter, adder, first switch, second switch, first capacitor and the second capacitor；
The adding input of the subtracter receives reference signal, and the subtracting input of the subtracter receives present sample
Value, the operation of the current sample values is subtracted for carrying out the reference signal；
The input terminal of the first switch connects the output end of the low frequency integrating circuit, the output end of the first switch
The top crown for connecting the first capacitor is sampled for the output signal to the low frequency integrating circuit；First electricity
The bottom crown of appearance is grounded；
First adding input of the adder connect first switch output last time integrator output value, it is described plus
Second adding input of musical instruments used in a Buddhist or Taoist mass connects the output end of the subtracter, for the last time integrator output value and the subtraction
The output signal of device carries out add operation；
The input terminal of the second switch connects the output end of the output end of the adder, the second switch as institute
The output end for stating low frequency integrating circuit is sampled for the output signal to the adder；
The top crown of second capacitor connects the output end of the second switch, bottom crown ground connection；
Wherein, the first switch is opposite with the control signal polarity of the second switch.
Preferably, the subtracter includes that first resistor, second resistance, 3rd resistor, the 4th resistance and the first operation are put
Big device；
One end of the first resistor connects first operation and puts as subtracting input, the other end of the subtracter
The inverting input terminal of big device；
One end of the second resistance connects the inverting input terminal of first operational amplifier, other end connection described the
The output end of one operational amplifier；
One end of the 3rd resistor connects first operation and puts as adding input, the other end of the subtracter
The normal phase input end of big device；
One end of 4th resistance connects the normal phase input end of first operational amplifier, other end ground connection.
Preferably, the adder includes that the 5th resistance, the 6th resistance, the 7th resistance, the 8th resistance and the second operation are put
Big device；
One end of 5th resistance connects second fortune as the first adding input, the other end of the adder
Calculate the normal phase input end of amplifier；
One end of 6th resistance connects second fortune as the second adding input, the other end of the adder
Calculate the normal phase input end of amplifier；
One end of 7th resistance connects the inverting input terminal of the second operational amplifier, other end ground connection；
One end of 8th resistance connects the inverting input terminal of the second operational amplifier, other end connection described the
The output end of two operational amplifiers.
Preferably, the low frequency integrating circuit further include be connected to the current sample values and the subtracter subtraction it is defeated
Enter end between the first follower, be connected to the first switch output end and the adder the first adding input it
Between the second follower, the third being connected between the output end of the second switch and the output end of the low frequency integrating circuit
Follower, each follower are used for isolation signals.
Preferably, the low frequency integrating circuit further includes switch control signal generation module；The switch control signal produces
Raw module includes high frequency sampling unit and phase inverter；The high frequency sampling unit is for generating square-wave signal；The phase inverter connects
It is connected to the output end of the high frequency sampling unit, for generating the inverted signal of the high frequency sampling unit output signal.
Preferably, the first capacitor and the capacitance of second capacitor are pF grades.
Preferably, the low frequency integrating circuit further includes the first proportionality coefficient adjusting module and the second proportionality coefficient adjustment mould
Block, first proportionality coefficient adjusting module is connected to the output end of the subtracter and the second addition of the adder inputs
Between end, second proportionality coefficient adjusting module be connected to the current sample values and the subtracter subtracting input it
Between.
It is highly preferred that the low frequency integrating circuit further includes that output end is connected to the low frequency integrating circuit input terminal
Three switches, and it is connected to the third capacitor of the third output switching terminal.
It is highly preferred that the low frequency integrating circuit further includes peak value sampling module, the output end of the peak value sampling module
The control terminal for connecting the third switch is sampled for controlling the third switch；Wherein, the capacitance of the third capacitor
It is pF grades.
In order to achieve the above objects and other related objects, the present invention also provides a kind of low frequency of above-mentioned low frequency integrating circuit products
Divide method, the low frequency integration method includes at least:
The first adding input that last time integrator output value is fed back to the adder, reference signal is subtracted and is currently adopted
Value after sample value is input to the second adding input of the adder, is worked as by exporting after adder progress add operation
Preceding integrator output value.
Preferably, the current integration output valve meets following relational expression:
Vo(n)=K1* (Vref-K2*Vin(n))+Vo(n-1),
Wherein, VoIt (n) is current integration output valve, K1 is the first proportionality coefficient, and K2 is the second proportionality coefficient, Vin(n) it is
Current sample values, VoIt (n-1) is last time integrator output value.
It is highly preferred that the resistance by adjusting the subtracter and the adder input terminal determines first ratio system
Several and described second proportionality coefficient；Or the output end by being set to the subtracter and the second addition of the adder it is defeated
Enter the first proportionality coefficient adjusting module between end, and is set to the subtracting input of the current sample values Yu the subtracter
Between the second proportionality coefficient adjusting module determine first proportionality coefficient and second proportionality coefficient.
Preferably, the low frequency integration method further comprises: receiving the switching tube peak value in circuit of power factor correction
Electric current samples the switching tube peak point current based on peak value sampling to obtain the Envelop waves of the switching tube peak point current
Shape, then signal is controlled by the feedback loop that integral obtains direct current, and then remove the compensation in the circuit of power factor correction
Capacitor.
As described above, low frequency integrating circuit of the invention and method, have the advantages that
1, low frequency integrating circuit of the invention and method, which are not necessarily to external capacitive, can be realized low frequency integrating function, convenient for collection
At at low cost.
2, digital integration can be realized woth no need to digital circuit or single-chip microcontroller in low frequency integrating circuit of the invention and method, at
Originally it substantially reduces.
3, low frequency integrating circuit of the invention and method cooperate the available switching tube peak point current packet of peak value sampling technology
The integrated value of network waveform, to save the integral compensation capacitor that circuit of power factor correction etc. needs to filter out low-frequency ripple, in turn
Number of pins is reduced, cost is reduced.
Detailed description of the invention
Fig. 1 is shown as the integrating circuit schematic diagram that operational amplifier circuit in the prior art is realized.
Fig. 2 is shown as the integrating circuit schematic diagram that spaning waveguide operational amplifier in the prior art is realized.
Fig. 3 is shown as a kind of embodiment schematic diagram of low frequency integrating circuit of the invention.
Fig. 4 is shown as the operation principle schematic diagram of low frequency integrating circuit of the invention.
Fig. 5 is shown as the another embodiment schematic diagram of low frequency integrating circuit of the invention.
Fig. 6 is shown as another embodiment schematic diagram of low frequency integrating circuit of the invention.
Fig. 7 is shown as the another embodiment schematic diagram of low frequency integrating circuit of the invention.
Fig. 8 is shown as the schematic illustration of circuit of power factor correction in the prior art.
Fig. 9 is shown as the schematic illustration that low frequency integrating circuit of the invention is applied to circuit of power factor correction.
Component label instructions
1 operational amplifier
2 operational transconductance amplifiers
3 low frequency integrating circuit
31 subtracters
311 first operational amplifiers
32 adders
321 second operational amplifiers
33 switch control signal generation modules
331 high frequency sampling units
332 phase inverters
341~343 first~third followers
35 first proportionality coefficient adjusting modules
36 second proportionality coefficient adjusting modules
37 peak value sampling modules
4 circuit of power factor correction
41 compensating modules
42 comparison modules
Specific embodiment
Illustrate embodiments of the present invention below by way of specific specific example, those skilled in the art can be by this specification
Other advantages and efficacy of the present invention can be easily understood for disclosed content.The present invention can also pass through in addition different specific realities
The mode of applying is embodied or practiced, the various details in this specification can also based on different viewpoints and application, without departing from
Various modifications or alterations are carried out under spirit of the invention.
Please refer to Fig. 3~Fig. 9.It should be noted that diagram provided in the present embodiment only illustrates this in a schematic way
The basic conception of invention, only shown in schema then with related component in the present invention rather than package count when according to actual implementation
Mesh, shape and size are drawn, when actual implementation kenel, quantity and the ratio of each component can arbitrarily change for one kind, and its
Assembly layout kenel may also be increasingly complex.
In order to achieve the above objects and other related objects, the present invention provides a kind of low frequency integrating circuit 3, the low frequency integral
Circuit 3 includes:
Subtracter 31, adder 32, first switch S1, second switch S2, first capacitor C1, the second capacitor C2 and switch control
Signal generator module 33 processed.
As shown in figure 3, the adding input of the subtracter 31 receives reference signal Vref, subtracting input receives current
Sampled value Vin(n), the current sample values V is subtracted for carrying out the reference signal Vrefin(n) operation.
Specifically, in the present embodiment, the subtracter 31 include first resistor R1, second resistance R2,3rd resistor R3,
4th resistance R4 and the first operational amplifier 311.One end of the first resistor R1 is inputted as the subtraction of the subtracter 31
End, the other end connect the inverting input terminal of first operational amplifier 311；One end connection described the of the second resistance R2
The inverting input terminal of one operational amplifier 311, the other end connect the output end of first operational amplifier 311；The third
One end of resistance R3 is connecting first operational amplifier 311 just as adding input, the other end of the subtracter 31
Phase input terminal；One end of the 4th resistance R4 connects the normal phase input end of first operational amplifier 311, another termination
Ground.The reference signal Vref arbitrarily can be achieved and subtract the current sample values Vin(n) circuit structure is applicable in the present embodiment,
It is not limited to this embodiment.
As shown in figure 3, the input terminal of the first switch S1 connects the output end of the low frequency integrating circuit 3, described
The output end of one switch S1 connects the top crown of the first capacitor C1, for the output signal to the low frequency integrating circuit 3
It is sampled.
Specifically, as sampling switch, sample frequency needs that described first can be passed through according to sampling the first switch S1
The control signal frequency of switch S1 is set, and is not set one by one herein.In the present embodiment, the first switch S1 carries out high
Frequency sampling.
As shown in figure 3, the top crown of the first capacitor C1 connects the output end of the first switch S1, first electricity
Hold the bottom crown ground connection of C1.The first capacitor C1 is as sampling holding capacitor, for the low frequency after over-sampling is long-pending
The output signal of parallel circuit 3 is maintained on the first capacitor C1.
Specifically, the capacitance of the first capacitor C1 is pF grades, be can integrate in the chips.
As shown in figure 3, the first adding input of the adder 32 connects the last time product of the first switch S1 output
Divide output valve VO(n-1), the second adding input of the adder 32 connects the output end of the subtracter 31, for institute
State last time integrator output value VO(n-1) and the output signal of the subtracter 31 carries out add operation.
Specifically, in the present embodiment, the adder 32 include the 5th resistance R5, the 6th resistance R6, the 7th resistance R7,
8th resistance R8 and second operational amplifier 321.First addition of the one end of the 5th resistance R5 as the adder 32
Input terminal, the other end connect the normal phase input end of the second operational amplifier 321；One end of the 6th resistance R6 is as institute
The second adding input, the other end for stating adder 32 connect the normal phase input end of the second operational amplifier 321；Described
One end of seven resistance R7 connects the inverting input terminal of the second operational amplifier 321, other end ground connection；The 8th resistance R8
One end connect the inverting input terminal of the second operational amplifier 321, the other end connects the second operational amplifier 321
Output end.The last time integrator output value V arbitrarily can be achievedO(n-1) circuit being added with the output signal of the subtracter 31
Structure is applicable in the present embodiment, is not limited to this embodiment.
As shown in figure 3, the input terminal of the second switch S2 connects the output end of the adder 32, the second switch
Output end of the output end of S2 as the low frequency integrating circuit 3, samples for the output signal to the adder 32.
Specifically, as sampling switch, sample frequency needs that described second can be passed through according to sampling the second switch S2
The control signal frequency of switch S2 is set, and is not set one by one herein.In the present embodiment, the second switch S2 carries out high
Frequency sampling.
As shown in figure 3, the top crown of the second capacitor C2 connects the output end of the second switch S2, second electricity
Hold the bottom crown ground connection of C2.The second capacitor C2 is as sampling holding capacitor, for by the adder after over-sampling
32 output signal is maintained on the second capacitor C2.
Specifically, the capacitance of the second capacitor C2 is pF grades, be can integrate in the chips.
It is opened as shown in figure 3, the switch control signal generation module 33 is connected to the first switch S1 and described second
The control terminal for closing S2 for controlling the turn-on and turn-off of the first switch S1 and the second switch S2, and then realizes sampling.
Specifically, the switch control signal generation module 33 includes high frequency sampling unit 331 and phase inverter 332, described
High frequency sampling unit 331 is used to generate the square-wave signal as switch control signal；The phase inverter 332 is connected to the high frequency
The output end of sampling unit 331, for generating the inverted signal of 331 output signal of high frequency sampling unit.
It should be noted that in the present embodiment, the output end of the high frequency sampling unit 331 connects the first switch
The control terminal of S1, the output end of the phase inverter 332 connect the control terminal of the second switch S2.It in practical applications, can root
According to the output signal and the first switch S1 and the second switch for needing to set the switch control signal generation module 22
The connection relationship of S2, the polarity of signal is opposite is for the control signal of the first switch S1 and the control of the second switch S2
Can, it is not limited to this embodiment.
As shown in Figures 3 and 4, the working principle of the low frequency integrating circuit of the present embodiment is as follows:
Current sample values Vin(n) subtracter 31, reference signal are entered by the subtracting input of the subtracter 31
Vref enters the subtracter 31 by the adding input of the subtracter 31, and realizes subtraction fortune by the subtracter 31
It calculates.In the present embodiment, the reference signal Vref is the mean value of current sample values.
The switch control signal generation module 33 controls the first switch S1 and opens, and the second switch S2 is closed,
At this point, current integration output valve Vo(n) last time integrator output value V is converted into after being sampledo(n-1), and it is maintained at first electricity
Hold on C1.
Last time integrator output value Vo(n-1) adder is entered by the first adding input of the adder 32
32, the output signal of the subtracter 31 enters the adder 32, the two phase by the second input terminal of the adder 32
It is exported after adding.
The switch control signal generation module 33 controls the second switch S2 and opens, and the first switch S1 is closed,
At this point, current integration output valve V of the output signal of the adder 32 as a new roundo(n) described the is maintained at after sampling
On two capacitor C2, and the output signal as the low frequency integrating circuit 3.
The sampling period t that the low frequency integrating circuit 3 is set according to the high frequency sampling unit 331 to current sample values into
Row integral, the current integration output valve Vo(n) meet following relational expression:
Vo(n)=K1* (Vref-K2*Vin(n))+Vo(n-1),
Wherein, VoIt (n) is current integration output valve, K1 is the first proportionality coefficient, and K2 is the second proportionality coefficient, Vin(n) it is
Current sample values, VoIt (n-1) is last time integrator output value.The adjustment amount in each sampling period is K1*Vref-K1K2*Vin
(n), by adjusting sampling time t, first Proportional coefficient K 1 and the adjustable integrating circuit of second Proportional coefficient K 2
Gain and bandwidth, to obtain feedback compensation signal of the suitable control voltage value as system.
The present embodiment determines the first ratio system by adjusting the resistance of 32 input terminal of the subtracter 31 and the adder
Number K1 and the second Proportional coefficient K 2, meet following relational expression:
Wherein, R1 is the resistance value of the first resistor, and R2 is the resistance value of the second resistance, and R3 is the 3rd resistor
Resistance value, R4 are the resistance value of the 4th resistance, and R5 is the resistance value of the 5th resistance, and R6 is the resistance value of the 6th resistance, R7
For the resistance value of the 7th resistance, R8 is the resistance value of the 8th resistance.
Embodiment two
As shown in figure 5, the present embodiment provides a kind of low frequency integrating circuit 3, the low frequency integrating circuit 3 and embodiment one
The difference is that further including being connected to the current sample values Vin(n) between the subtracting input of the subtracter 31
First follower 341 is connected between the output end of the first switch S1 and the first adding input of the adder 32
The second follower 342, be connected between the output end of the second switch S2 and the output end of the low frequency integrating circuit 3
Third follower 343.First follower 341, second follower 342 and the third follower 343 play isolation and make
With being greatly improved the stability of the low frequency integrating circuit 3.
Specifically, the current sample values Vin(n) subtracting for the subtracter 31 is transferred to by first follower 341
Method input terminal can effectively improve input impedance, reduce output impedance, it is ensured that 341 both ends input and output of the first follower letter
Number isolation.
Specifically, the last time integrator output value Vo(n-1) adder is transferred to by second follower 342
32 the first adding input can effectively improve input impedance, reduce output impedance, it is ensured that 342 both ends of the second follower
The isolation of input/output signal.
Specifically, the preceding integrator output value Vo(n) low frequency is transferred to by the third follower 343 and integrates electricity
The output end on road 3 can effectively improve input impedance, reduce output impedance, it is ensured that the 343 both ends input and output of third follower
The isolation of signal.
In the present embodiment, first follower 341, second follower 342 and the third follower 343 are equal
It is realized using operational amplifier.Input terminal of the normal phase input end of operational amplifier as follower；The reverse phase of operational amplifier
Input terminal connects the output end of operational amplifier, and the output end as follower.In practical applications, voltage arbitrarily can be achieved
Follow output, the circuit structure that plays isolation effect is suitable for the follower of the present embodiment, be not limited to this embodiment.
The working principle of the low frequency integrating circuit of the present embodiment is the same as example 1, and will not repeat them here.
Embodiment three
As shown in fig. 6, the present embodiment provides a kind of low frequency integrating circuit 3, the low frequency integrating circuit 3 and embodiment one
The difference is that passing through 36 setting ratio coefficient of the first proportionality coefficient adjusting module 35 and the second proportionality coefficient adjusting module.
Specifically, first proportionality coefficient adjusting module 35 is connected to the output end and the addition of the subtracter 31
Between second adding input of device 32, second proportionality coefficient adjusting module 36 is connected to the current sample values Vin(n)
Between the subtracting input of the subtracter 31.
The subtracter 31 and the adder 32 to first Proportional coefficient K 1 and second Proportional coefficient K 2 not
Have an impact, first Proportional coefficient K 1 and second Proportional coefficient K 2 by first proportionality coefficient adjusting module 35 and
Second proportionality coefficient adjusting module 36 generates, to realize the output signal expression formula being the same as example 1.
Example IV
As shown in fig. 7, the present embodiment provides a kind of low frequency integrating circuit 3, with embodiment two the difference is that, it is described
Low frequency integrating circuit 3 further includes that output end is connected to the third switch S3 of 3 input terminal of low frequency integrating circuit and is connected to
The third capacitor C3 of the third output switching terminal.
Specifically, the input terminal of the third switch S3 receives sampled value according to actual needs, output end connection described the
The input terminal of one follower 341 is sampled for the input signal to the third switch S3.The third switch S3 conduct
Sampling switch, sample frequency need to be set by the control signal frequency of the third switch S3 according to sampling, herein
It does not set one by one.
Specifically, the top crown of the third capacitor C3 connects the output end of the third switch S3, bottom crown ground connection, makees
To sample holding capacitor, for the input signal after sampling to be maintained at the third capacitor C3.The third capacitor C3's
Capacitance is pF grades, be can integrate in the chips.
As shown in figure 8, in the prior art, the circuit of power factor correction 4 includes LED load by taking Boost structure as an example
Or main circuit, inductance L, sustained diode, output capacitance C, switching tube M, sampling resistor Rcs, compensating module 41, compensating electric capacity
Ccomp and comparison module 42, the peak point current of the switching tube M are needed by obtaining after the compensating electric capacity Ccomp Integral Processing
To the controlling value of feedback control loop, to control the switching tube M on or off.The compensating electric capacity Ccomp is the electricity of big capacitance
Hold, can not be integrated into chip, it is external to chip exterior therefore, it is necessary to increase port COMP.As shown in figure 9, this embodiment
In, the low frequency integrating circuit 3 is applied in circuit of power factor correction 4, the input terminal of the low frequency integrating circuit 3 connects
The compensating module 41 is connected in the source of the switching tube M, output end, for obtaining switching tube peak point current envelope waveform
Integrated value, the low frequency integrating circuit 3 export the feedback loop control signal of the circuit of power factor correction, the feedback loop
It is D. C. value that road, which controls signal, can be used as the feedback letter that the 4 place chip of circuit of power factor correction can be handled directly
Number, therefore the compensating electric capacity Ccomp of exterior can be removed and reduce chip pin number, to reduce the cost of system.
Specifically, the input terminal of the third switch S3 receives switching tube peak-current signal CS_pk, the third switch
The control signal of S3 is generated by the peak value sampling module 37.
It should be noted that the circuit of power factor correction 6 can be the circuit for being arbitrarily able to achieve PFC,
It is not limited to this embodiment, the present embodiment is only used as example.
It should be noted that there is the circuit for the integral compensation capacitor for filtering out low-frequency ripple to be also applied for the present invention for other,
It is not limited with circuit of power factor correction cited by the present embodiment.
The working principle of the low frequency integrating circuit 3 of the present embodiment is as follows:
The switching tube peak-current signal CS_pk is inputted in the low frequency integrating circuit 3, the peak value sampling module 37
Output control signal is to drive the third switch S3 to sample the switching tube peak-current signal CS_pk, the switching tube
Peak-current signal CS_pk is multiple sawtooth pulses, is obtained by sampling each in the switching tube peak-current signal CS_pk
The endpoint of a peak value, and then the envelope waveform of switching tube peak point current is obtained, and be maintained on the third capacitor C3.
Then by the subtracter 31, adder 32, the first switch S1, the second switch S2, described
First capacitor C1, the second capacitor C2, the switch control signal generation module 33, first follower 341, described
Two followers 342 and the third follower 343 carry out digital integration, to obtain the feedback control loop control of circuit of power factor correction
Signal processed, the feedback loop control signal are the average value of the switching tube peak point current envelope.The method and implementation of integral
Example one is identical, will not repeat them here.
Low frequency integrating circuit of the invention and method can realize the function of digital integration in common analog circuit, general
Adaptive is high, and at low cost.
In conclusion the present invention provides a kind of low frequency integrating circuit and method, comprising: receive reference signal and present sample
The subtracter of value subtracts the operation of the current sample values for carrying out the reference signal；It is connected to the low frequency integral electricity
First switch between the output end on road and the top crown of the first capacitor, for the output letter to the low frequency integrating circuit
It number is sampled；The bottom crown of the first capacitor is grounded；First adding input connects the first switch output end, second
Adding input connects the output end of the subtracter, for the output letter to the last time integrator output value and the subtracter
Number carry out add operation adder；It is connected between the output end of the adder and the output end of the low frequency integrating circuit
Second switch, sampled for the output signal to the adder；The top crown connection described the of second capacitor
The output end of two switches, bottom crown ground connection；Wherein, the first switch is opposite with the control signal polarity of the second switch.
The first adding input that last time integrator output value is fed back to the adder, after reference signal is subtracted current sample values
Value is input to the second adding input of the adder, and output current integration is defeated after carrying out add operation by the adder
It is worth out.Low frequency integrating circuit of the invention and method, which are not necessarily to external capacitive, digital circuit, single-chip microcontroller, can be realized low frequency filtering function
Can, it is at low cost convenient for integrated；The filter value for cooperating the available switching tube peak point current envelope waveform of peak value sampling technology, from
And save circuit of power factor correction etc. and need to filter out the integral compensation capacitor of low-frequency ripple, and then reduce number of pins, reduce
Cost.So the present invention effectively overcomes various shortcoming in the prior art and has high industrial utilization value.
The above-described embodiments merely illustrate the principles and effects of the present invention, and is not intended to limit the present invention.It is any ripe
The personage for knowing this technology all without departing from the spirit and scope of the present invention, carries out modifications and changes to above-described embodiment.Cause
This, institute is complete without departing from the spirit and technical ideas disclosed in the present invention by those of ordinary skill in the art such as
At all equivalent modifications or change, should be covered by the claims of the present invention.
Claims (13)
1. a kind of low frequency integrating circuit, which is characterized in that the low frequency integrating circuit includes at least:
Subtracter, adder, first switch, second switch, first capacitor and the second capacitor；
The adding input of the subtracter receives reference signal, and the subtracting input of the subtracter receives current sample values,
The operation of the current sample values is subtracted for carrying out the reference signal；
The input terminal of the first switch connects the output end of the low frequency integrating circuit, the output end connection of the first switch
The top crown of the first capacitor is sampled for the output signal to the low frequency integrating circuit；The first capacitor
Bottom crown ground connection；
First adding input of the adder connects the last time integrator output value of the first switch output, the adder
The second adding input connect the output end of the subtracter, for the last time integrator output value and the subtracter
Output signal carries out add operation；
The input terminal of the second switch connects the output end of the output end of the adder, the second switch as described low
The output end of frequency integrating circuit is sampled for the output signal to the adder；
The top crown of second capacitor connects the output end of the second switch, bottom crown ground connection；
Wherein, the first switch is opposite with the control signal polarity of the second switch.
2. low frequency integrating circuit according to claim 1, it is characterised in that: the subtracter includes first resistor, second
Resistance, 3rd resistor, the 4th resistance and the first operational amplifier；
One end of the first resistor connects first operational amplifier as subtracting input, the other end of the subtracter
Inverting input terminal；
One end of the second resistance connects the inverting input terminal of first operational amplifier, other end connection first fortune
Calculate the output end of amplifier；
One end of the 3rd resistor connects first operational amplifier as adding input, the other end of the subtracter
Normal phase input end；
One end of 4th resistance connects the normal phase input end of first operational amplifier, other end ground connection.
3. low frequency integrating circuit according to claim 1, it is characterised in that: the adder includes the 5th resistance, the 6th
Resistance, the 7th resistance, the 8th resistance and second operational amplifier；
One end of 5th resistance connects second operation and puts as the first adding input, the other end of the adder
The normal phase input end of big device；
One end of 6th resistance connects second operation and puts as the second adding input, the other end of the adder
The normal phase input end of big device；
One end of 7th resistance connects the inverting input terminal of the second operational amplifier, other end ground connection；
One end of 8th resistance connects the inverting input terminal of the second operational amplifier, other end connection second fortune
Calculate the output end of amplifier.
4. low frequency integrating circuit according to claim 1, it is characterised in that: the low frequency integrating circuit further includes being connected to
The first follower between the current sample values and the subtracting input of the subtracter, is connected to the defeated of the first switch
The second follower between outlet and the first adding input of the adder, be connected to the output end of the second switch with
Third follower between the output end of the low frequency integrating circuit, each follower are used for isolation signals.
5. low frequency integrating circuit according to claim 1, it is characterised in that: the low frequency integrating circuit further includes switch control
Signal generator module processed；The switch control signal generation module includes high frequency sampling unit and phase inverter；The high frequency sampling
Unit is for generating square-wave signal；The phase inverter is connected to the output end of the high frequency sampling unit, for generating the height
The inverted signal of frequency sampling element output signal.
6. low frequency integrating circuit according to claim 1, it is characterised in that: the first capacitor and second capacitor
Capacitance is pF grades.
7. low frequency integrating circuit according to claim 1, it is characterised in that: the low frequency integrating circuit further includes the first ratio
Example coefficient adjustment module and the second proportionality coefficient adjusting module, first proportionality coefficient adjusting module are connected to the subtracter
Output end and the adder the second adding input between, second proportionality coefficient adjusting module is connected to described work as
Between preceding sampled value and the subtracting input of the subtracter.
8. low frequency integrating circuit described in any one according to claim 1~7, it is characterised in that: the low frequency integrating circuit
Further include the third switch that output end is connected to the low frequency integrating circuit input terminal, and is connected to the third switch output
The third capacitor at end.
9. low frequency integrating circuit according to claim 8, it is characterised in that: the low frequency integrating circuit further includes that peak value is adopted
Egf block, the output end of the peak value sampling module connect the control terminal of the third switch, for controlling the third switch
It is sampled；Wherein, the capacitance of the third capacitor is pF grades.
10. a kind of low frequency integration method of low frequency integrating circuit as claimed in any one of claims 1 to 9 wherein, which is characterized in that
The low frequency integration method includes at least:
The first adding input that last time integrator output value is fed back to the adder, subtracts current sample values for reference signal
Value afterwards is input to the second adding input of the adder, and foreset is worked as in output after carrying out add operation by the adder
Divide output valve.
11. low frequency integration method according to claim 10, it is characterised in that: the current integration output valve meets as follows
Relational expression:
Vo(n)=K1* (Vref-K2*Vin(n))+Vo(n-1),
Wherein, VoIt (n) is current integration output valve, K1 is the first proportionality coefficient, and K2 is the second proportionality coefficient, VinIt (n) is current
Sampled value, VoIt (n-1) is last time integrator output value.
12. low frequency integration method according to claim 11, it is characterised in that: by adjusting the subtracter and it is described plus
The resistance of multiplier input terminal determines first proportionality coefficient and second proportionality coefficient；Or by being set to the subtraction
The first proportionality coefficient adjusting module between the output end of device and the second adding input of the adder, and be set to described
The second proportionality coefficient adjusting module between current sample values and the subtracting input of the subtracter determines first ratio
Coefficient and second proportionality coefficient.
13. low frequency integration method according to claim 10, it is characterised in that: the low frequency integration method is further wrapped
Include: receive circuit of power factor correction in switching tube peak point current, based on peak value sampling to the switching tube peak point current into
Row sampling obtains the envelope waveform of the switching tube peak point current, then controls signal by the feedback loop that integral obtains direct current,
And then remove the compensating electric capacity in the circuit of power factor correction.
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Denomination of invention: Low frequency integration circuit and method Effective date of registration: 20231008 Granted publication date: 20210730 Pledgee: Bank of China Limited Wuxi Branch Pledgor: China Resources micro integrated circuit (Wuxi) Co.,Ltd. Registration number: Y2023980060027 |