CN102255490A - PFC (power factor correction) circuit based on delta-sigma modulation technique and duty ratio control method thereof - Google Patents

PFC (power factor correction) circuit based on delta-sigma modulation technique and duty ratio control method thereof Download PDF

Info

Publication number
CN102255490A
CN102255490A CN201110110424XA CN201110110424A CN102255490A CN 102255490 A CN102255490 A CN 102255490A CN 201110110424X A CN201110110424X A CN 201110110424XA CN 201110110424 A CN201110110424 A CN 201110110424A CN 102255490 A CN102255490 A CN 102255490A
Authority
CN
China
Prior art keywords
circuit
delta
digital
output voltage
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201110110424XA
Other languages
Chinese (zh)
Inventor
职春星
钱阔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FOSHAN NANHAI SAIWEI TECHNOLOGY CO LTD
Original Assignee
FOSHAN NANHAI SAIWEI TECHNOLOGY CO LTD
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by FOSHAN NANHAI SAIWEI TECHNOLOGY CO LTD filed Critical FOSHAN NANHAI SAIWEI TECHNOLOGY CO LTD
Priority to CN201110110424XA priority Critical patent/CN102255490A/en
Publication of CN102255490A publication Critical patent/CN102255490A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention provides a PFC (power factor correction) circuit based on a delta-sigma modulation technique and a duty ratio control method thereof. The PFC circuit comprises an input voltage ADC (analog to digital converter), a duty ratio generation circuit, an output voltage processing circuit and a digital pulse width modulation circuit in electrical connection, wherein the duty ratio generation circuit comprises a switching frequency control circuit, a Ton counting circuit and a delta-sigma modulation circuit in electrical connection; and the output voltage processing circuit comprises an output voltage ADC, a digital PI (proportional integral) compensator and a rapid dynamic response circuit in electrical connection. The delta-sigma modulation technique is utilized in the PFC circuit to realize the duty ratio control method. According to the invention, the response speed of the input voltage change can be improved, the iL waveform of the input inductive current is adjusted, the frequency spectrum of the pulse width signal is shaped, the power factor is improved and the output voltage is stabilized.

Description

Pfc circuit and duty ratio control method thereof based on the delta-sigma modulation technique
Technical field
The present invention relates to a kind of PFC(power factor correction based on the delta-sigma modulation technique) circuit and duty ratio control method thereof.
Background technology
In a kind of typical Switching Power Supply application system, the input AC power supplies converts the DC power supply to again through full-wave rectification.Although the input power supply can be similar to the sine wave of thinking level and smooth, because the not extensive use of control rectifier (rectification circuit that the rectifier diode of traditional no controlled function is formed) in power apparatus, input current can present discontinuous and serious distortion is arranged, and this can produce a large amount of harmonic currents.Various harmonic waves cause very big pollution to electrical network, make production, transmission and the utilization ratio of electric energy greatly reduce.So concerning the AC/DC transducer foremost that is in power-supply system, its efficient and energy conservation characteristic become more and more important.In recent years, for harmonic carcellation electric current composition, after the full-wave rectification bridge of AC/DC transducer, extensively adopted the power factor correction pfc circuit.The power factor correction chip also is widely used in markets such as charger, power supply adapter for notebook computer, printer power supply, LCD power supply, PC power source.
Fig. 1 is a circuit diagram of active PFC control system that boosts structure, and this control circuit comprises full-wave rectification bridge, PFC and output voltage controller, power stage and back level power supply.Voltage source AC provide alternating voltage, via the diode full-wave rectification bridge, produces the sinusoidal input voltage Vg (t) of shaping.In the U.S., Japan, civil power is 60HZ/100V, and in Europe, Chinese, civil power is 50HZ/220V.Adding less capacitor C between rectifier bridge and booster circuit, is the high frequency composition that exists in the input voltage in order to eliminate.
PFC and output voltage controller produce power stage, provide duty ratio d the signal that (n) modulated, with conducting and the judgement of control switch SW.In the practical application, switch SW can be a field-effect transistor, as NFET.Because switching frequency reaches 25KHZ usually to 200KHZ, far above import mains frequency 50HZ 60HZ, so the input voltage Vg (t) in each switch periods can think constant.When the switch SW conducting, inductive current i LThe linear rising, increasing slope is (Vg/L), the input power supply is able to inductance L transmission, stored energy.When switch SW is turn-offed, inductive current i LLinear decline, descending slope is (Vo-Vg)/L.At this moment, inductance energy is transferred to load and capacitor C BulkIn the switch SW conducting, capacitor C BulkProvide energy to load, so capacitor C BulkShould be enough greatly to guarantee that output voltage V o is enough stable, promptly bigger ripple can not occur.The purpose of PFC technology is to make power stage and load to seem to be presented on pure resistive from input.PFC and output voltage controller are by duty cycle signals control inductive current i LRise and fall, make i LAverage current i L (av)Follow the waveform of input voltage Vg (t), to improve power factor and to reduce the input current harmonics distortion.
In actual applications, inductive current i LCan be operated in continuous conduction mode (CCM), promptly before next switch periods arrives, can not drop to 0; Can be operated in DCM (DCM), promptly before next switch periods arrives, reduce to 0, and to keep one section electric current be time of 0 that promptly ON time swashs the time sum less than switch periods with anti-; Also can be operated in the critical conduction mode (CRM) between these two kinds of patterns.
Present most occasion, pfc controller is realized by analog circuit.Along with the development of digital technology, increasing control algolithm is achieved in Power Electronic Circuit by digital signal processor (DSP), its former because of, digital controlly can realize more complicated algorithm.In addition, digital controlly compared many advantages, comprised that reliability height, adaptability are strong, repeatability, portability etc. with simulation control.Under identical cost condition, the performance of digital control realization is better than simulation control.Fig. 2 is the circuit diagram of a kind of digital continuous conduction mode CCM PFC that realizes based on the DSP mode.This system passes through Voltage loop PI compensator (PI-V among Fig. 2) by the output voltage V o (t) that will take a sample with the difference of reference voltage Vref, as an end of multiplier input.The other end of multiplier input is the input voltage Vg (t) after the rectification, and multiplier provides the sinusoidal reference waveform of input current.Input current passes through electric current loop PI compensator (PI-I among Fig. 2) by the difference of sample resistance Rs and sinusoidal reference waveform.The output of electric current loop PI is compared as an end of PWM input and the sawtooth waveforms of the other end through zero-order holder ZOH, produces the duty cycle control signal of control switch SW.
Yet, as the above, the PFC digital control algorithm that generally adopts is transplanted from the traditional analog control strategy and is come at present, to control the Voltage loop of voltage follow reference voltage Vref and regulate the electric current loop that input current is followed the sinusoidal reference waveform, realize by simple DSP, and all be basically based on continuous conduction mode (CCM) PFC.The numerically controlled advantage of this not maximum performance, without any innovation, (Electro-Magnetic Interference EMI) does not have good restraining to the electromagnetic interference that Switching Power Supply self is produced yet on core duty ratio control algolithm.
Summary of the invention
The invention provides a kind of pfc circuit and duty ratio control method thereof, improved the response speed that input voltage is changed, regulate the input inductance current i based on the delta-sigma modulation technique LWaveform carries out the pectrum noise shaping to pulse width signal, improves power factor and regulated output voltage.
In order to achieve the above object, the invention provides a kind of pfc circuit based on the delta-sigma modulation technique, this pfc circuit comprises input voltage analog to digital converter, duty ratio generation circuit, output voltage treatment circuit and the digital pulse width modulation circuit that circuit connects;
Described duty ratio produces circuit and comprises switching frequency control circuit, Ton counting circuit and the delta-sigma modulation circuit that circuit connects.
Described output voltage treatment circuit comprises output voltage analog to digital converter, digital PI compensator and the fast dynamic response circuit that circuit connects.
Described output voltage treatment circuit comprises output voltage analog to digital converter, notch filter and the digital PI compensator that circuit connects.
Described delta-sigma modulation circuit adopts K rank delta-sigma modulator, this K rank delta-sigma modulator comprises the quantizer of K rank loop filter that circuit connects and 1 or multidigit, and the output signal Out of quantizer (n) feeds back to input and does additive operation after the delay of a clock unit.
The present invention also provides a kind of duty ratio control method based on the delta-sigma modulation technique, and the method includes the steps of:
Step 1, input voltage Vg (t) and output voltage V o (t) carried out sampling processing after, output to duty ratio and produce circuit;
Step 2, switching frequency control circuit produce switch periods signal T, and T outputs to Ton counting circuit and delta-sigma modulation circuit with this switch periods signal;
Step 3, Ton counting circuit produce the switch conduction time signal
Figure 201110110424X100002DEST_PATH_IMAGE002
Under the DCM pattern,
Wherein, L is an inductance value, and Vo and Vg are respectively the sampled value of output voltage and input voltage, and T is a switch periods, and the λ value is made as PI/V Rms 2Wherein, PI is the output valve of digital PI controller, V RmsRoot-mean-square value for input line voltage;
Step 4, delta-sigma modulation circuit change into pulse width signal P with the signal of Ton counting circuit and switching frequency control circuit W
Step 5, digital pulse width modulation circuit receive pulse width signal Pw and the switch periods signal T that the delta-sigma modulation circuit produces, and produce control switch pipe SW conducting and the switch controlling signal CS that closes.
Described step 1 comprises following steps:
Step 1.1, input voltage analog to digital converter sampling input voltage Vg (t) convert digital signal to, output to the switching frequency control circuit in the duty ratio generation circuit;
After step 1.2, output voltage treatment circuit are handled output voltage V o (t), output to the Ton counting circuit in the duty ratio generation circuit.
Described step 1.2 comprises following steps:
Step 1.2.1, output voltage analog to digital converter sampling and outputting voltage Vo (t) convert digital signal to, do the difference computing with reference voltage Vref by subtracter, produce error signal e v (n);
Step 1.2.2, if adopt the fast dynamic response circuit in the output voltage treatment circuit, execution in step 1.2.3 then, if adopt notch filter in the output voltage treatment circuit, execution in step 1.2.4 then;
Step 1.2.3, output error signal ev (n) give digital PI compensator, and the fast dynamic response circuit is according to output voltage V O(t) parameter of digital PI compensator is regulated in variation, and the output of digital PI compensator enters the Ton counting circuit in the duty ratio generation circuit;
Step 1.2.4 by notch filter, after the interference of elimination twice power frequency ripple, exports to digital PI compensator with output error signal ev (n), and the output of digital PI compensator enters the Ton counting circuit in the duty ratio generation circuit.
Described step 5 comprises following steps:
Step 5.1, switch periods signal T determine the counting step of each switch periods;
Step 5.2, when the count value of the counter of digital pulse width modulation circuit reaches the value of pulse width signal Pw, the state of switch controlling signal CS overturns, conducting and the closed condition of diverter switch pipe SW.
The present invention has improved the response speed that input voltage is changed, and regulates the input inductance current i LWaveform carries out the pectrum noise shaping to pulse width signal, improves power factor and regulated output voltage.
Description of drawings
Fig. 1 is the circuit diagram of the active PFC control system of a kind of structure of boosting in the background technology;
Fig. 2 is the circuit diagram of a kind of digital continuous conduction mode CCM PFC that realizes based on the DSP mode in the background technology;
Fig. 3 is the circuit diagram of a kind of pfc circuit based on the delta-sigma modulation technique provided by the invention;
Fig. 4 is the circuit diagram of another kind of output voltage treatment circuit provided by the invention;
Fig. 5 is the frequency response of notch filter 104 ';
Fig. 6 is the circuit diagram with K rank delta-sigma modulator;
Fig. 7 is inductive current i under the DCM pattern LWaveform;
Fig. 8 is the schematic diagram that K rank delta-sigma modulator produces pulse width signal Pw;
Fig. 9 is the schematic diagram that single order delta-sigma modulator produces pulse width signal Pw;
Figure 10 is the implementation of the counter structure of digital pulse width modulation circuit 108.
Embodiment
Followingly specify preferred embodiment of the present invention according to Fig. 3~Figure 10:
A kind of pfc circuit based on the delta-sigma modulation technique as shown in Figure 3, this pfc circuit comprise input voltage analog to digital converter (ADC) 101, duty ratio generation circuit, output voltage treatment circuit and the digital pulse width modulation circuit 108 that circuit connects.
Described duty ratio produces circuit and comprises switching frequency control circuit 106, Ton counting circuit 105 and the delta-sigma modulation circuit 107 that circuit connects.
Described output voltage treatment circuit comprises output voltage analog to digital converter (ADC) 102, digital PI compensator 103 and the fast dynamic response circuit 104 that circuit connects.
Input voltage analog to digital converter (ADC) 101 sampling input voltage Vg (t), convert digital signal to, output to switching frequency control circuit 106, output voltage analog to digital converter (ADC) 102 sampling and outputting voltage Vo (t), convert digital signal to, do the difference computing with reference voltage Vref by subtracter, output error signal ev (n) gives digital PI compensator 103, and fast dynamic response circuit 104 is according to output voltage V O(t) parameter of digital PI compensator 103 is regulated in variation, to improve the response speed that 103 pairs of output voltages of digital PI compensator are regulated, the output of numeral PI compensator 103 enters duty ratio and produces circuit, 105 computings of Ton counting circuit produce switch conduction time signal Ton, input voltage Vg (t) is through analog-to-digital conversion, carry out a reference frame of FREQUENCY CONTROL as switching frequency control circuit 106, switching frequency control circuit 106 produces switch periods signal T, in addition, Ton counting circuit 105 also needs to use switch periods signal T, delta-sigma modulation circuit 107 changes into digital pulse width modulation circuit 108 required switch periods and ON time signal with the signal of Ton counting circuit 105 and switching frequency control circuit 106, and digital pulse width modulation circuit 108 produces control switch SW conductings and the signal CS that closes.
This pfc circuit has comprised two control loops, an electric current loop and the Voltage loop that bandwidth is less that bandwidth is bigger, electric current loop is that input voltage Vg enters pfc circuit, generation duty cycle control signal CS is showed, Voltage loop is that output voltage V o enters pfc circuit, and generation duty cycle control signal CS is showed.Wherein, the bandwidth of electric current loop should be enough big so that pfc circuit can be made quick response to input voltage Vg (t), follows the purpose of input voltage waveform to reach inductive current.And common design lower of the bandwidth of Voltage loop, as 10-20HZ.Because have the ripple composition among the output voltage V o (t), ripple frequency equals the twice of power frequency, and the Voltage loop bandwidth is low can to prevent effectively that the output voltage ripple composition from entering pfc circuit, thereby has avoided switch controlling signal CS is exerted an influence.
Among the present invention, Voltage loop is dynamically adjusted by the parameter of the 104 pairs of digital PI compensators 103 of fast dynamic response circuit shown in Fig. 3, has improved the response speed that Vo is changed.
As shown in Figure 4, the present invention also provides another kind of output voltage treatment circuit to improve the Voltage loop response speed, and this output voltage treatment circuit comprises output voltage analog to digital converter (ADC) 102, notch filter 104 ' and the digital PI compensator 103 that circuit connects.
Because the frequency of contained main AC ripple composition is the twice power frequency among the output voltage V o, the sampled value of output voltage can be passed through notch filter (Notch filter) 104 ', its some resistance Frequency point is arranged on twice power frequency place, is used to eliminate the interference of twice power frequency ripple.
As shown in Figure 5, frequency response for notch filter 104 ', error signal no longer contains the ripple composition of twice power frequency behind notch filter 104 ', so the bandwidth of digital PI compensator 103 can be set to 50-100HZ, with respect to the traditional electrical pressure ring of 10-20HZ, improved the response speed of Voltage loop significantly like this.
As shown in Figure 6, described delta-sigma modulation circuit 107 adopts K rank delta-sigma modulator, this K rank delta-sigma modulator comprises the quantizer 1072 of K rank loop filter 1071 that circuit connects and 1 or multidigit, and the output signal Out of quantizer 1072 (n) is through the delay (Z among the figure of a clock unit -1Expression delay cell) feed back to input after and do additive operation, this clock unit adopts d type flip flop.Because this modulator structure has high pass characteristic to the noise transmission function, and system transfer function is had low-pass characteristic, so, as long as select suitable loop filter just can finish noise shaping well, promptly noise is moved to high frequency, and weakened noise in the bandwidth.So the delta-sigma modulation is widely used in the data transaction.
Pfc circuit control inductive current i provided by the invention LLinearity rise and descend, can be operated in CCM, DCM and CRM pattern.In theory, pfc circuit as shown in Figure 3 all is suitable for CCM, DCM and these three kinds of patterns of CRM.In practice, at the middle low power application scenario, the DCM pattern is the scheme that extensively adopts.Fig. 7 is inductive current i under the DCM pattern LWaveform.
The present invention also provides a kind of duty ratio control method based on the delta-sigma modulation technique, and the method includes the steps of:
Step 1, input voltage Vg (t) and output voltage V o (t) carried out sampling processing after, output to duty ratio and produce circuit;
Step 1.1, input voltage analog to digital converter (ADC) 101 sampling input voltage Vg (t) convert digital signal to, output to the switching frequency control circuit 106 in the duty ratio generation circuit;
After step 1.2, output voltage treatment circuit are handled output voltage V o (t), output to the Ton counting circuit 105 in the duty ratio generation circuit;
Step 1.2.1, output voltage analog to digital converter (ADC) 102 sampling and outputting voltage Vo (t) convert digital signal to, do the difference computing with reference voltage Vref by subtracter, produce error signal e v (n);
When the setting of reference voltage Vref can be nominal voltage according to output voltage V o (as 400V), the output valve of output voltage analog to digital converter ADC;
Step 1.2.2, if adopt fast dynamic response circuit 104 in the output voltage treatment circuit, execution in step 1.2.3 then is if adopt notch filter 104 ', then execution in step 1.2.4 in the output voltage treatment circuit;
Step 1.2.3, output error signal ev (n) give digital PI compensator 103, and fast dynamic response circuit 104 is according to output voltage V O(t) parameter of digital PI compensator 103 is regulated in variation, and the output of digital PI compensator 103 enters the Ton counting circuit 105 in the duty ratio generation circuit;
Step 1.2.4 by notch filter 104 ', after the interference of elimination twice power frequency ripple, exports to digital PI compensator 103 with output error signal ev (n), and the output of digital PI compensator 103 enters the Ton counting circuit 105 in the duty ratio generation circuit;
Step 2, switching frequency control circuit 106 produce switch periods signal T, and T outputs to Ton counting circuit 105 and delta-sigma modulation circuit 107 with this switch periods signal;
Switching frequency control circuit 106 carries out spread spectrum according to the sampled value of input voltage Vg;
As: when input voltage Vg rises, improve frequency in a power frequency period, produce less switch periods T; When Vg descends, produce long switch periods T;
In addition, the spread spectrum technology reduces switching loss by reducing switching frequency when underloading, can improve system effectiveness well, the selection of switching frequency should be avoided the audibility range of people's ear, and the too high meeting of switching frequency causes system effectiveness to descend, and carries out spread spectrum so switching frequency can be chosen in the scope of 20kHZ-150kHZ;
Step 3, Ton counting circuit 105 produce the switch conduction time signal
Figure 546292DEST_PATH_IMAGE002
Under the DCM pattern, inductive current i LAverage current following computing formula is arranged:
Figure 201110110424X100002DEST_PATH_IMAGE006
Wherein, L is an inductance value, and Vo and Vg are respectively the sampled value of output voltage and input voltage, and Ton is the switch conduction time, and T is a switch periods.In order to obtain High Power Factor value (PH), reach the purpose of power factor correction, control inductance average current iL (av) follows input voltage waveform, promptly has: iL (av)=λ Vg.When λ is constant, then there is input current ideally to follow the waveform of input voltage.Can get, formula (2) is the control method of switch conduction time:
Figure 775016DEST_PATH_IMAGE004
For input power is not changed with the variation of input voltage,, the λ value can be made as (PI/V here Rms 2); Wherein, PI is the output valve of digital PI controller, V RmsRoot-mean-square value for input line voltage;
Step 4, delta-sigma modulation circuit 107 change into pulse width signal P with the signal of Ton counting circuit 105 and switching frequency control circuit 106 W
As shown in Figure 8, represented ON time control signal Ton 2By extraction of square root computing X 1/2(X among Fig. 8 1/2Shown in) after, the K rank delta-sigma modulator by linear feedback (among Fig. 8 shown in the frame of broken lines) produces pulse width signal Pw;
The K rank delta-sigma modulator of linear feedback is with ON time control signal Ton 2When converting pulse width signal Pw to, also pulse width signal has been carried out the pectrum noise shaping, noise component among the pulse width signal Pw in the bandwidth can produce very big influence to the precision of switch controlling signal CS, finally can have influence on the stable of power factor correction and output voltage;
As shown in Figure 9, in one embodiment of the invention, can adopt single order delta-sigma modulator to generate pulse width signal P W, be 1/ (1-z-1) at the transfer function of single order delta-sigma modulation intermediate ring road filter;
Step 5, digital pulse width modulation circuit 108 receive pulse width signal Pw and the switch periods signal T that delta-sigma modulation circuit 107 produces, and produce control switch pipe SW conducting and the switch controlling signal CS that closes;
As shown in figure 10, be the implementation of the counter structure of digital pulse width modulation circuit 108;
Step 5.1, switch periods signal T determine the counting step of each switch periods;
Step 5.2, when the count value of the counter of digital pulse width modulation circuit 108 reaches the value of pulse width signal Pw, the state of switch controlling signal CS overturns, conducting and the closed condition of diverter switch pipe SW are regulated the input inductance current i to reach LWaveform, the purpose of raising power factor and regulated output voltage.
Although content of the present invention has been done detailed introduction by above preferred embodiment, will be appreciated that above-mentioned description should not be considered to limitation of the present invention.After those skilled in the art have read foregoing, for multiple modification of the present invention with to substitute all will be conspicuous.Therefore, protection scope of the present invention should be limited to the appended claims.

Claims (8)

1. the pfc circuit based on the delta-sigma modulation technique is characterized in that, this pfc circuit comprises input voltage analog to digital converter (101), duty ratio generation circuit, output voltage treatment circuit and the digital pulse width modulation circuit (108) that circuit connects;
Described duty ratio produces circuit and comprises switching frequency control circuit (106), Ton counting circuit (105) and the delta-sigma modulation circuit (107) that circuit connects.
2. the pfc circuit based on the delta-sigma modulation technique as claimed in claim 1, it is characterized in that described output voltage treatment circuit comprises output voltage analog to digital converter (102), digital PI compensator (103) and the fast dynamic response circuit (104) that circuit connects.
3. the pfc circuit based on the delta-sigma modulation technique as claimed in claim 1, it is characterized in that described output voltage treatment circuit comprises output voltage analog to digital converter (102), notch filter (104 ') and the digital PI compensator (103) that circuit connects.
4. the pfc circuit based on the delta-sigma modulation technique as claimed in claim 1, it is characterized in that, described delta-sigma modulation circuit (107) adopts K rank delta-sigma modulator, this K rank delta-sigma modulator comprises the quantizer (1072) of K rank loop filters (1071) that circuit connects and 1 or multidigit, and the output signal Out (n) of quantizer (1072) is through a clock unit Z -1Delay after feed back to input and do additive operation.
5. duty ratio control method based on the delta-sigma modulation technique is characterized in that the method includes the steps of:
Step 1, input voltage Vg (t) and output voltage V o (t) carried out sampling processing after, output to duty ratio and produce circuit;
Step 2, switching frequency control circuit (106) produce switch periods signal T, and this switch periods signal T is outputed to Ton counting circuit (105) and delta-sigma modulation circuit (107);
Step 3, Ton counting circuit (105) produce the switch conduction time signal
Under the DCM pattern,
Figure 201110110424X100001DEST_PATH_IMAGE004
Wherein, L is an inductance value, and Vo and Vg are respectively the sampled value of output voltage and input voltage, and T is a switch periods, and the λ value is made as PI/V Rms 2Wherein, PI is the output valve of digital PI controller, V RmsRoot-mean-square value for input line voltage;
Step 4, delta-sigma modulation circuit (107) change into pulse width signal P with the signal of Ton counting circuit (105) and switching frequency control circuit (106) W
Step 5, digital pulse width modulation circuit (108) receive pulse width signal Pw and the switch periods signal T that delta-sigma modulation circuit (107) produces, and produce control switch pipe SW conducting and the switch controlling signal CS that closes.
6. the pfc circuit based on the delta-sigma modulation technique as claimed in claim 5 is characterized in that, described step 1 comprises following steps:
Step 1.1, input voltage analog to digital converter (101) sampling input voltage Vg (t) convert digital signal to, output to the switching frequency control circuit (106) in the duty ratio generation circuit;
After step 1.2, output voltage treatment circuit are handled output voltage V o (t), output to the Ton counting circuit (105) in the duty ratio generation circuit.
7. the pfc circuit based on the delta-sigma modulation technique as claimed in claim 6 is characterized in that, described step 1.2 comprises following steps:
Step 1.2.1, output voltage analog to digital converter (102) sampling and outputting voltage Vo (t) convert digital signal to, do the difference computing with reference voltage Vref by subtracter, produce error signal e v (n);
Step 1.2.2, if adopt fast dynamic response circuit (104) in the output voltage treatment circuit, execution in step 1.2.3 then, if adopt notch filter (104 ') in the output voltage treatment circuit, execution in step 1.2.4 then;
Step 1.2.3, output error signal ev (n) give digital PI compensator (103), and fast dynamic response circuit (104) is according to output voltage V O(t) parameter of digital PI compensator (103) is regulated in variation, and the output of digital PI compensator (103) enters the Ton counting circuit (105) in the duty ratio generation circuit;
Step 1.2.4 passes through notch filter (104 ') with output error signal ev (n), after eliminating the interference of twice power frequency ripple, export to digital PI compensator (103), the output of digital PI compensator (103) enters the Ton counting circuit (105) in the duty ratio generation circuit.
8. the pfc circuit based on the delta-sigma modulation technique as claimed in claim 5 is characterized in that, described step 5 comprises following steps:
Step 5.1, switch periods signal T determine the counting step of each switch periods;
Step 5.2, when the count value of the counter of digital pulse width modulation circuit (108) reaches the value of pulse width signal Pw, the state of switch controlling signal CS overturns, conducting and the closed condition of diverter switch pipe SW.
CN201110110424XA 2011-04-29 2011-04-29 PFC (power factor correction) circuit based on delta-sigma modulation technique and duty ratio control method thereof Pending CN102255490A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201110110424XA CN102255490A (en) 2011-04-29 2011-04-29 PFC (power factor correction) circuit based on delta-sigma modulation technique and duty ratio control method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201110110424XA CN102255490A (en) 2011-04-29 2011-04-29 PFC (power factor correction) circuit based on delta-sigma modulation technique and duty ratio control method thereof

Publications (1)

Publication Number Publication Date
CN102255490A true CN102255490A (en) 2011-11-23

Family

ID=44982516

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110110424XA Pending CN102255490A (en) 2011-04-29 2011-04-29 PFC (power factor correction) circuit based on delta-sigma modulation technique and duty ratio control method thereof

Country Status (1)

Country Link
CN (1) CN102255490A (en)

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103066844A (en) * 2012-12-18 2013-04-24 南京信息工程大学 Control method for average current on input side of buck converter
CN103296904A (en) * 2012-02-29 2013-09-11 黄煜梅 Power-factor correction constant current controller and control method
CN103516191A (en) * 2012-06-29 2014-01-15 珠海格力电器股份有限公司 Power-factor correction method and circuit and switching power supply
CN104852565A (en) * 2014-02-13 2015-08-19 英飞凌科技奥地利有限公司 Power factor corrector timing control with efficient power factor and THD
CN105186854A (en) * 2015-10-09 2015-12-23 安徽师范大学 DSP-based digital PFC acquisition control system and method
CN105763063A (en) * 2016-04-12 2016-07-13 金陵科技学院 Single tube converter having RCD clamping function and control method therefor
CN105991050A (en) * 2015-03-18 2016-10-05 意法半导体股份有限公司 Method and device for high-power-factor flyback converter
CN106487215A (en) * 2016-11-11 2017-03-08 南京航空航天大学 CRM boost PFC changer changes the optimal control of ON time
CN106849655A (en) * 2015-11-02 2017-06-13 英飞凌科技股份有限公司 For the feed forward circuit of the DC DC converters with digital control loop
CN107196656A (en) * 2016-03-15 2017-09-22 联发科技(新加坡)私人有限公司 A kind of signal calibration circuit and signal calibration method
CN107248808A (en) * 2017-06-16 2017-10-13 哈尔滨工程大学 A kind of power converter control circuit of achievable controller parameter Self-tuning System
CN107959412A (en) * 2016-10-18 2018-04-24 东元电机股份有限公司 The control method of active power factor correction circuit and pulse width adjustment signal
US10051698B2 (en) 2016-06-30 2018-08-14 Stmicroelectronics S.R.L. Control method and device employing primary side regulation in a quasi-resonant AC/DC flyback converter without analog divider and line-sensing
US10128761B2 (en) 2014-12-16 2018-11-13 Stmicroelectronics S.R.L. Control method and device employing primary side regulation in a quasi-resonant AC/DC flyback converter
US10181796B2 (en) 2015-03-06 2019-01-15 Stmicroelectronics S.R.L. Control method and device for quasi-resonant high-power-factor flyback converter
US10439489B1 (en) 2018-07-04 2019-10-08 Chicony Power Technology Co., Ltd. Hybrid-mode boost power factor corrector and method of operating the same
CN111600484A (en) * 2019-02-20 2020-08-28 联合汽车电子有限公司 Closed-loop control system of power electronic converter
CN112398340A (en) * 2020-10-27 2021-02-23 浙江大学 Switching frequency switching and data modulation method and control system for peak current control mode
CN112511031A (en) * 2020-11-25 2021-03-16 华中科技大学 Inverter based on delta-sigma and PID control and control method
CN113315391A (en) * 2021-04-29 2021-08-27 武汉华海通用电气有限公司 Digital PFC circuit
CN113364323A (en) * 2021-06-29 2021-09-07 中车青岛四方车辆研究所有限公司 Pulse density-based auxiliary converter control system and method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101185044A (en) * 2005-04-28 2008-05-21 国际整流器公司 Digital implementation of power factor correction
US20080310201A1 (en) * 2007-06-15 2008-12-18 The Regents Of The University Of Colorado Digital Power Factor Correction
US20090191837A1 (en) * 2008-01-30 2009-07-30 Kartik Nanda Delta Sigma Modulator with Unavailable Output Values

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101185044A (en) * 2005-04-28 2008-05-21 国际整流器公司 Digital implementation of power factor correction
US20080310201A1 (en) * 2007-06-15 2008-12-18 The Regents Of The University Of Colorado Digital Power Factor Correction
US20090191837A1 (en) * 2008-01-30 2009-07-30 Kartik Nanda Delta Sigma Modulator with Unavailable Output Values

Cited By (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103296904A (en) * 2012-02-29 2013-09-11 黄煜梅 Power-factor correction constant current controller and control method
CN103296904B (en) * 2012-02-29 2015-05-13 上海莱狮半导体科技有限公司 Power-factor correction constant current controller and control method
CN103516191A (en) * 2012-06-29 2014-01-15 珠海格力电器股份有限公司 Power-factor correction method and circuit and switching power supply
CN103516191B (en) * 2012-06-29 2015-11-04 珠海格力电器股份有限公司 Power factor correcting method, circuit and Switching Power Supply
CN103066844A (en) * 2012-12-18 2013-04-24 南京信息工程大学 Control method for average current on input side of buck converter
CN104852565B (en) * 2014-02-13 2017-11-24 英飞凌科技奥地利有限公司 The SECO of power factor corrector with high-efficiency power factor and THD
CN104852565A (en) * 2014-02-13 2015-08-19 英飞凌科技奥地利有限公司 Power factor corrector timing control with efficient power factor and THD
US10468991B2 (en) 2014-12-16 2019-11-05 Stmicroelectronics S.R.L. Control method and device employing primary side regulation in a quasi-resonant AC/DC flyback converter
US10128761B2 (en) 2014-12-16 2018-11-13 Stmicroelectronics S.R.L. Control method and device employing primary side regulation in a quasi-resonant AC/DC flyback converter
US10181796B2 (en) 2015-03-06 2019-01-15 Stmicroelectronics S.R.L. Control method and device for quasi-resonant high-power-factor flyback converter
CN105991050A (en) * 2015-03-18 2016-10-05 意法半导体股份有限公司 Method and device for high-power-factor flyback converter
CN105991050B (en) * 2015-03-18 2019-09-03 意法半导体股份有限公司 Method and apparatus for High Power Factor flyback converter
CN105186854A (en) * 2015-10-09 2015-12-23 安徽师范大学 DSP-based digital PFC acquisition control system and method
CN106849655A (en) * 2015-11-02 2017-06-13 英飞凌科技股份有限公司 For the feed forward circuit of the DC DC converters with digital control loop
CN107196656B (en) * 2016-03-15 2020-11-06 联发科技(新加坡)私人有限公司 Signal calibration circuit and signal calibration method
CN107196656A (en) * 2016-03-15 2017-09-22 联发科技(新加坡)私人有限公司 A kind of signal calibration circuit and signal calibration method
CN105763063A (en) * 2016-04-12 2016-07-13 金陵科技学院 Single tube converter having RCD clamping function and control method therefor
CN105763063B (en) * 2016-04-12 2019-01-29 金陵科技学院 A kind of the single tube converter and its control method of band RCD clamp
US10051698B2 (en) 2016-06-30 2018-08-14 Stmicroelectronics S.R.L. Control method and device employing primary side regulation in a quasi-resonant AC/DC flyback converter without analog divider and line-sensing
CN107959412A (en) * 2016-10-18 2018-04-24 东元电机股份有限公司 The control method of active power factor correction circuit and pulse width adjustment signal
CN107959412B (en) * 2016-10-18 2020-06-02 东元电机股份有限公司 Active power factor correction circuit and control method of pulse width adjusting signal
CN106487215A (en) * 2016-11-11 2017-03-08 南京航空航天大学 CRM boost PFC changer changes the optimal control of ON time
CN106487215B (en) * 2016-11-11 2019-04-09 南京航空航天大学 The optimal control of CRM boost PFC converter variation turn-on time
CN107248808A (en) * 2017-06-16 2017-10-13 哈尔滨工程大学 A kind of power converter control circuit of achievable controller parameter Self-tuning System
CN107248808B (en) * 2017-06-16 2019-07-16 哈尔滨工程大学 A kind of power converter control circuit of achievable controller parameter Self-tuning System
US10439489B1 (en) 2018-07-04 2019-10-08 Chicony Power Technology Co., Ltd. Hybrid-mode boost power factor corrector and method of operating the same
CN111600484A (en) * 2019-02-20 2020-08-28 联合汽车电子有限公司 Closed-loop control system of power electronic converter
CN111600484B (en) * 2019-02-20 2021-09-28 联合汽车电子有限公司 Closed-loop control system of power electronic converter
CN112398340A (en) * 2020-10-27 2021-02-23 浙江大学 Switching frequency switching and data modulation method and control system for peak current control mode
CN112398340B (en) * 2020-10-27 2022-01-04 浙江大学 Switching frequency switching and data modulation method and control system for peak current control mode
CN112511031A (en) * 2020-11-25 2021-03-16 华中科技大学 Inverter based on delta-sigma and PID control and control method
CN112511031B (en) * 2020-11-25 2021-10-08 华中科技大学 Inverter based on delta-sigma and PID control and control method
CN113315391A (en) * 2021-04-29 2021-08-27 武汉华海通用电气有限公司 Digital PFC circuit
CN113364323A (en) * 2021-06-29 2021-09-07 中车青岛四方车辆研究所有限公司 Pulse density-based auxiliary converter control system and method

Similar Documents

Publication Publication Date Title
CN102255490A (en) PFC (power factor correction) circuit based on delta-sigma modulation technique and duty ratio control method thereof
CN102801329B (en) High-efficiency and low-loss AC/DC (Alternating Current/Direct Current) power supply circuit and control method thereof
CN105391296B (en) PFC in power inverter
Kim et al. Control of multiple single-phase PFC modules with a single low-cost DSP
CN103296904A (en) Power-factor correction constant current controller and control method
CN104038045B (en) high power factor correction control circuit and device
CN101268603A (en) Digital power factor correction controller and AC-to-DC power supply including same
CN101814825A (en) Linear-regulated PFC (Power Factor Correction) control circuit and control method
CN101540507B (en) Compensating three-phase active power factor correcting circuit
CN201754560U (en) Circuit capable of realizing PFC constant-flow parallel connection
CN100433513C (en) Method for controlling power-factor correct circuit
TW201524095A (en) Power factor correction circuit of power converter
CN110518818A (en) CRM decompression-flyback pfc converter of fixed-frequency control
CN102195292A (en) Power factor correcting device
CN206422703U (en) A kind of single-phase AC DC converters corrected based on high power factor
CN204578355U (en) A kind of quadratic form Buck power factor correcting converter
CN203708561U (en) BOOST-type semiconductor illumination drive circuit based on differential tracing
Ye et al. Digital implementation of a unity-power-factor constant-frequency DCM boost converter
CN201199672Y (en) Flyback converting device with single-stage power factor calibrating circuit
CN103560662B (en) A kind of PFC control method and control device
CN103117654B (en) Active power-factor correction circuit and related controller
Dung et al. A new digital control strategy of boost pfc at high-line light-load condition
CN208046458U (en) A kind of novel C RPS power supplys
CN207304013U (en) The power factor correction circuit compared based on stagnant ring
CN110572023A (en) PFC circuit, current compensation method of input capacitor of PFC circuit and power conversion circuit

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C02 Deemed withdrawal of patent application after publication (patent law 2001)
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20111123