CN110491831A - A kind of method making through-hole and device obtained - Google Patents
A kind of method making through-hole and device obtained Download PDFInfo
- Publication number
- CN110491831A CN110491831A CN201910680978.XA CN201910680978A CN110491831A CN 110491831 A CN110491831 A CN 110491831A CN 201910680978 A CN201910680978 A CN 201910680978A CN 110491831 A CN110491831 A CN 110491831A
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- Prior art keywords
- hole
- photoresist
- metal layer
- hard mask
- development
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5283—Cross-sectional geometry
Abstract
The present invention discloses a kind of method for making through-hole and device obtained, and wherein method includes the following steps: in the first photoresist of device front surface coated;Development is exposed in the position of through-hole to be produced;Ion(ic) etching is carried out to device front, removes the first photoresist after etching into the hole of predetermined depth, in inner hole deposition product the first metal layer;In device back side sputter hard mask;The second photoresist is coated on the hard mask;It is exposed development in the position of through-hole to be produced, the etch hard mask at development;Ion(ic) etching is carried out to the device back side, etches into the first metal layer bottom surface;The second photoresist is removed, in inner hole deposition product second metal layer.This programme is etched by front and back sides, so as to realize the through-hole of the thick device of production.And by the first metal layer bottom structure, change the directionality of ion in through-hole, so that through-hole side wall is more smooth, improve the control ability to through-hole pattern.
Description
Technical field
The present invention relates to through-hole of semi-conductor device production field more particularly to a kind of method for making through-hole and devices obtained
Part.
Background technique
Existing substrate (such as gallium arsenide substrate) makes through-hole, can carry out exposure mask using photoresist, then ion bombardment is non-
The mode of isotropic etching carries out through-hole production, and deposited metal is for being electrically connected in through-hole.But the technology be only applicable to it is thin
The through-hole production of GaAs substrate (such as thickness is less than 100um), being unable to satisfy thick GaAs substrate (such as 200um or so) through-hole production
Demand.
Summary of the invention
For this reason, it may be necessary to provide a kind of method for making through-hole and device obtained, solve that thick through-hole can not make is asked
Topic.
To achieve the above object, a kind of method for making through-hole is inventor provided, is included the following steps:
In the first photoresist of device front surface coated;
Development is exposed in the position of through-hole to be produced;
Ion(ic) etching is carried out to device front, removes the first photoresist after etching into the hole of predetermined depth, in inner hole deposition product the
One metal layer;
In device back side sputter hard mask;
The second photoresist is coated on the hard mask;
It is exposed development in the position of through-hole to be produced, the etch hard mask at development;
Ion(ic) etching is carried out to the device back side, etches into the first metal layer bottom surface;
The second photoresist is removed, in inner hole deposition product second metal layer.
Further, it is further comprised the steps of: after depositing the first metal layer and before the sputter hard mask of the device back side
Cured adhesive glass plate is applied in device front, and grinding is carried out to device bottom surface and is thinned.
Further, the depth of device front to the first metal layer bottom is less than the device back side to the first metal layer bottom
Depth.
Further, development of the development opening less than the second photoresist of the first photoresist is open.
Further, the hard mask is metal.
Further, the device is gallium arsenide substrate.
And the present invention provides a kind of device with through-hole, the device is by a kind of above-mentioned method system for making through-hole
.
It is different from the prior art, above-mentioned technical proposal is etched by front and back sides, so as to realize the thick device of production
The through-hole of part.And by the first metal layer bottom structure, change the directionality of ion in through-hole, so that through-hole side wall is more flat
It is sliding, improve the control ability to through-hole pattern.
Detailed description of the invention
Fig. 1 is process flow chart described in the embodiment of the present invention;
Fig. 2 is the structure chart after device front-side etch described in the embodiment of the present invention;
Fig. 3 is the structure chart that the first metal layer has been made described in the embodiment of the present invention;
Fig. 4 is the structure chart after waxing and adhesive glass plate described in the embodiment of the present invention;
Fig. 5 is the structure chart of device back etched described in the embodiment of the present invention;
Fig. 6 is the device that through-hole has been made described in the embodiment of the present invention.
Description of symbols:
1, device;
2, the first photoresist;
3, the first metal layer;
10, through-hole to be produced;
5, cured;
6, glass plate;
7, hard mask;
8, the second photoresist;
9, second metal layer.
Specific embodiment
Technology contents, construction feature, the objects and the effects for detailed description technical solution, below in conjunction with specific reality
It applies example and attached drawing is cooperated to be explained in detail.
Fig. 1 to Fig. 6 is please referred to, the present embodiment provides a kind of method for making through-hole, this method is used in semiconductor devices
Upper carry out aperture, semiconductor devices such as can be gallium arsenide substrate.The easy process flow chart of the present invention is as shown in Figure 1, technique
The first step includes front-side etch, is specifically included: in 1 the first photoresist of front surface coated of device.Then in the position of through-hole 10 to be produced
It is exposed development, then the first photoresist will form opening in the position of through-hole to be produced.Ion erosion then is carried out to device front
It carves, it can be using using BCl3、Cl2Equal gases carry out ICP (inductively coupled plasma) etching to aperture.It etches into default deep
Front-side etch processing step is thus completed in the hole of degree.Then remove the first photoresist, inner hole deposition product the first metal layer 3, first
Metal layer can be used for the electrical connection in through-hole, and bottom can be used for subsequent etching and stop, and material can be metal Au.
Before carrying out the operation of the device back side, if thickness of detector is thicker, need to carry out thickness of detector it is thinned, when
So, thinned without carrying out if thickness of detector has met technique requirement.Thinned step includes: to apply cured 5 in device front
Adhesive glass plate 6, and grinding is carried out to device bottom surface and is thinned.Apply it is cured can protect device front, blue treasured can be used in glass plate
Subsequent grinding may be implemented in stone glass plate.
The etching at the device back side is then carried out, the sputter hard mask 7 at the device back side coats the second photoresist 8 on the hard mask;
It is exposed development in the position of through-hole 10 to be produced, the etch hard mask at development;Ion(ic) etching, erosion are carried out to the device back side
It is carved into the first metal layer bottom surface;The second photoresist is removed, in inner hole deposition product second metal layer 9, second metal layer material can be gold
Belong to Au.Hard mask stops for subsequent etching, can be the exposure mask that hardness is higher than photoresist, as nitride mask or metal are covered
Film can use wet etching mode to hard mask etching here such as titanium tungsten gold metal (TiW/Au).When etching, by
Etch-rate in different holes may have significant change, and it is attached that the etching of device back side some regions reaches the first metal layer bottom
Closely, some regions are not up to the first metal layer bottom.Overetch is carried out in the presence of the first metal layer bottom, can be allowed not
The region for reaching the first metal layer bottom continues to etch down, has arrived at the region of the first metal layer bottom in the first metal layer
Continue to etch under stopping in bottom.In the case where the first metal layer bottom stops, on the one hand overetch can carry out " the wedge angle in through-hole
On the one hand the control ability to through-hole pattern can be improved again, improve the second metal that is, so that through-hole side wall is more smooth for angle "
The reliability of layer plating, the first metal layer and second metal layer realize electrical connection in through-hole, have been achieved to thicker device
Electrical connection in the through-hole production of part and through-hole.
For the step of carrying out subsequent technique, some embodiments further comprise the steps of: paraffin removal and glass plate, obtain such as Fig. 6
Structure.The shape covered is not easy without the metals such as wedge angle and turning in the structure through-hole, and improve sputter and plating metal can
By property.
Further, development of the development opening less than the second photoresist of the first photoresist is open.It is may be implemented in this way in device
The back side to the overetch in device vias so that ionized gas under the action of the first metal layer bottom to the wedge angle in through-hole into
Row polishing, so that hole side wall is more smooth.Similarly, the depth of device front to the first metal layer bottom is less than the device back side and arrives
The depth of the first metal layer bottom, i.e., positive etch depth might be less that back etched depth, all be to allow the first gold medal in this way
Belong to the positive aperture at layer bottom and be greater than the back side, so as to realize the overetch at the back side, to realize to the wedge angle in through-hole
It polishes.
In above-described embodiment, determination can be actually needed in the predetermined depth of front-side etch, in a practical embodiments, such as
Thickness of detector may be greater than 200um's, and the thickness of the first photoresist and the second photoresist can select 20um, and front-side etch is preset
Depth can be 50um, and the thickness after device is thinned can be 200um, and then the depth of back etched can be 150um, and first
Photoresist front aperture is less than back side aperture about 20um.
And the present invention provides a kind of device with through-hole, the device is by a kind of above-mentioned method system for making through-hole
.The device as made from this method, through-hole side wall is more smooth, improves the reliability of subsequent sputter and plating metal.
It should be noted that being not intended to limit although the various embodiments described above have been described herein
Scope of patent protection of the invention.Therefore, it based on innovative idea of the invention, change that embodiment described herein is carried out and is repaired
Change, or using equivalent structure or equivalent flow shift made by description of the invention and accompanying drawing content, it directly or indirectly will be with
Upper technical solution is used in other related technical areas, is included within scope of patent protection of the invention.
Claims (7)
1. a kind of method for making through-hole, which comprises the steps of:
In the first photoresist of device front surface coated;
Development is exposed in the position of through-hole to be produced;
Ion(ic) etching is carried out to device front, removes the first photoresist after etching into the hole of predetermined depth, in inner hole deposition the first gold medal of product
Belong to layer;
In device back side sputter hard mask;
The second photoresist is coated on the hard mask;
It is exposed development in the position of through-hole to be produced, the etch hard mask at development;
Ion(ic) etching is carried out to the device back side, etches into the first metal layer bottom surface;
The second photoresist is removed, in inner hole deposition product second metal layer.
2. a kind of method for making through-hole according to claim 1, it is characterised in that: after depositing the first metal layer and
It is further comprised the steps of: before the sputter hard mask of the device back side
Cured adhesive glass plate is applied in device front, and grinding is carried out to device bottom surface and is thinned.
3. a kind of method for making through-hole according to claim 1, which is characterized in that device front to the first metal layer bottom
The depth in portion is less than the device back side to the depth of the first metal layer bottom.
4. a kind of method for making through-hole according to claim 1, which is characterized in that the development opening of the first photoresist is less than
The development of second photoresist is open.
5. according to claim 1 to a kind of method for making through-hole described in 4 any one, it is characterised in that: the hard mask
For metal.
6. according to claim 1 to a kind of method for making through-hole described in 4 any one, it is characterised in that: the device is
Gallium arsenide substrate.
7. a kind of device with through-hole, it is characterised in that: device one kind as described in claims 1 to 6 any one
The method for making through-hole is made.
Priority Applications (1)
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CN201910680978.XA CN110491831B (en) | 2019-07-26 | 2019-07-26 | Method for manufacturing through hole and manufactured device |
Applications Claiming Priority (1)
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CN201910680978.XA CN110491831B (en) | 2019-07-26 | 2019-07-26 | Method for manufacturing through hole and manufactured device |
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CN110491831A true CN110491831A (en) | 2019-11-22 |
CN110491831B CN110491831B (en) | 2022-06-14 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114566461A (en) * | 2022-03-02 | 2022-05-31 | 成都海威华芯科技有限公司 | Semiconductor device deep back hole manufacturing method and device based on front and back side through holes |
Citations (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07193126A (en) * | 1993-12-27 | 1995-07-28 | Nec Corp | Semiconductor device and its manufacture |
JP2001015654A (en) * | 1999-07-01 | 2001-01-19 | Hitachi Ltd | Interposer, manufacturing thereof, and circuit module using the same |
KR20030048956A (en) * | 2001-12-13 | 2003-06-25 | 주식회사 하이닉스반도체 | Method of forming a metal-via plug in a semiconductor device |
EP1519410A1 (en) * | 2003-09-25 | 2005-03-30 | Interuniversitair Microelektronica Centrum vzw ( IMEC) | Method for producing electrical through hole interconnects and devices made thereof |
CN101000872A (en) * | 2006-01-11 | 2007-07-18 | 日月光半导体制造股份有限公司 | Wafer processing method |
CN101114592A (en) * | 2006-07-27 | 2008-01-30 | 三洋电机株式会社 | Semiconductor device and method of manufacturing the same |
CN101281883A (en) * | 2008-05-26 | 2008-10-08 | 日月光半导体制造股份有限公司 | Method for forming threading hole on substrate |
US20100244247A1 (en) * | 2009-03-27 | 2010-09-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Via structure and via etching process of forming the same |
CN101877328A (en) * | 2009-04-30 | 2010-11-03 | 英飞凌科技股份有限公司 | Be used to make the method that conduction connects |
US20120056330A1 (en) * | 2010-09-07 | 2012-03-08 | Samsung Electronics Co., Ltd. | Semiconductor device |
CN102543782A (en) * | 2012-02-22 | 2012-07-04 | 苏州晶方半导体科技股份有限公司 | Switching and encapsulating structure and forming method thereof |
CN102906864A (en) * | 2010-05-26 | 2013-01-30 | Spp科技股份有限公司 | Plasma etching method |
CN103413768A (en) * | 2013-08-26 | 2013-11-27 | 江阴长电先进封装有限公司 | Method for manufacturing silicon substrate switchover plate for electronic device packaging |
CN105304611A (en) * | 2015-12-01 | 2016-02-03 | 北京理工大学 | Copper nanotube vertical interconnection structure and manufacturing method thereof |
CN110010548A (en) * | 2018-12-26 | 2019-07-12 | 杭州臻镭微波技术有限公司 | A kind of cavity structure production method of bottom belt pad |
-
2019
- 2019-07-26 CN CN201910680978.XA patent/CN110491831B/en active Active
Patent Citations (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07193126A (en) * | 1993-12-27 | 1995-07-28 | Nec Corp | Semiconductor device and its manufacture |
JP2001015654A (en) * | 1999-07-01 | 2001-01-19 | Hitachi Ltd | Interposer, manufacturing thereof, and circuit module using the same |
KR20030048956A (en) * | 2001-12-13 | 2003-06-25 | 주식회사 하이닉스반도체 | Method of forming a metal-via plug in a semiconductor device |
EP1519410A1 (en) * | 2003-09-25 | 2005-03-30 | Interuniversitair Microelektronica Centrum vzw ( IMEC) | Method for producing electrical through hole interconnects and devices made thereof |
CN101000872A (en) * | 2006-01-11 | 2007-07-18 | 日月光半导体制造股份有限公司 | Wafer processing method |
CN101114592A (en) * | 2006-07-27 | 2008-01-30 | 三洋电机株式会社 | Semiconductor device and method of manufacturing the same |
CN101281883A (en) * | 2008-05-26 | 2008-10-08 | 日月光半导体制造股份有限公司 | Method for forming threading hole on substrate |
US20100244247A1 (en) * | 2009-03-27 | 2010-09-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Via structure and via etching process of forming the same |
CN101877328A (en) * | 2009-04-30 | 2010-11-03 | 英飞凌科技股份有限公司 | Be used to make the method that conduction connects |
CN102906864A (en) * | 2010-05-26 | 2013-01-30 | Spp科技股份有限公司 | Plasma etching method |
US20120056330A1 (en) * | 2010-09-07 | 2012-03-08 | Samsung Electronics Co., Ltd. | Semiconductor device |
CN102543782A (en) * | 2012-02-22 | 2012-07-04 | 苏州晶方半导体科技股份有限公司 | Switching and encapsulating structure and forming method thereof |
CN103413768A (en) * | 2013-08-26 | 2013-11-27 | 江阴长电先进封装有限公司 | Method for manufacturing silicon substrate switchover plate for electronic device packaging |
CN105304611A (en) * | 2015-12-01 | 2016-02-03 | 北京理工大学 | Copper nanotube vertical interconnection structure and manufacturing method thereof |
CN110010548A (en) * | 2018-12-26 | 2019-07-12 | 杭州臻镭微波技术有限公司 | A kind of cavity structure production method of bottom belt pad |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114566461A (en) * | 2022-03-02 | 2022-05-31 | 成都海威华芯科技有限公司 | Semiconductor device deep back hole manufacturing method and device based on front and back side through holes |
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