CN110473871B - Constant current device and manufacturing method thereof - Google Patents
Constant current device and manufacturing method thereof Download PDFInfo
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- CN110473871B CN110473871B CN201910837564.3A CN201910837564A CN110473871B CN 110473871 B CN110473871 B CN 110473871B CN 201910837564 A CN201910837564 A CN 201910837564A CN 110473871 B CN110473871 B CN 110473871B
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- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
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- H01L29/76—Unipolar devices, e.g. field effect transistors
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
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Abstract
A constant current device and a manufacturing method thereof belong to the technical field of semiconductor devices. According to the invention, two independent first N-type regions and second N-type regions are formed on a P-type substrate in a diffusion or epitaxial mode, a first P-type heavily doped region and a first N-type heavily doped region are arranged in the first N-type region to form a constant current diode structure, and a second P-type heavily doped region and a second N-type heavily doped region are arranged in the second N-type region to form a longitudinal PNP triode structure. The constant current of the constant current diode provides current for the PNP triode base region, so that the total output current of the whole constant current device is changed into (1+beta) times of that of the traditional constant current diode, the current of the unit area of the device is greatly improved, and the area and the cost of a chip are saved; the positive temperature coefficient of the amplification coefficient beta of the PNP triode compensates the negative temperature coefficient of constant current of the constant current diode, and the temperature stability of the device is improved; when the P-type substrate is made of light doped materials, the breakdown voltage of the PNP triode and the constant current diode is improved, and the working voltage range of the semiconductor device is widened.
Description
Technical Field
The invention belongs to the technical field of semiconductor devices, and particularly relates to a constant current device and a manufacturing method thereof.
Background
The constant current diode is a semiconductor two-terminal constant current device. After the constant current diode is connected into the loop according to the polarity, the constant current diode can output constant current in the forward direction and cut off in the reverse direction, and the application is simple and convenient. At present, the constant current diode is widely applied to electronic circuits such as a direct current stabilized voltage supply, an alternating current-direct current amplifier, a pulse waveform generator, a protection circuit and the like.
The conventional constant current diode is a Junction Field-Effect Transistor (JFET) structure, and as shown in fig. 1, the conventional constant current diode includes: the semiconductor device comprises a P-type substrate 1, an N-type diffusion well region 2, a P-type heavily doped region 3, an N-type heavily doped region 4, an oxide layer 5, a metal electrode 6, a metal electrode 7 and a metal electrode 9, wherein the metal electrode 6 is a gate-source short-circuited electrode, the metal electrode 7 is a drain electrode, and the metal electrode 9 is a substrate electrode. The P-type substrate 1 and the P-type heavily doped region 3 are equivalent to two control gate structures of the JFET, and the constant current diode forms constant current characteristics by shorting the grid sources of the JFET.
However, for the traditional constant current diode, the current capacity of the traditional constant current diode mainly depends on the channel width, the channel width is limited by the front electrode pattern, the channel width area per unit size is smaller, the current density of the constant current diode is not high, the chip area is required to be increased to increase the current value, and the manufacturing cost is increased; on the other hand, if the current value is increased by reducing the channel length, the influence of the channel length modulation effect on the output characteristic is increased, so that the constant current capacity is reduced, and therefore, the traditional constant current diode has a contradictory relation between the current capacity and the constant current characteristic; at present, the conventional constant current diode has a large negative temperature coefficient, and is poor in performance due to high Wen Hengliu.
Disclosure of Invention
Aiming at the problems of small current density and poor high Wen Hengliu performance of the traditional constant current diode, the invention provides a constant current device and a manufacturing method thereof, wherein the constant current device comprises a constant current diode and a PNP triode, the constant current of the constant current diode is amplified by the PNP triode, and the current value per unit area is rapidly improved; in addition, the PNP triode current amplification coefficient has positive temperature characteristic, and the traditional constant current diode current has negative temperature characteristic, so that the constant current device has better temperature stability.
The technical scheme of the invention is as follows:
a constant current device comprises a P-type substrate and a first metal electrode arranged below the P-type substrate;
the constant current device further includes:
the first N-type region and the second N-type region are arranged in the P-type substrate and are positioned on two sides of the top of the P-type substrate; the first N-type region and the second N-type region are N-type diffusion well regions, or the first N-type region and the second N-type region are N-type epitaxial layers;
the P-type isolation region is arranged between the first N-type region and the second N-type region and is connected with the first N-type region and the second N-type region respectively;
the first P type heavy doping region is arranged in the first N type region, the first N type heavy doping region is arranged in the first N type region and is positioned at two sides of the first P type heavy doping region, and the first P type heavy doping region and the first N type heavy doping region are both positioned at the top of the first N type region;
the second P type heavily doped region and the second N type heavily doped region are arranged in the second N type region and are positioned at the top of the second N type region, and the second N type heavily doped region is positioned between the second P type heavily doped region and the first N type region;
an oxide layer arranged on the upper surface of the constant current device;
the second metal electrode is arranged on the upper surface of the first N-type heavy doping region at one side of the first P-type heavy doping region far away from the second N-type region and the upper surface of the first P-type heavy doping region, and the second metal electrodes on the first P-type heavy doping region and the first N-type heavy doping region penetrate through the oxide layer and are connected with each other;
the third metal electrodes are arranged on the upper surfaces of the first N-type heavily doped region and the upper surface of the second N-type heavily doped region at one side of the first P-type heavily doped region, close to the second N-type region, and penetrate through the oxide layer and are connected with each other;
and the fourth metal electrode is arranged on the upper surface of the second P-type heavily doped region and penetrates through the oxide layer.
Specifically, the first N-type region and the second N-type region are both N-type diffusion well regions, the P-type isolation region is the P-type substrate, the P-type diffusion well region or a composite structure, the composite structure comprises a third P-type heavily doped region and a P-type buried layer which is positioned below the third P-type heavily doped region and connected with the third P-type heavily doped region, and the lower part of the P-type buried layer is positioned inside the P-type substrate.
Specifically, when the first N-type region and the second N-type region are both N-type epitaxial layers, the P-type isolation region is a P-type diffusion well region or a composite structure, the composite structure is a third P-type heavily doped region and a P-type buried layer which is positioned below the third P-type heavily doped region and connected with the third P-type heavily doped region, and the lower part of the P-type buried layer is positioned inside the P-type substrate.
Specifically, the second metal electrode extends to two sides to form a field plate structure, the third metal electrode extends to two sides to form a field plate structure, and the field plate structure is located above the interface between the first N-type region and the first P-type heavily doped region, or above the interface between the first N-type region and the first N-type heavily doped region, or above the interface between the second N-type region and the second N-type heavily doped region.
Specifically, the P-type substrate is of a light doping type.
A manufacturing method of a constant current device comprises the following steps:
step one: a P-type substrate is manufactured by using a P-type semiconductor material, a first N-type region and a second N-type region are formed on the upper layer of the P-type substrate in an epitaxial or diffusion mode, and a P-type isolation region respectively connected with the first N-type region and the second N-type region is arranged between the first N-type region and the second N-type region;
step two, pre-oxygen before injection, window etching and etching redundant oxide layers after injection and junction pushing are carried out on the first N-type region and the second N-type region to form a first P-type heavily doped region positioned on the upper layer of the first N-type region and a second P-type heavily doped region positioned on the upper layer of the second N-type region;
step three, pre-oxygen before injection, window etching and post-injection etching redundant oxide layers are carried out on the first N-type region to form a first N-type heavily doped region which is positioned on the upper layer of the first N-type region and distributed on two sides of the first P-type heavily doped region, and pre-oxygen before injection, window etching and post-injection etching redundant oxide layers are carried out on the second N-type region to form a second N-type heavily doped region which is positioned on the upper layer of the second N-type region and distributed between the second P-type heavily doped region and the first N-type region;
step four, pre-oxidizing before depositing on the upper surface of the constant current device, and then depositing an oxide layer and compacting;
photoetching an ohmic hole above the first P type heavily doped region, the first N type heavily doped region, the second P type heavily doped region and the second N type heavily doped region, forming a metal electrode by metal to the ohm Kong Dianji and etching, connecting the metal electrode above the first N type heavily doped region, which is far away from one side of the second N type region, of the first P type heavily doped region with the metal electrode above the first P type heavily doped region, and connecting the metal electrode above the first N type heavily doped region, which is near one side of the second N type region, with the metal electrode above the second N type heavily doped region;
and step six, performing metal deposition on the back surface of the P-type substrate to form a metal electrode.
Specifically, the specific method for forming the first N-type region and the second N-type region and setting the P-type isolation region by diffusion in the step comprises the following steps: and pre-oxidizing before injection, window etching and etching redundant oxide layers after injection and junction pushing are carried out on the P-type substrate to form a first N-type region and a second N-type region which are positioned in the P-type substrate and distributed on two sides of the top of the P-type substrate, and the P-type substrate between the first N-type region and the second N-type region is used as the P-type isolation region.
Specifically, the specific method for forming the first N-type region and the second N-type region and setting the P-type isolation region by an epitaxial manner in the step comprises the following steps: pre-oxidizing before injection, window etching and etching an oxide layer after injection are carried out on the P-type substrate to form a P-type buried layer, the upper surface of the P-type substrate is epitaxially formed to form an N-type epitaxial layer, a third P-type heavily doped region positioned on the P-type buried layer is formed in the step, the N-type epitaxial layers on two sides of the third P-type heavily doped region are respectively used as the first N-type region and the second N-type region, and the P-type buried layer and the third P-type heavily doped region are used as the P-type isolation region.
Specifically, the specific method for forming the first N-type region and the second N-type region and setting the P-type isolation region by an epitaxial manner in the step comprises the following steps: and (3) carrying out epitaxy on the upper surface of the P-type substrate to form an N-type epitaxial layer, carrying out pre-oxidation before injection, window etching, high-temperature pushing and junction after injection on the N-type epitaxial layer, and etching an oxide layer to form a P-type diffusion well region, wherein the lower surface of the P-type diffusion well region is in contact with the upper surface of the P-type substrate, the N-type epitaxial layers on two sides of the P-type diffusion well region are respectively used as the first N-type region and the second N-type region, and the P-type diffusion well region is used as the P-type isolation region.
The working principle of the invention is as follows:
in the constant current device provided by the invention, a constant current diode is formed by combining the first N-type region, the first P-type heavily doped region and the first N-type heavily doped region with a P-type substrate, a longitudinal PNP triode is formed by combining the second N-type region, the second P-type heavily doped region and the second N-type heavily doped region with the P-type substrate, and the constant current diode and the PNP triode are isolated by adopting the P-type substrate or other P-type doped isolation structures in the middle. The first P type heavily doped region is a control gate above the constant current diode, the P type substrate is a lower control gate, a first N type region between the two is a conducting channel, the first N type heavily doped region at one side of the first P type heavily doped region far away from the second N type region is a source electrode, the first N type heavily doped region at one side of the first P type heavily doped region near the second N type region is a drain electrode, the upper part of the source electrode is connected with a second metal electrode above the grid electrode, and the constant current diode is a JFET structure with a grid source short circuit. The second N-type region is used as a PNP triode base region, the second P-type heavily doped region in the second N-type region is an emitter region, the second N-type heavily doped region is a base region ohmic contact structure, and the P-type substrate is a collector region to form a longitudinal PNP triode structure. The upper part of a first N-type heavy doping area, which is close to one side of a second N-type area, in the constant current diode is connected with a third metal electrode, which is above the second N-type heavy doping area, in the PNP triode, namely, the drain electrode of the constant current diode is connected with the base electrode of the PNP triode, and the base current of the PNP triode is determined by the constant current value of the constant current diode; the collector current of the PNP triode flows out of the P-type substrate through the second P-type heavily doped region and the second N-type region, and the collector current is equal to beta times of the base current, namely the output current value of the constant current device structure provided by the invention is (1+beta) times of that of the traditional constant current diode.
When the constant current device works in the forward direction, the emitter of the PNP triode is connected with high potential, and the source of the constant current diode is connected with the collector of the PNP triode in a short circuit mode and then connected with low potential. When the emitter voltage is lower than the emitter junction opening voltage (about 0.65V), the constant current diode is in a cut-off state; then, as the voltage of the emitter electrode increases, the voltage between the drain electrode and the source electrode of the constant-current diode increases linearly, the current flowing out of the base electrode of the PNP triode also increases linearly, and the current of the collector electrode of the triode also increases approximately linearly; when the emitter voltage is increased to the sum of the emitter junction starting voltage and the pinch-off voltage of the constant current diode, the base current starts to saturate, and the collector current correspondingly follows to reach a saturated state; then, along with the increase of the emitter voltage, the base current and the collector current of the triode are kept constant, and the constant current output function is completely realized. The constant current of the constant current diode is amplified by the PNP triode, the current value of a unit area is rapidly increased, and the constant current value can be enlarged to be (1+beta) times of that of the traditional constant current diode. The PNP triode current amplification coefficient beta is a positive temperature coefficient, and the constant current value of the constant current diode is a negative temperature coefficient, so that the PNP triode current amplification coefficient beta and the constant current value of the constant current diode can be mutually compensated, and the constant current diode can realize better temperature stability. In addition, when the junction depth of the PNP triode and the constant current diode fluctuates, the current amplification coefficient beta and the constant current of the constant current diode have opposite influence trends, and the whole output current value of the device is more stable.
The beneficial effects of the invention are as follows: the constant current device formed by the constant current diode and the NPN triode can realize a more stable constant current output function, and the amplification effect of the PNP triode improves the current value of the constant current device in unit area, so that the constant current value generated by the constant current device is enlarged to be (1+beta) times of that of the traditional constant current diode; in addition, as the positive temperature characteristic of the PNP triode and the negative temperature characteristic of the constant current diode can be mutually compensated, the constant current diode has better temperature stability, and solves the problems of smaller current density and poor high Wen Hengliu performance of the traditional constant current diode; the working voltage range of the invention is also increased when the P-type substrate is made of light doped material.
Drawings
Fig. 1 is a schematic cross-sectional view of a conventional constant current diode structure.
Fig. 2 is a schematic cross-sectional view of a constant current device structure according to a first embodiment of the present invention.
Fig. 3 is a schematic cross-sectional view of a constant current device structure according to a second embodiment of the present invention.
Fig. 4 is a schematic cross-sectional view of a constant current device structure according to a third embodiment of the present invention.
Fig. 5 is a schematic cross-sectional view of a constant current device structure according to a fourth embodiment of the present invention.
Fig. 6 is an equivalent circuit schematic diagram of a constant current device structure according to the first embodiment of the present invention.
Fig. 7 is a graph showing the comparison of the output characteristic curves of the constant current device structure according to the first embodiment of the present invention and the conventional constant current diode structure.
Fig. 8 (a) -8 (d) are schematic cross-sectional views of a constant current device structure in the manufacturing process according to the first embodiment of the invention, where fig. 8 (a) is an initial P-type substrate sheet; FIG. 8 (b) is a photolithography, implantation and high temperature push-well for N-type diffusion well regions; FIG. 8 (c) shows the P-type heavily doped region implant push junction and the N-type heavily doped region implant; fig. 8 (d) shows the final device structure after deposition of oxide layer and metal and etching.
Fig. 9 (a) -9 (e) are schematic cross-sectional views of a constant current device structure in the manufacturing process according to the fourth embodiment of the present invention, where fig. 9 (a) is an initial P-type substrate sheet; FIG. 9 (b) is a photolithography and implantation of a P-type buried layer; fig. 9 (c) shows the growth of an N-type epitaxial layer, which simultaneously completes the diffusion of a P-type buried layer; FIG. 9 (d) shows the P-type heavily doped region implant push junction and the N-type heavily doped region implant; fig. 9 (e) shows the final device structure after deposition of oxide layer and metal and etching.
Detailed Description
The structure of the constant current device provided by the invention is further described in detail below with reference to the accompanying drawings and specific embodiments. Advantages and features of the invention will be more readily explained from the following description, taken in conjunction with the claims. The drawings herein are in a very simplified form and are to a non-precise scale, merely for convenience and to aid in the description of embodiments of the invention.
Example 1
In this embodiment, an N-type diffusion well region is formed by using a diffusion manner in the first N-type region and the second N-type region. As shown in fig. 2, the constant current device in this embodiment includes a P-type substrate 1, two independent first N-type regions and a second N-type region formed in the P-type substrate 1 and located on two sides of the top of the P-type substrate 1, where the first N-type region is a first N-type diffusion well region 2 on the left side in fig. 2 in this embodiment, and the second N-type region is a second N-type diffusion well region 2 on the right side in fig. 2. The first N-type diffusion well region 2 on the left side is provided with a first P-type heavily doped region 3 and two first N-type heavily doped regions 4 which are respectively positioned on two sides of the first P-type heavily doped region 3, and the first P-type heavily doped region 3 and the two first N-type heavily doped regions 4 are positioned on the top of the first N-type diffusion well region 2. A second P-type heavily doped region 3 and a second N-type heavily doped region 4 are arranged in the second N-type diffusion well region 2 on the right side and positioned at the top of the second N-type diffusion well region 2, and the second N-type heavily doped region 4 is positioned between the second P-type heavily doped region 3 and the first N-type diffusion well region 2. The upper surface of the first N-type heavily doped region 4 and the upper surface of the first P-type heavily doped region 3, which are far away from one side, namely the left side, of the second N-type region 2, of the first P-type heavily doped region 3 are provided with second metal electrodes 6, the upper surface of the first N-type heavily doped region 4 and the upper surface of the second N-type heavily doped region 4, which are close to one side, namely the right side, of the second N-type region 2 of the first P-type heavily doped region 3 are provided with third metal electrodes 7, and the upper surface of the second P-type heavily doped region 3 is provided with fourth metal electrodes 8. The oxide layer 5 is arranged on the upper surface of the whole semiconductor constant current device, the oxide layer 5 does not cover the metal electrode structure, the second metal electrodes 6 on the first P-type heavily doped region 3 and the first N-type heavily doped region 4 penetrate through the oxide layer 5 and are connected with each other, the third metal electrodes 7 on the upper surfaces of the first N-type heavily doped region 4 and the second N-type heavily doped region 4 penetrate through the oxide layer 5 and are connected with each other, and the fourth metal electrodes 8 also penetrate through the oxide layer 5. The back of the whole semiconductor constant current device is also provided with a metal electrode, namely a first metal electrode 9 is arranged below the P-type substrate. In this embodiment, the P-type substrate 1 between the first N-type diffusion well region 2 and the second N-type diffusion well region 2 is used as a P-type isolation region.
The first N-type diffusion well region 2 at the left side and the first P-type heavily doped region 3 and the first N-type heavily doped region 4 in the first N-type diffusion well region are combined with the P-type substrate 1 to form a constant current diode; the second N-type diffusion well region 2 on the right side and the second P-type heavily doped region 3 and the second N-type heavily doped region 4 in the second N-type diffusion well region are combined with the P-type substrate 1 to form a longitudinal PNP triode.
The equivalent circuit structure of the constant current device proposed in this embodiment is shown in fig. 6, and is analyzed by referring to fig. 2, the first P-type heavily doped region 3 in the first N-type diffusion well region 2 on the left side is a control gate above the constant current diode, the P-type substrate 1 is a lower control gate, the first N-type diffusion well region 2 between the two is a conductive channel, the first N-type heavily doped region 4 on the left side of the first P-type heavily doped region 3 is a source, the first N-type heavily doped region 4 on the right side of the first P-type heavily doped region 3 is a drain, and the constant current diode of this portion is a JFET with a gate source shorted structure. The second N-type diffusion well region 2 on the right side is used as a PNP triode base region, the second P-type heavily doped region 3 in the second N-type diffusion well region is an emitter region, the second N-type heavily doped region 4 is a base region ohmic contact structure, and the P-type substrate 1 is a collector region to form a longitudinal PNP triode structure. The drain electrode of the constant current diode is connected with the base electrode of the PNP triode by the third metal electrode 7, and the base current of the PNP triode is determined by the constant current value of the constant current diode; the collector current of the PNP triode flows out from the P-type substrate 1 through the second P-type heavily doped region 3 and the second N-type diffusion well region 2, and the collector current is equal to beta times of the base current, namely the output current value of the constant current device provided by the invention is (1+beta) times of that of the traditional constant current diode.
Example two
As shown in fig. 3, which is a schematic cross-sectional structure of the constant current device structure of the present embodiment, compared with the first embodiment, in the present embodiment, the second metal electrode 6 extends to two sides to form a field plate structure, and the third metal electrode 7 extends to two sides to form a field plate structure, wherein fig. 3 shows that the field plate structure extending to the right side of the second metal electrode 6 is located above the interface between the first N-type region 2 and the first P-type heavily doped region 3, and is a constant current diode gate field plate structure; the field plate structure extending leftwards of the third metal electrode 7 is positioned above the interface of the first N-type region 2 and the first N-type heavily doped region 4 and is a constant current diode drain field plate structure. The grid electrode and the drain electrode of the constant current diode adopt a field plate structure, the existence of the grid electrode field plate assists in exhausting an N-type diffusion well region below, the channel length modulation effect of the constant current diode is relieved, and the stability of output current is improved; the existence of the drain electrode field plate can play a role in modulating the surface electric field distribution, and the breakdown voltage of the constant current diode is improved.
Similarly, the case not shown in fig. 3 further includes that the second metal electrode 6 may extend to the left, the field plate structure formed above the interface between the first N-type region 2 and the first N-type heavily doped region 4, and the third metal electrode 7 may also extend to the right, the field plate structure formed above the interface between the second N-type region 2 and the second N-type heavily doped region 4.
Example III
As shown in fig. 4, a schematic cross-sectional structure of a constant current device structure according to this embodiment is shown, compared with the first embodiment, in this embodiment, an N-type epitaxial layer is formed in an epitaxial manner in the first N-type region and the second N-type region instead of the N-type diffusion well region in the first embodiment, in this embodiment, the first N-type region is the first N-type epitaxial layer 10 on the left side in fig. 4, the second N-type region is the second N-type epitaxial layer 10 on the right side in fig. 4, and a P-type diffusion well region 11 is disposed between the first N-type epitaxial layer 10 and the second N-type epitaxial layer 10 and is communicated with the P-type substrate, and the P-type diffusion well region 11 is used as a P-type isolation region.
Since the doping profile of the N-type diffusion well region follows a Gaussian function, the doping profile has relatively high doping concentration at the surface of the well region, so that a high surface electric field is generated after depletion; in the embodiment, the N-type epitaxial layer is adopted to replace an N-type diffusion well region, so that the surface electric field value of the constant current diode can be reduced under the condition that the introduced impurity dose is the same as the impurity dose introduced by diffusion, and the breakdown voltage is improved; in addition, under the condition of a certain doping total dose, the doping concentration in the channel formed by epitaxy is higher, the channel resistance is lower, and the constant current of the constant current diode is higher.
Example IV
As shown in fig. 5, a schematic cross-sectional structure of a constant current device structure according to the present embodiment is shown, compared with the three phases of the embodiment, the present embodiment adopts a composite structure as a P-type isolation region to replace the P-type diffusion well region 11 of the third embodiment, the third P-type heavily doped region 3 is arranged above the composite structure, the P-type buried layer 12 is arranged below the composite structure, the two are connected with each other, and the P-type buried layer extends into the P-type substrate 1. The P-type isolation region is replaced by the P-type diffusion well region 11 in the third embodiment by a third P-type heavily doped region 3 and a P-type buried layer 12 structure, and the third P-type heavily doped region has a very high doping concentration, so that the effect of assisting in depleting an epitaxial layer can be achieved, and the breakdown voltage value of the constant current diode is improved; on the other hand, the diffusion of the P-type buried layer structure in the epitaxial process reduces the requirement on the junction pushing process of the P-type heavily doped region, so that the isolation is easier to realize.
It should be noted that, although the constant current device in the second embodiment is improved by forming the first N-type region and the second N-type region from the N-type diffusion well region in the first embodiment, the same improvement method (the second metal electrode 6 and the third metal electrode 7 extend to two sides to form the field plate structure) is also applicable to the constant current device in the third embodiment and the fourth embodiment, in which the first N-type region and the second N-type region are formed from the N-type epitaxial layer. Similarly, in the third embodiment, the P-type diffusion well 11 is used as the P-type isolation region, and in the fourth embodiment, the composite structure formed by the third P-type heavily doped region 3 and the P-type buried layer 12 is used as the P-type isolation region, although the description is made in the constant current device formed by the first N-type region and the second N-type region formed by the N-type epitaxial layer, other P-type doping can also be used as the P-type isolation region in the constant current device formed by the first N-type region and the second N-type region formed by the N-type epitaxial layer, and the same method is also applicable to the constant current device formed by the first N-type region and the second N-type region formed by the N-type diffusion well, namely, the composite structure formed by the P-type substrate 1, the P-type diffusion well 11, the third P-type heavily doped region 3 and the P-type buried layer 12 or other P-type doping can also be used as the P-type isolation region.
In addition to the above embodiment, the constant current device provided by the present invention further includes other variations, for example, the junction depth of the first P-type heavily doped region 3 may be equal to or different from the junction depth of the first N-type heavily doped region 4. The first N-type epitaxial layer 10 and the second N-type epitaxial layer 10 may extend to both sides of the device as shown in fig. 4 and 5, and isolation structures such as P-type diffusion well regions 11, composite structures or other P-type doping may be added to both sides of the device. The P-type substrate 1 can be of a light doping type or a heavy doping type, when the P-type substrate 1 is made of a light doping material, the breakdown voltage values of the PNP triode and the constant current diode can be jointly improved, and the working voltage range of the constant current device structure provided by the invention can be enlarged; when the P-type substrate 1 is selected as a heavily doped material, the constant current characteristic is good.
Several methods of manufacturing the constant current device proposed by the present invention are given below.
Method of manufacture I
Fig. 8 (a) to 8 (d) are schematic cross-sectional views of the structure of the constant current device according to the first embodiment of the invention in the manufacturing process.
The first manufacturing method comprises the following steps:
step 1: and (3) taking a P-type semiconductor material such as a silicon wafer as a substrate, pre-oxidizing before the injection of the first N-type diffusion well region 2 and the second N-type diffusion well region 2, performing window etching, and etching an excessive oxide layer after the injection and junction pushing.
Step 2: pre-oxygen is performed before the first P type heavily doped region 3 and the second P type heavily doped region 3 are injected, window etching is performed, and redundant oxide layers are etched after injection pushing junction is performed.
Step 3: pre-oxygen is performed before the first N-type heavily doped region 4 and the second N-type heavily doped region 4 are implanted, window etching is performed, and redundant oxide layers are etched after implantation.
Step 4: pre-oxidizing before depositing, depositing oxide layer 5, and compacting.
Step 5: and photoetching an ohmic hole, depositing metal and etching to form a second metal electrode 6, a third metal electrode 7 and a fourth metal electrode 8.
Step 6: the back metal of the P-type silicon wafer is deposited to form a back metal electrode as the first metal electrode 9.
In the first manufacturing method, a first N-type region 2 and a second N-type region 2 are formed in a diffusion mode, and a P-type substrate 1 is used as a P-type isolation region.
In step 4, because the surface of the entire semiconductor silicon wafer is uneven immediately after the deposition is completed, the silicon wafer needs to be annealed at a specific temperature and under other environmental atmospheres, so that the material forming the oxide layer 5, such as borophosphosilicate glass BPSG, flows on the surface of the silicon wafer, and the surface of the entire silicon wafer becomes relatively flat, which is called as a "densification" process. The push junction in the steps 1 and 2 shows that the semiconductor silicon wafer is heated and annealed after impurity ions are implanted, and the process can eliminate the damage and defects of the silicon wafer caused by ion implantation, and plays roles in activating implanted impurities and the like.
Method of manufacturing II
Fig. 9 (a) to 9 (e) are schematic cross-sectional views of the structure of the constant current device according to the fourth embodiment of the present invention during the manufacturing process.
The second manufacturing method comprises the following steps:
step 1: the P-type semiconductor material such as silicon wafer is used as a substrate, pre-oxygen is performed before the P-type buried layer 12 is injected, window etching is performed, and an oxide layer is etched after the injection.
Step 2: and (4) performing epitaxy on the surface of the P-type substrate 1 to form an N-type epitaxial layer, wherein the N-type epitaxial layer is not isolated.
Step 3: pre-oxygen is performed before the first P type heavily doped region 3, the second P type heavily doped region 3 and the third P type heavily doped region 3 are implanted, window etching is performed, redundant oxide layers are etched after the implantation pushing junction is performed, and at the moment, the third P type heavily doped region 3 isolates the N type epitaxial layers to form a first N type epitaxial layer 10 and a second N type epitaxial layer 10.
Step 4: pre-oxygen is performed before the first N-type heavily doped region 4 and the second N-type heavily doped region 4 are implanted, window etching is performed, and redundant oxide layers are etched after implantation.
Step 5: pre-oxidizing before depositing, depositing oxide layer 5, and compacting.
Step 6: and photoetching an ohmic hole, depositing metal and etching to form a second metal electrode 6, a third metal electrode 7 and a fourth metal electrode 8.
Step 7: the back metal of the P-type silicon wafer is deposited to form a back metal electrode as the first metal electrode 9.
In the second manufacturing method, a first N-type region 2 and a second N-type region 2 are formed in an epitaxial mode, and a composite structure is formed to serve as a P-type isolation region. In the second manufacturing method, step 2 is performed by epitaxy on the surface of the entire P-type substrate 1 to form an N-type epitaxial layer, and the P-type substrate 1 cannot be used as isolation, so that a P-type diffusion well region 11 or a composite structure formed by the third P-type heavily doped region 3 and the P-type buried layer 12 needs to be provided as a P-type isolation region. The specific method for forming the first N-type region and the second N-type region and setting the P-type isolation region in an epitaxial mode comprises the following steps: and (3) carrying out epitaxy on the upper surface of the P-type substrate 1 to form an N-type epitaxial layer, carrying out pre-oxidation before injection, window etching, high-temperature junction pushing and oxide layer etching on the N-type epitaxial layer to form a P-type diffusion well region 11, wherein the lower surface of the P-type diffusion well region 11 is in contact with the upper surface of the P-type substrate 1, the N-type epitaxial layers on two sides of the P-type diffusion well region 11 are respectively used as a first N-type epitaxial layer 10 and a second N-type epitaxial layer 10, and the P-type diffusion well region 11 is used as a P-type isolation region. In the same constant current device in which the first N-type region and the second N-type region are formed by diffusion, a P-type diffusion well region 11 or a composite structure formed by the third P-type heavily doped region 3 and the P-type buried layer 12 may be provided as a P-type isolation region in a similar manner.
As shown in fig. 7, when the output characteristic of the constant current device structure provided by the invention is compared with that of the conventional constant current diode structure, the constant current value of the constant current device is enlarged compared with that of the conventional constant current diode, and the constant current device structure is enlarged to be (1+beta) times of the constant current value of the conventional constant current diode in combination with the analysis; the breakdown voltage of the constant current device is basically equal to that of the traditional constant current diode, so that the unit area current of the constant current device provided by the invention is greatly improved, and the area cost of a chip is saved. In addition, the constant current device comprises a constant current diode and a PNP triode, the current amplification coefficient beta of the PNP triode is a positive temperature coefficient, and the constant current value of the constant current diode is a negative temperature coefficient, and the constant current coefficient beta and the negative temperature coefficient can be mutually compensated, so that the constant current device structure provided by the invention has better temperature stability. In addition, when the junction depth of the PNP triode and the constant current diode fluctuates, the current amplification coefficient beta and the constant current of the constant current diode have opposite influence trends, and the whole output current value of the device is more stable. All parts of the PNP triode are formed simultaneously with the constant current diode, and share the same layout, so that the manufacturing cost is not increased. Finally, when the P-type substrate 1 is made of a light doping material, the breakdown voltage values of the PNP triode and the constant current diode can be jointly improved, and the working voltage range of the constant current device structure provided by the invention can be enlarged.
The above description is merely illustrative of representative embodiments of the present invention and not intended to limit the scope of the present invention, which is defined by the claims.
Claims (9)
1. A constant current device comprises a P-type substrate and a first metal electrode arranged below the P-type substrate;
the constant current device is characterized by further comprising:
the first N-type region and the second N-type region are arranged in the P-type substrate and are positioned on two sides of the top of the P-type substrate; the first N-type region and the second N-type region are N-type diffusion well regions, or the first N-type region and the second N-type region are N-type epitaxial layers;
the P-type isolation region is arranged between the first N-type region and the second N-type region and is connected with the first N-type region and the second N-type region respectively;
the first P type heavy doping region is arranged in the first N type region, the first N type heavy doping region is arranged in the first N type region and is positioned at two sides of the first P type heavy doping region, and the first P type heavy doping region and the first N type heavy doping region are both positioned at the top of the first N type region;
the second P type heavily doped region and the second N type heavily doped region are arranged in the second N type region and are positioned at the top of the second N type region, and the second N type heavily doped region is positioned between the second P type heavily doped region and the first N type region;
an oxide layer arranged on the upper surface of the constant current device;
the second metal electrode is arranged on the upper surface of the first N-type heavy doping region at one side of the first P-type heavy doping region far away from the second N-type region and the upper surface of the first P-type heavy doping region, and the second metal electrodes on the first P-type heavy doping region and the first N-type heavy doping region penetrate through the oxide layer and are connected with each other;
the third metal electrodes are arranged on the upper surfaces of the first N-type heavily doped region and the upper surface of the second N-type heavily doped region at one side of the first P-type heavily doped region, close to the second N-type region, and penetrate through the oxide layer and are connected with each other;
and the fourth metal electrode is arranged on the upper surface of the second P-type heavily doped region and penetrates through the oxide layer.
2. The constant current device of claim 1, wherein the first N-type region and the second N-type region are both N-type diffusion well regions, the P-type isolation region is the P-type substrate, a P-type diffusion well region, or a composite structure comprising a third P-type heavily doped region and a P-type buried layer located below and connected to the third P-type heavily doped region, the P-type buried layer being located inside the P-type substrate.
3. The constant current device of claim 1, wherein when the first N-type region and the second N-type region are both N-type epitaxial layers, the P-type isolation region is a P-type diffusion well region or a composite structure, the composite structure is a third P-type heavily doped region and a P-type buried layer located below the third P-type heavily doped region and connected with the third P-type heavily doped region, and the P-type buried layer is located inside the P-type substrate.
4. A constant current device according to any one of claims 1 to 3, wherein the second metal electrode extends to both sides to form a field plate structure and the third metal electrode extends to both sides to form a field plate structure, the field plate structure being located above the interface of the first N-type region and the first P-type heavily doped region, or above the interface of the first N-type region and the first N-type heavily doped region, or above the interface of the second N-type region and the second N-type heavily doped region.
5. The constant current device of claim 1, wherein said P-type substrate is of a lightly doped type.
6. The manufacturing method of the constant current device is characterized by comprising the following steps of:
step one: a P-type substrate is manufactured by using a P-type semiconductor material, a first N-type region and a second N-type region are formed on the upper layer of the P-type substrate in an epitaxial or diffusion mode, and a P-type isolation region respectively connected with the first N-type region and the second N-type region is arranged between the first N-type region and the second N-type region;
step two, pre-oxygen before injection, window etching and etching redundant oxide layers after injection and junction pushing are carried out on the first N-type region and the second N-type region to form a first P-type heavily doped region positioned on the upper layer of the first N-type region and a second P-type heavily doped region positioned on the upper layer of the second N-type region;
step three, pre-oxygen before injection, window etching and post-injection etching redundant oxide layers are carried out on the first N-type region to form a first N-type heavily doped region which is positioned on the upper layer of the first N-type region and distributed on two sides of the first P-type heavily doped region, and pre-oxygen before injection, window etching and post-injection etching redundant oxide layers are carried out on the second N-type region to form a second N-type heavily doped region which is positioned on the upper layer of the second N-type region and distributed between the second P-type heavily doped region and the first N-type region;
step four, pre-oxidizing before depositing on the upper surface of the constant current device, and then depositing an oxide layer and compacting;
photoetching an ohmic hole above the first P type heavily doped region, the first N type heavily doped region, the second P type heavily doped region and the second N type heavily doped region, forming a metal electrode by metal to the ohm Kong Dianji and etching, connecting the metal electrode above the first N type heavily doped region, which is far away from one side of the second N type region, of the first P type heavily doped region with the metal electrode above the first P type heavily doped region, and connecting the metal electrode above the first N type heavily doped region, which is near one side of the second N type region, with the metal electrode above the second N type heavily doped region;
and step six, performing metal deposition on the back surface of the P-type substrate to form a metal electrode.
7. The method of manufacturing a constant current device according to claim 6, wherein the specific method of forming the first N-type region and the second N-type region by diffusion and disposing the P-type isolation region in the step is: and pre-oxidizing before injection, window etching and etching redundant oxide layers after injection and junction pushing are carried out on the P-type substrate to form a first N-type region and a second N-type region which are positioned in the P-type substrate and distributed on two sides of the top of the P-type substrate, and the P-type substrate between the first N-type region and the second N-type region is used as the P-type isolation region.
8. The method for manufacturing a constant current device according to claim 6, wherein the specific method for epitaxially forming the first N-type region and the second N-type region and disposing the P-type isolation region in the step comprises: pre-oxidizing before injection, window etching and etching an oxide layer after injection are carried out on the P-type substrate to form a P-type buried layer, the upper surface of the P-type substrate is epitaxially formed to form an N-type epitaxial layer, a third P-type heavily doped region positioned on the P-type buried layer is formed in the step, the N-type epitaxial layers on two sides of the third P-type heavily doped region are respectively used as the first N-type region and the second N-type region, and the P-type buried layer and the third P-type heavily doped region are used as the P-type isolation region.
9. The method for manufacturing a constant current device according to claim 6, wherein the specific method for epitaxially forming the first N-type region and the second N-type region and disposing the P-type isolation region in the step comprises: and (3) carrying out epitaxy on the upper surface of the P-type substrate to form an N-type epitaxial layer, carrying out pre-oxidation before injection, window etching, high-temperature pushing and junction after injection on the N-type epitaxial layer, and etching an oxide layer to form a P-type diffusion well region, wherein the lower surface of the P-type diffusion well region is in contact with the upper surface of the P-type substrate, the N-type epitaxial layers on two sides of the P-type diffusion well region are respectively used as the first N-type region and the second N-type region, and the P-type diffusion well region is used as the P-type isolation region.
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