CN110473585B - Replacement method, device and equipment for erasing failed storage unit and storage medium - Google Patents
Replacement method, device and equipment for erasing failed storage unit and storage medium Download PDFInfo
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- CN110473585B CN110473585B CN201910699334.5A CN201910699334A CN110473585B CN 110473585 B CN110473585 B CN 110473585B CN 201910699334 A CN201910699334 A CN 201910699334A CN 110473585 B CN110473585 B CN 110473585B
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/838—Masking faults in memories by using spares or by reconfiguring using programmable devices with substitution of defective spares
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Abstract
The invention discloses a replacement method, a device, equipment and a storage medium for an erasing failure storage unit, which are used for receiving an erasing operation instruction of an external testing machine, sequentially performing pre-programming verification, erasing verification and soft programming verification on a block in a storage chip, if verification fails in the verification, correspondingly performing judgment or replacement operation, and finally reporting a test result to the external testing machine; in addition, the judgment of the failure storage unit is completed by the internal part of the storage chip and does not depend on the read judgment of an external tester, so the test accuracy is improved.
Description
Technical Field
The invention relates to the technical field of semiconductor memory application, in particular to a replacement method, a device, equipment and a storage medium for an erasing failure storage unit.
Background
After a part of nonvolatile memory chips are produced, a small number of memory cells (cells) are bad, the failed memory cells cannot be subjected to one or more of normal reading, writing and erasing operations, if the failed memory cells are not repaired, the whole memory chip will be scrapped, and a part of memory cells are reserved in the memory chip by a norflash design company to replace the failed cells.
In the conventional test method, an Erase (Erase) test is started by sending an Erase operation instruction to a memory chip by a tester, and an Erase operation flow comprises four different sub-operation steps according to a verification condition: the method comprises the steps of pre-programming operation, erasing operation, over-erasing repairing operation and soft programming operation, wherein the conditions of all sub-operation steps after failure cells occur are different, because an erasing operation instruction is operated according to a minimum unit block, when the failed cells occur in the block, a testing machine cannot judge the specific failure of the failed cells in which sub-operation step and the storage addresses of the failed cells, only can directly judge that the whole storage chip fails, and needs testing personnel to repair the storage chip additionally, so that the whole testing is very troublesome, and the performance requirement on the testing machine is very high.
Disclosure of Invention
In order to solve the above problems, an object of the present invention is to provide a method, an apparatus, a device and a storage medium for replacing an erase failure memory cell, in which the search, calculation, judgment and replacement of the erase failure memory cell are completed inside a memory chip, so as to reduce the performance requirement of a tester and avoid the inaccuracy of judging a failure cell by a read of the tester.
The technical scheme adopted by the invention for solving the problems is as follows:
a method of replacing a failed memory cell, comprising the steps of:
receiving an erasing operation instruction sent by an external testing machine;
executing a pre-programming operation, performing pre-programming verification, if the number of times of failure of the pre-programming verification of the current block does not exceed a pre-programming threshold value, executing the pre-programming operation again, otherwise, executing a replacement operation, and executing the pre-programming operation again on the current block which successfully executes the replacement operation;
performing erasure verification, if the number of erasure verification failures of the current block does not exceed an erasure minimum threshold, executing erasure operation and performing over-erasure verification, otherwise, acquiring the number of storage units with erasure verification failures;
if the number of the storage units with failed erase verification does not exceed the set value, executing replacement operation, and after the replacement operation is successfully executed, performing erase verification, and if the number of the storage units with failed erase verification exceeds the set value, judging whether the number of times of the current block with failed erase verification exceeds the maximum erase threshold;
if the number of times of erasure verification failure of the current block exceeds the maximum erasure threshold value, setting the flag bit which cannot be replaced of the current block to be effective, otherwise, executing erasure operation and performing erasure verification;
performing soft programming verification, if the number of soft programming verification failures of the current block does not exceed a soft programming threshold, executing soft programming operation and performing soft programming verification again, and if the number of soft programming verification failures of the current block exceeds the soft programming threshold, executing replacement operation on the current block;
and outputting the test result to an external test machine.
Further, the replacing operation comprises the steps of:
acquiring the number and the positions of the storage units which fail to be verified;
judging whether the storage unit which fails to be verified can be replaced or not;
if the replacement can be carried out, the replacement information is saved, otherwise, the flag bit which cannot be replaced of the memory chip is set to be effective.
Further, the judging whether the storage unit which fails to be verified can be replaced comprises the following steps:
acquiring the number of available replacement memory units in the memory chip;
and if the number of the storage units which can be used for replacement is less than the number of the storage units which fail to be verified, returning error information and ending the test of the corresponding storage chip.
Further, the over-erase verification comprises the following steps:
judging whether the current block passes over-erasure verification, if so, performing erasure verification, and otherwise, acquiring the times of over-erasure verification failure;
and if the over-erasure verification failure times exceed the over-erasure threshold, executing a replacement operation, otherwise, executing an over-erasure repair operation, and then re-executing the over-erasure verification.
A replacement device for a failed memory cell, comprising:
the receiving unit is used for receiving an erasing operation instruction sent by an external testing machine;
the preprogramming verification unit is used for executing the preprogramming operation and performing the preprogramming verification, if the number of times of the preprogramming verification failure of the current block does not exceed the preprogramming threshold value, the preprogramming operation is executed again, otherwise, the replacing operation is executed, and the preprogramming operation is executed again on the current block which successfully executes the replacing operation;
the erasing verification unit is used for performing erasing verification, if the number of times of erasing verification failure of the current block does not exceed an erasing minimum threshold value, executing erasing operation and performing over-erasing verification, and if not, acquiring the number of storage units with erasing verification failure;
the first erasure verification judging unit is used for executing replacement operation if the number of the storage units which fail to erase verification does not exceed a set value, and performing erasure verification after the replacement operation is successfully executed, and judging whether the number of erasure verification failures of the current block exceeds an erasure maximum threshold value or not if the number of the storage units which fail to erase verification exceeds the set value;
the second erasure verification judging unit is used for setting the flag bit which cannot be replaced of the current block to be effective if the erasure verification failure times of the current block exceed the maximum erasure threshold value, and otherwise, executing the erasure operation and performing the over-erasure verification;
the soft programming verification unit is used for performing soft programming verification, if the soft programming verification failure frequency of the current block does not exceed a soft programming threshold value, executing soft programming operation and performing soft programming verification again, and if the soft programming verification failure frequency of the current block exceeds the soft programming threshold value, executing replacement operation on the current block;
and the output unit is used for outputting the test result to the external test machine.
A replacement device for a failed memory cell comprising at least one control processor and a memory for communicative connection with the at least one control processor; the memory stores instructions executable by the at least one control processor to enable the at least one control processor to perform the method of replacing a failed erase storage unit as defined in any one of the above.
A computer-readable storage medium characterized by: the computer-readable storage medium stores computer-executable instructions for causing a computer to perform the method of replacing a failed memory cell as described in any one of the above.
One or more technical schemes provided in the embodiment of the invention have at least the following beneficial effects: the operation executed by the replacement instruction is finished by the main control of the storage chip, and the tester only needs to be responsible for sending the verification data and the replacement instruction, judging the execution result and solidifying the replacement information in the process, so that the calculation amount of the tester in the test process is greatly reduced, the test time is correspondingly reduced, and the requirement on equipment of a tester needing to synchronously test a plurality of storage chips is reduced.
Drawings
The invention is further illustrated by the following figures and examples.
FIG. 1 is an overall method flow diagram of an embodiment of the present invention;
FIG. 2 is a flow chart of an alternate operation of an embodiment of the present invention;
FIG. 3 is a flow chart of a determination of whether an alternative can be made in accordance with an embodiment of the present invention;
FIG. 4 is an overall method flow diagram of an external tester of an embodiment of the present invention;
FIG. 5 is a block diagram of a device according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of the connections in the apparatus of an embodiment of the present invention;
FIG. 7 is a detailed operational flow diagram of an embodiment of the present invention;
FIG. 8 is a detailed operational flow diagram of an external tester in accordance with an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. It should be noted that, if not conflicted, the various features of the embodiments of the invention may be combined with each other within the scope of protection of the invention.
It should be noted that, if not conflicted, the various features of the embodiments of the invention may be combined with each other within the scope of protection of the invention. Additionally, while functional block divisions are performed in apparatus schematics, with logical sequences shown in flowcharts, in some cases, steps shown or described may be performed in sequences other than block divisions in apparatus or flowcharts.
Referring to fig. 1 and 7, one embodiment of the present invention provides an alternative method of erasing a failed memory cell, comprising:
s1, receiving an erasing operation instruction sent by an external test machine;
s2, executing the pre-programming operation, performing the pre-programming verification, if the number of times of the current block failed in the pre-programming verification does not exceed the pre-programming threshold value, executing the pre-programming operation again, otherwise, executing the replacement operation, and executing the pre-programming operation again on the current block which successfully executes the replacement operation;
s3, performing erasure verification, if the number of erasure verification failures of the current block does not exceed the erasure minimum threshold, executing erasure operation and performing over-erasure verification, otherwise, acquiring the number of storage units with erasure verification failures;
s4, if the number of the storage units with the failed erasing verification does not exceed the set value, executing a replacing operation, and after the replacing operation is successfully executed, performing the erasing verification, and if the number of the storage units with the failed erasing verification exceeds the set value, judging whether the number of the failed erasing verification of the current block exceeds the maximum erasing threshold value;
s5, if the number of times of the current block' S erasure verification failure exceeds the maximum erasure threshold, the flag bit of the current block that can not be replaced is set to be valid, otherwise, the erasure operation and the over-erasure verification are executed;
s6, performing soft programming verification, if the number of soft programming verification failures of the current block does not exceed a soft programming threshold, executing soft programming operation and performing soft programming verification again, and if the number of soft programming verification failures of the current block exceeds the soft programming threshold, executing replacement operation on the current block;
s7, the test result is output to the external test machine.
The embodiment of the invention divides the operations of searching, calculating, judging and replacing the erased failed memory chip by the traditional tester into the memory chips to be completed internally, so that the external tester has the functions of sending a test starting instruction, carrying out undifferentiated operation on all the memory chips on the same pincard and obtaining corresponding test results; because the operations of searching, calculating, judging and replacing are not required to be finished by a tester, the test result does not depend on the read judgment of the tester, thereby improving the test accuracy and reducing the performance requirement of the tester. It is noted that for a memory chip that successfully passes each kind of verification, only three verification steps need to be passed: the test can be completed by pre-programming verification, erasing verification and soft programming verification, but when a certain verification step fails, judgment and processing are required according to conditions.
Referring to fig. 2, wherein the replacing operation includes the steps of:
s100, acquiring the number and the positions of the storage units which fail to be verified;
s110, judging whether the storage unit which fails to be verified can be replaced or not;
and S120, if the replacement can be carried out, storing the replacement information, otherwise, setting the flag bit which cannot be replaced of the memory chip to be effective.
Referring to fig. 3, wherein the determining whether the memory cell failed in the verification can be replaced includes the steps of:
s111, acquiring the number of the storage units which can be used for replacement in the storage chip;
and S112, if the number of the storage units available for replacement is smaller than that of the storage units failed in verification, returning error information and ending the test of the corresponding storage chip.
In the replacement process, replacement of each failed storage unit can not be completed, flag bit setting is carried out on part of failed storage units which cannot be replaced, so that the part of failed storage units are shielded, and meanwhile, after counting of all replaceable failed storage units in the target storage unit is completed, whether the number of reserved storage units can meet all replacement requirements or not is compared, and a tester needs to be reported under the condition that the number cannot meet all replacement requirements, so that a tester makes a decision.
Thus, referring to fig. 4 and 8, based on the operation of the tester described above, it can be seen that the steps performed on the tester side are as follows:
s200, entering an automatic replacement mode inside a memory chip;
s210, sending an erasing operation instruction;
s220, reading the status register to obtain the current test progress and test condition;
s230, judging whether the erasing operation instruction is finished;
s240, if the erasing operation instruction is finished, ending the test, and if not, judging whether the erasing operation instruction is overtime;
and S250, if the erasing operation instruction is overtime, judging that the erasing operation of the memory chip fails and ending the test, and if not, updating the read state register.
The embodiment of the present invention further provides a replacement device for an erase failure storage unit, where the replacement device 1000 for an erase failure storage unit includes, but is not limited to: a receiving unit 1100, a pre-program verification unit 1200, an erase verification unit 1300, a first erase verification determination unit 1400, a second erase verification determination unit 1500, a soft program verification unit 1600, and an output unit 1700.
The receiving unit 1100 is configured to receive an erasing operation instruction sent by an external testing machine;
the pre-programming checking unit 1200 is configured to execute a pre-programming operation, perform the pre-programming checking, execute the pre-programming operation again if the number of times of failure of the pre-programming checking of the current block does not exceed a pre-programming threshold, otherwise execute a replacement operation, and execute the pre-programming operation again on the current block on which the replacement operation is successfully executed;
the erasing verification unit 1300 is used for performing erasing verification, if the number of times of erasing verification failure of the current block does not exceed an erasing minimum threshold value, executing erasing operation and performing over-erasing verification, and if not, acquiring the number of storage units with erasing verification failure;
the first erasure checking and judging unit 1400 is configured to execute a replacement operation if the number of the storage units failing the erasure checking does not exceed a set value, perform erasure checking after the replacement operation is successfully executed, and judge whether the number of erasure checking and failure times of the current block exceeds an erasure maximum threshold if the number of the storage units failing the erasure checking exceeds the set value;
the second erasure checking and judging unit 1500 is configured to set the flag bit of the current block that cannot be replaced to be valid if the number of times of erasure checking failure of the current block exceeds the maximum erasure threshold, and otherwise, perform an erasure operation and perform an over-erasure checking;
the soft programming verification unit 1600 is used for performing soft programming verification, if the soft programming verification failure frequency of the current block does not exceed the soft programming threshold value, executing soft programming operation and performing soft programming verification again, and if the soft programming verification failure frequency of the current block exceeds the soft programming threshold value, executing replacement operation on the current block;
the output unit 1700 is configured to output the test result to the external test machine.
It should be noted that, since the replacement device for an erase failure memory cell in the present embodiment is based on the same inventive concept as the above replacement method for an erase failure memory cell, the corresponding contents in the method embodiments are also applicable to the present device embodiments, and are not described in detail herein.
The embodiment of the invention also provides a replacement device for the erasing failure storage unit, and the replacement device 2000 for the erasing failure storage unit can be any type of intelligent terminal, such as a mobile phone, a tablet computer, a personal computer and the like.
Specifically, the replacement device 2000 for a failed memory cell includes: one or more control processors 2010 and memory 2020, one control processor 2010 being illustrated in fig. 6.
The memory 2020, as a non-transitory computer readable storage medium, can be used for storing non-transitory software programs, non-transitory computer executable programs, and modules, such as program instructions/modules corresponding to the replacement method of the erase failure storage unit in the embodiment of the present invention, for example, the receiving unit 1100, the pre-programmed verification unit 1200, the erase verification unit 1300, the first erase verification determination unit 1400, the second erase verification determination unit 1500, the soft program verification unit 1600, and the output unit 1700 shown in fig. 5. The control processor 2010 executes various functional applications and data processing of the replacement device 1000 for an erase-disabled memory cell, i.e., a replacement method for an erase-disabled memory cell, by executing non-transitory software programs, instructions and modules stored in the memory 2020.
The memory 2020 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the replacement device 1000 that erases a defective memory cell, and the like. Further, the memory 2020 may include high-speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory 2020 optionally includes memory located remotely from the control processor 2010, which may be connected over a network to the replacement device 2000 for the failed memory unit. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The one or more modules stored in the memory 2020, when executed by the one or more control processors 2010, perform the replacement method for erasing failed memory cells in the above-described method embodiments, e.g., perform the above-described method steps S1-S7 in fig. 1, and implement the functions of the cell 1100-1700 in fig. 5.
Embodiments of the present invention also provide a computer-readable storage medium storing computer-executable instructions, which are executed by one or more control processors, for example, by one control processor 2010 in fig. 6, and may cause the one or more control processors 2010 to execute the replacement method of the erasure failure storage unit in the above method embodiment, for example, execute the above-described method steps S1 to S7 in fig. 1, and implement the functions of unit 1100-1700 in fig. 5.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, may be located in one place, or may be distributed over a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.
Through the above description of the embodiments, those skilled in the art can clearly understand that the embodiments can be implemented by software plus a general hardware platform. Those skilled in the art will appreciate that all or part of the processes of the methods of the above embodiments may be implemented by hardware related to instructions of a computer program, which may be stored in a computer readable storage medium, and when executed, may include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a Random Access Memory (RAM), or the like.
While the preferred embodiments of the present invention have been described in detail, it will be understood by those skilled in the art that the foregoing and various other changes, omissions and deviations in the form and detail thereof may be made without departing from the scope of this invention.
Claims (7)
1. A method of replacing a failed memory cell, comprising the steps of:
receiving an erasing operation instruction sent by an external testing machine;
executing a pre-programming operation, performing the pre-programming verification, if the pre-programming verification of the current block fails, and if the number of times of the pre-programming verification failure does not exceed a pre-programming threshold value, executing the pre-programming operation again, if the number of times of the pre-programming verification failure exceeds the pre-programming threshold value, executing a replacing operation, and executing the pre-programming operation again on the current block which successfully executes the replacing operation;
if the pre-programming verification of the current block is successful, performing erasing verification, if the erasing verification of the current block is failed, and if the number of times of the erasing verification failure does not exceed an erasing minimum threshold value, performing erasing operation and over-erasing verification, and if the number of times of the erasing verification failure exceeds the erasing minimum threshold value, acquiring the number of storage units with the erasing verification failure; if the number of the storage units with failed erase verification does not exceed the set value, executing replacement operation, and after the replacement operation is successfully executed, performing erase verification, and if the number of the storage units with failed erase verification exceeds the set value, judging whether the number of times of the current block with failed erase verification exceeds the maximum erase threshold;
if the number of times of erasure verification failure of the current block exceeds the maximum erasure threshold value, setting the flag bit which cannot be replaced of the current block to be effective, otherwise, executing erasure operation and performing erasure verification;
after the over-erasure verification is executed, performing soft programming verification, if the soft programming verification failure frequency of the current block does not exceed a soft programming threshold value, executing soft programming operation and performing soft programming verification again, and if the soft programming verification failure frequency of the current block exceeds the soft programming threshold value, executing replacement operation on the current block;
and outputting the test result to an external test machine.
2. A method of replacing a failed memory cell as claimed in claim 1, wherein: the replacement operation includes the steps of:
acquiring the number and the positions of the storage units which fail to be verified;
judging whether the storage unit which fails to be verified can be replaced or not;
if the replacement can be carried out, the replacement information is saved, otherwise, the flag bit which cannot be replaced of the memory chip is set to be effective.
3. A method of replacing a failed memory cell as claimed in claim 2, wherein: the judging whether the storage unit which fails to be checked can be replaced comprises the following steps:
acquiring the number of available replacement memory units in the memory chip;
and if the number of the storage units which can be used for replacement is less than the number of the storage units which fail to be verified, returning error information and ending the test of the corresponding storage chip.
4. A method of replacing a failed memory cell as claimed in claim 1, wherein: the over-erase verification includes the steps of:
judging whether the current block passes over-erasure verification, if so, performing erasure verification, and otherwise, acquiring the times of over-erasure verification failure;
and if the over-erasure verification failure times exceed the over-erasure threshold, executing a replacement operation, otherwise, executing an over-erasure repair operation, and then re-executing the over-erasure verification.
5. A replacement device for a failed memory cell, comprising: the device comprises a receiving unit, a processing unit and a control unit, wherein the receiving unit is used for receiving an erasing operation instruction sent by an external testing machine;
the system comprises a pre-programming checking unit, a pre-programming checking unit and a control unit, wherein the pre-programming checking unit is used for executing pre-programming operation and performing pre-programming checking, if the pre-programming checking of the current block fails and the number of times of the pre-programming checking failure does not exceed a pre-programming threshold, the pre-programming operation is executed again, if the number of times of the pre-programming checking failure exceeds the pre-programming threshold, the replacement operation is executed, and the pre-programming operation is executed again on the current;
the erasing verification unit is used for performing erasing verification if the preprogramming verification of the current block is successful, executing erasing operation and performing over-erasing verification if the erasing verification of the current block fails and the number of times of the erasing verification failure does not exceed an erasing minimum threshold, and acquiring the number of storage units of which the erasing verification fails if the number of times of the erasing verification failure exceeds the erasing minimum threshold;
the first erasure verification judging unit is used for executing replacement operation if the number of the storage units which fail to erase verification does not exceed a set value, and performing erasure verification after the replacement operation is successfully executed, and judging whether the number of erasure verification failures of the current block exceeds an erasure maximum threshold value or not if the number of the storage units which fail to erase verification exceeds the set value;
the second erasure verification judging unit is used for setting the flag bit which cannot be replaced of the current block to be effective if the erasure verification failure times of the current block exceed the maximum erasure threshold value, and otherwise, executing the erasure operation and performing the over-erasure verification;
the soft programming verification unit is used for performing soft programming verification after the over-erasure verification is performed, if the soft programming verification failure frequency of the current block does not exceed a soft programming threshold value, performing soft programming operation and performing soft programming verification again, and if the soft programming verification failure frequency of the current block exceeds the soft programming threshold value, performing replacement operation on the current block;
and the output unit is used for outputting the test result to the external test machine.
6. A replacement device for erasing a failed memory cell, comprising: comprises at least one control processor and a memory for communicative connection with the at least one control processor; the memory stores instructions executable by the at least one control processor to enable the at least one control processor to perform the method of replacing a scratch-out memory cell of any of claims 1-4.
7. A computer-readable storage medium characterized by: the computer-readable storage medium stores computer-executable instructions for causing a computer to perform the method of replacing a failed erase storage unit of any of claims 1-4.
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Address after: 519000 unit a1106-1107, block a, entrepreneurship building, Tsinghua Science Park, 101 University Road, Tangjiawan Town, Zhuhai City, Guangdong Province Patentee after: Zhuhai Boya Technology Co.,Ltd. Address before: Unit a1005-1007, block a, pioneering building, Tsinghua Science Park, 101 University Road, Tangjiawan Town, Zhuhai City, Guangdong Province, 519080 Patentee before: ZHUHAI BOYA TECHNOLOGY Co.,Ltd. |
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