CN110444559B - Micro-LED array and preparation method thereof - Google Patents
Micro-LED array and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 153
- 229910052751 metal Inorganic materials 0.000 claims abstract description 107
- 239000002184 metal Substances 0.000 claims abstract description 107
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 85
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 63
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 55
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 55
- 239000010703 silicon Substances 0.000 claims abstract description 55
- 238000004806 packaging method and process Methods 0.000 claims abstract description 14
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 9
- 238000001465 metallisation Methods 0.000 claims description 9
- 238000007731 hot pressing Methods 0.000 claims description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- 229910052802 copper Inorganic materials 0.000 claims description 6
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
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Abstract
The invention discloses a Micro-LED array and a preparation method thereof, relating to the field of LED packaging and mainly comprising a silicon substrate, a metal substrate and a plurality of same light-emitting chips positioned between the silicon substrate and the metal substrate; the light-emitting chip is sequentially provided with a metal contact, a p-type gallium nitride layer, a multi-quantum well layer and an n-type gallium nitride layer from bottom to top; the silicon substrate is provided with a wiring, the metal contact is electrically interconnected with the silicon substrate through the wiring, and the metal substrate is arranged on the n-type gallium nitride layer; the metal contact is used as a p electrode of the light-emitting chip; the metal substrate is used as an n electrode of the light-emitting chip; and when the silicon substrate is electrified, current flows to the metal substrate from the metal contact, and the Micro-LED array emits light. The Micro-LED array and the preparation method thereof disclosed by the invention can realize gold-wire-free packaging of the Micro-LED array.
Description
Technical Field
The invention relates to the field of LED packaging, in particular to a Micro-LED array and a preparation method thereof.
Background
The bonding wire is an important ring in the LED packaging process flow, the four major base materials used by the bonding wire are gold, silver, copper and aluminum, and the gold wire is a good choice due to the advantages of high conductivity, corrosion resistance, good toughness, oxidation resistance and the like. The gold wire bonding plays a role of wire connection in the LED package, and connects the chip surface electrode and the substrate to realize the LED electrical interconnection.
Micro-LED technology, i.e. LED scaling and matrixing, refers to a high density Micro-sized LED array integrated on one chip. The Micro-LED array is actually arrayed after LED shrinkage, and the size of the Micro-LED array is below 100 um. Micro-LEDs are concerned and studied because they not only have all the advantages of LEDs that can self-emit light, small size, light weight, high brightness, longer lifetime, lower power consumption, faster response time, and higher controllability, but also have the obvious features of high resolution and portability, etc., but their chip size is smaller than 100um, and their commercialization still faces many challenges, such as mass transfer technology, full-color display, epitaxial technology, bonding technology, etc. Although the Micro-LED not only inherits the advantages of high efficiency, high brightness, high reliability, quick reaction time and the like of the inorganic LED, but also has the characteristics of self-luminescence without a backlight source, and has the advantages of energy conservation, simple mechanism, small volume, thinness and the like, because the chip of the Micro-LED is too tiny, generally smaller than 100um, the difficulty of using a common gold wire bonding mode is very high.
The common GaN-based LED packaging structure mainly comprises a forward mounting structure, an inverted mounting structure and a vertical structure. The forward mounting structure is simple to manufacture, the process is mature, and light emitted by the active region is emitted through the P-type GaN region and the transparent electrode. However, the p and n electrodes of the LED with the upright structure are on the same side, and the current flows transversely through the n-GaN layer, so that the current crowding problem exists; secondly, the problem of low heat dissipation efficiency is caused due to poor heat conductivity of the sapphire substrate; and gold wire bonding is an indispensable process for the normal mounting structure. The flip-chip structure is based on the traditional packaging of the normally-installed LED chip, the LED chip is inverted and welded with the silicon substrate provided with the metal salient points, compared with the normally-installed packaging process, the gold wire bonding process is reduced, the steps of a lead frame and routing are eliminated, the packaging volume is reduced, the heat dissipation efficiency is further improved, and the problem of current crowding still exists. The p electrode and the n electrode of the vertical structure are respectively distributed on the upper top surface and the lower bottom surface of the LED structure, and current flows from the p electrode to the n electrode vertically, so that the problems of heat dissipation and current crowding can be effectively solved, but a gold wire bonding process cannot be avoided, and the Micro-LED array is not suitable for the Micro-LED array. In addition, in the existing wafer level monolithic hybrid integration technology, a monolithic processing mode is not suitable for a large array, time is consumed, and the alignment process requirement of monolithic integration is high in the bonding process, so that the existing wafer level monolithic hybrid integration technology is also not suitable for a Micro-LED array.
The Micro-LED array mainly adopted in the market adopts a front-mounted structure. By adopting the normal mounting structure, on one hand, the current crowding problem exists because the current transversely flows through the n-GaN layer; on the other hand, the commonly used Micro-LEDs are all sapphire substrates (Al) 2 O 3 ) The sapphire substrate has high hardness and low thermal and electrical conductivity, and the heat dissipation of the device can be seriously influenced under the condition of large current. Most importantly, for Micro-LEDs with the size less than 100um, because single chips in the Micro-LED array are very tiny and the single chips in the Micro-LED array are all of a normal mounting structure, gold wire bonding of the single chips in the Micro-LED array is very difficult, and the gold wire bonding process is difficult to complete.
Disclosure of Invention
The invention aims to provide a Micro-LED array and a preparation method thereof, which can realize the gold-wire-free packaging of the Micro-LED array.
In order to achieve the purpose, the invention provides the following scheme:
a Micro-LED array comprises a silicon substrate, a metal substrate and a plurality of identical light emitting chips positioned between the silicon substrate and the metal substrate;
the light-emitting chip is sequentially provided with a metal contact, a p-type gallium nitride layer, a multi-quantum well layer and an n-type gallium nitride layer from bottom to top; wherein the silicon substrate is provided with a wiring, the metal contact is electrically interconnected with the silicon substrate through the wiring, and the metal substrate is arranged on the n-type gallium nitride layer;
the metal contact is used as a p electrode of the light-emitting chip, the metal contact is used for generating holes, and the p-type gallium nitride layer is used for transmitting the holes; the metal substrate is used as an n electrode of the light-emitting chip and is used for generating the electrons; the n-type gallium nitride layer is used for transmitting the electrons; the multi-quantum well layer is used for recombining the electrons and the holes to generate photons; and when the silicon substrate is electrified, current flows to the metal substrate from the metal contact, so that the Micro-LED array emits light.
Optionally, the light emitting chips are arranged between the silicon substrate and the metal substrate in an array.
Optionally, the metal contact is made of gold or a nickel/gold alloy.
Optionally, the metal substrate is a copper substrate.
In order to achieve the above purpose, the invention also provides the following scheme:
a preparation method of a Micro-LED array comprises the following steps:
simultaneously growing a plurality of same light emitting chips on a sapphire substrate; the light-emitting chip is a chip which is sequentially grown with an n-type gallium nitride layer, a multi-quantum well layer, a p-type gallium nitride layer and a metal contact, wherein the n-type gallium nitride layer is grown on a sapphire substrate;
arranging wiring corresponding to the metal contacts on the silicon substrate according to the positions of the metal contacts on the sapphire substrate;
inverting the sapphire substrate on which the light-emitting chip grows, and bonding the inverted sapphire substrate with the silicon substrate through the metal contact and the wiring to obtain a bonded array;
and peeling off the sapphire substrate on the bonding array, and then bonding a metal substrate to each n-type gallium nitride layer.
Optionally, the growing step of the light emitting chip specifically includes:
growing the n-type gallium nitride layer on the sapphire substrate;
growing the multiple quantum well layer on the n-type gallium nitride layer;
growing the p-type gallium nitride layer on the multi-quantum well layer;
and carrying out metal deposition on the p-type gallium nitride layer to form the metal contact.
Optionally, bonding the inverted sapphire substrate with the silicon substrate through the metal contact and the wiring specifically includes:
and bonding the inverted sapphire substrate with the silicon substrate through the metal contact and the wiring by adopting hot-pressing flip-chip welding, ultrasonic hot-pressing welding or conductive adhesive.
Optionally, the peeling off the sapphire substrate on the bonding array specifically includes:
and stripping the sapphire substrate on the bonding array by adopting a laser stripping technology.
Optionally, the performing metal deposition on the p-type gallium nitride layer to form the metal contact specifically includes:
and carrying out metal deposition on the p-type gallium nitride layer by adopting a deposition method, a sputtering method or an electroplating method to form the metal contact.
According to the specific embodiment provided by the invention, the invention discloses the following technical effects: the invention discloses a Micro-LED array and a preparation method thereof.A metal contact of a light-emitting chip is used as a p electrode, a metal substrate is used as an n electrode, and a wiring is arranged on a silicon substrate, so that the light-emitting chip is directly and electrically interconnected with the silicon substrate through the metal contact and the wiring, and a single light-emitting chip in the Micro-LED array does not need to be subjected to gold wire bonding operation, thereby realizing the gold wire-free packaging of the Micro-LED array. And when the silicon substrate is electrified, current flows to the metal substrate from the metal contact, so that the p electrode and the n electrode are electrified, the multiple quantum well layer generates photons, and the light emitting of the Micro-LED array can be realized.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a block diagram of an embodiment of a Micro-LED array of the present invention;
FIG. 2 is a flow chart of an embodiment of a method of fabricating a Micro-LED array according to the present invention;
FIG. 3 is a schematic diagram of a single structural element of a bonded array of the present invention;
FIG. 4 is a schematic view of a front-mounted structure in a general GaN-based LED package structure;
FIG. 5 is a schematic view of a vertical structure in a general GaN-based LED package structure;
FIG. 6 is a schematic diagram of a flip-chip structure in a conventional GaN-based LED package structure;
FIG. 7 is a schematic diagram of a vertical structure with p-electrodes and n-electrodes distributed on the top and bottom surfaces of the LED structure, respectively;
FIG. 8 is a schematic diagram of a vertical structure in which the p-electrode and n-electrode are distributed on the bottom and top surfaces of the LED structure, respectively;
FIG. 9 is a schematic diagram of gold wire bonding of a normal mounting structure in a conventional GaN-based LED package;
FIG. 10 is a schematic view of gold wire bonding in a vertical structure of a conventional GaN-based LED package;
fig. 11 is a schematic diagram of flip-chip bonding in a conventional GaN-based LED package.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention aims to provide a Micro-LED array and a preparation method thereof, which can realize the gold-wire-free packaging of the Micro-LED array.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
FIG. 1 is a block diagram of an embodiment of a Micro-LED array of the present invention. Referring to fig. 1, the Micro-LED array includes a silicon substrate 101, a metal substrate 102, and a plurality of identical light emitting chips located between the silicon substrate 101 and the metal substrate 102.
The light emitting chips are arranged in an array between the silicon substrate 101 and the metal substrate 102.
The light-emitting chip is sequentially provided with a metal contact 103, a p-type gallium nitride layer 104, a multi-quantum well layer 105 and an n-type gallium nitride layer 106 from bottom to top; wherein, the silicon substrate 101 is provided with a wiring, the metal contact 103 is electrically interconnected with the silicon substrate 101 through the wiring, and the metal substrate 102 is arranged on the n-type gallium nitride layer 106.
The metal contact 103 is made of gold or a nickel/gold alloy.
The metal substrate 102 is a copper substrate.
The multiple quantum well layer 105 is a multilayer quantum well and mainly improves the recombination efficiency of holes and electrons, and the more the quantum wells are, the higher the recombination efficiency is, and the higher the recombination efficiency is, the higher the light emitting efficiency is.
The metal contact 103 is used as a p electrode of the light emitting chip, the metal contact 103 is used for generating holes, and the p-type gallium nitride layer 104 is used for transmitting the holes; the metal substrate 102 is used as an n-electrode of the light emitting chip, and the metal substrate 102 is used for generating the electrons; the n-type gallium nitride layer 106 is used for transmitting the electrons; the MQW layer 105 is used for recombining the electrons and the holes to generate photons; when the silicon substrate 101 is electrified, current flows from the metal contact 103 to the metal substrate 102, and light emission of the Micro-LED array is realized.
In this example, the Micro-LED array consists of 2 x 2 chips, fig. 1 shows a 2 x 2 gold-wire-free packaged Micro-LED array, and after determining that the Micro-LED array is 2 x 2, the 2 x 2 array is routed on the silicon substrate 101.
Taking the Micro-LED array as an example with 2 × 2 chip sets, after determining that the Micro-LED array is 2 × 2, wiring of the 2 × 2 array is performed on the silicon substrate. And (2) growing a p-type gallium nitride layer, a multi-quantum well layer and an n-type gallium nitride layer on the sapphire substrate in sequence by using an MOCVD (metal organic chemical vapor deposition) method to serve as an epitaxial layer of the Micro-LED, and after the epitaxial layer is grown, performing metal deposition on the p-type gallium nitride layer of each chip of the Micro-LED array by using an evaporation deposition method to form a metal contact corresponding to the wiring of 2 x 2 on the silicon substrate. And then, after the Micro-LED array is inverted, the metal contacts of the array and the silicon substrate are bonded by adopting a hot-press welding process to realize electrical interconnection. If the wiring connection is not made by using a silicon substrate, the electrical interconnection can be realized by gold wire punching on a single chip. The invention realizes the light emission by bonding a plurality of metal contacts on a silicon substrate and forming a loop with the metal substrate to realize the light emission without the gold wire, can realize the packaging of a Micro-LED array by utilizing the pyrolysis characteristic of a GaN material and the band gap difference between the GaN and the sapphire, adopts ultraviolet pulse laser with the photon energy larger than the GaN band gap and smaller than the sapphire band gap to irradiate the GaN material through the sapphire substrate to generate strong absorption at the interface part of the GaN material by utilizing the pyrolysis characteristic of the GaN material and the band gap difference between the GaN and the sapphire, increases the local temperature, gasifies and decomposes the GaN to realize the peeling of the sapphire substrate, and bonds a GaN epitaxial wafer (an n-type gallium nitride layer) and a metal substrate of a transfer substrate together by utilizing a wafer bonding method, the GaN material is combined with the metal substrate through hot pressing, the bonding temperature is 300-.
FIG. 2 is a flow chart of an embodiment of a method for fabricating a Micro-LED array according to the present invention. Referring to fig. 2, the method for preparing the Micro-LED array includes:
step 201: a plurality of identical light emitting chips are simultaneously grown on the sapphire substrate 107; the light emitting chip is a chip which is sequentially grown with an n-type gallium nitride layer 106, a multi-quantum well layer 105, a p-type gallium nitride layer 104 and a metal contact 103, wherein the n-type gallium nitride layer 106 is grown on a sapphire substrate 107.
In this step 201, the growing step of the light emitting chip specifically includes:
the n-type gallium nitride layer 106 is grown on the sapphire substrate 107.
The multiple quantum well layer 105 is grown on the n-type gallium nitride layer 106.
The p-type gallium nitride layer 104 is grown on the multiple quantum well layer 105.
And performing metal deposition on the p-type gallium nitride layer 104 to form the metal contact 103.
Wherein, the metal deposition is performed on the p-type gallium nitride layer 104 to form the metal contact 103, and specifically includes:
and performing metal deposition on the p-type gallium nitride layer 104 by using a deposition method, a sputtering method or an electroplating method to form the metal contact 103.
The simultaneous growth of one type of layer on a sapphire substrate is a conventional process that has been implemented by controlling the thickness and size of each layer of each light-emitting chip by varying the temperature and material concentration during the reaction, and the spacing and partitioning between the same layers of each light-emitting chip can be controlled.
Step 202: wiring corresponding to the metal contacts 103 is arranged on the silicon substrate 101 according to the position of each metal contact 103 on the sapphire substrate 107.
In step 202, the distribution of the Micro-LED array is determined, that is, the position of each metal contact in the Micro-LED array is determined, and then wiring consistent with the distribution of the Micro-LED array is performed on the silicon substrate.
Step 203: and inverting the sapphire substrate 107 on which the light-emitting chip grows, and bonding the inverted sapphire substrate 107 with the silicon substrate 101 through the metal contact 103 and the wiring to obtain a bonded array.
FIG. 3 is a schematic diagram of a single structural element of a bonded array of the present invention. Referring to fig. 3, if the bonded array is diced, a plurality of identical building blocks, as shown in fig. 3, can be obtained.
In step 203, the bonding of the inverted sapphire substrate 107 with the silicon substrate 101 through the metal contact 103 and the wires specifically includes:
and bonding the inverted sapphire substrate 107 with the silicon substrate 101 through the metal contacts 103 and the wires by using hot-pressing flip chip bonding, ultrasonic hot-pressing bonding or conductive adhesive.
During bonding, according to the distribution of the Micro-LED array (the position of each metal contact in the Micro-LED array), the metal contacts are aligned with the wiring on the silicon substrate, and then bonding is carried out.
Step 204: the sapphire substrate 107 on the bonded array is peeled off, and then the metal base plate 102 is bonded to each of the n-type gallium nitride layers 106.
In this step 204, the peeling off the sapphire substrate 107 on the bonded array specifically includes:
the sapphire substrate 107 on the bonded array is peeled off using a laser lift-off technique.
In this embodiment, the metal substrate is a copper substrate, and after the sapphire substrate 107 is peeled off, the Micro-LED array is transferred to the copper substrate with better heat and electric conductivity by using a bonding technique, and the whole array shares the n electrode.
For the Micro-LED, because the Micro-LED can not be combined with the substrate in a common metal routing mode, the Micro-LED display device is more suitable for adopting a flip structure and can further meet the requirements of small display volume and miniaturization of the Micro-LED. The invention aims to prepare a metal contact on a p-type gallium nitride layer of a Micro LED array, perform corresponding wiring on a silicon substrate with the Micro-LED array, and bond an array p electrode surface and the silicon substrate by adopting a hot-press welding process to realize electrical interconnection; and removing the sapphire substrate by using a laser lift-off technology, bonding the metal substrate to the n-type gallium nitride layer by using a bonding technology, wherein the p and n electrodes are positioned at two sides of an epitaxial layer (the part of the LED structure, except the p electrode, the n electrode and the substrate, is called the epitaxial layer, and the p-type gallium nitride layer, the multi-quantum well layer and the n-type gallium nitride layer are referred to in the invention), so that the gold-wire-free packaging of the Micro-LED array is realized.
The Micro-LED is too tiny, so that a gold wire bonding process is difficult to carry out on the Micro-LED with a normal structure. The invention provides a solution for electrical interconnection of a Micro-LED array by adopting a gold-wire-free bonding process. The bonding process problem is solved, meanwhile, the heat dissipation efficiency is improved, and the current crowding problem is solved. The gold wire removing bonding process is mainly carried out by two steps, namely, inverting the array and bonding the array with a silicon substrate, and peeling off the sapphire substrate, and transferring the array onto a metal substrate with excellent electric conductivity and heat conductivity to serve as an n electrode to realize electric interconnection. Therefore, the metal contact used as the p electrode and the metal substrate used as the n electrode are designed on two sides of the epitaxial layer, so that the current crowding problem is improved, and the problem of Micro-LED array gold wire bonding is solved.
Fig. 4, 5 and 6 are schematic views of a front-mounted structure, a vertical structure and a flip-chip structure in a general GaN-based LED package structure, respectively. Among them, the vertical structure is divided into two types, one is that the p-electrode and the n-electrode are respectively distributed on the upper top surface and the lower bottom surface of the LED structure, as shown in fig. 7. The other is that the p-electrode and the n-electrode are distributed on the lower bottom surface and the upper top surface of the LED structure, respectively, as shown in fig. 8. According to the conventional common forward-mounted LED structure, the n-type gallium nitride layer is in contact with the sapphire substrate, the sapphire substrate has high hardness and low heat conductivity and electric conductivity. In addition, the sapphire substrate is peeled off after the flip chip is arranged, the array is transferred to the metal substrate with better electric conductivity and heat conduction performance, the whole array shares the n electrode, so that the p electrode and the n electrode are positioned on two sides of the epitaxial layer, almost all current vertically flows through the epitaxial layer, the transversely flowing current is very little, and the problem of current crowding is solved.
Fig. 9, fig. 10 and fig. 11 are respectively a schematic diagram of a normal structure gold wire bonding, a schematic diagram of a vertical structure gold wire bonding and a schematic diagram of a flip-chip structure bonding in a general GaN-based LED package. Because the Micro-LED array adopted by the market mainstream mostly adopts a forward mounting structure, and the Micro-LED chip is too tiny, the gold wire bonding operation on a single chip is too difficult and low in efficiency, the p-type gallium nitride layer is bonded on the wired silicon substrate, the whole array is transferred onto the metal substrate, and the whole Micro-LED array shares an n electrode, so that the gold-wire-free packaging of the Micro-LED array is realized.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The principles and embodiments of the present invention have been described herein using specific examples, which are presented solely to aid in the understanding of the apparatus and its core concepts; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed. In view of the above, the present disclosure should not be construed as limiting the invention.
Claims (6)
1. A Micro-LED array is characterized by comprising a silicon substrate, a metal substrate and a plurality of identical light-emitting chips, wherein the identical light-emitting chips are positioned between the silicon substrate and the metal substrate;
the light-emitting chip is sequentially provided with a metal contact, a p-type gallium nitride layer, a multi-quantum well layer and an n-type gallium nitride layer from bottom to top; wherein the silicon substrate is provided with a wiring, the metal contact is electrically interconnected with the silicon substrate through the wiring, and the metal substrate is arranged on the n-type gallium nitride layer;
the metal contact is used as a p electrode of the light-emitting chip, the metal contact is used for generating holes, and the p-type gallium nitride layer is used for transmitting the holes; the metal substrate is used as an n electrode of the light-emitting chip and is used for generating electrons; the n-type gallium nitride layer is used for transmitting the electrons; the multi-quantum well layer is used for recombining the electrons and the holes to generate photons; when the silicon substrate is electrified, current flows to the metal substrate from the metal contact, and light emission of the Micro-LED array is achieved; preparing a metal contact on a p-type gallium nitride layer of a Micro LED array, wiring corresponding to the Micro-LED array on a silicon substrate, and bonding an array p electrode surface and the silicon substrate by adopting a hot-press welding process to realize electrical interconnection; removing the sapphire substrate by using a laser lift-off technology, bonding the metal substrate to the n-type gallium nitride layer by using a bonding technology, and positioning the p electrode and the n electrode at two sides of the epitaxial layer, thereby realizing gold-wire-free packaging of the Micro-LED array;
the metal substrate is a copper substrate.
2. A Micro-LED array according to claim 1, wherein the light emitting chips are arranged in an array between the silicon substrate and the metal substrate.
3. The Micro-LED array of claim 1, wherein the metal contacts are made of gold or a nickel/gold alloy.
4. A method of manufacturing a Micro-LED array as claimed in any one of claims 1 to 3, comprising:
simultaneously growing a plurality of same light emitting chips on a sapphire substrate; the light-emitting chip is a chip which is sequentially grown with an n-type gallium nitride layer, a multi-quantum well layer, a p-type gallium nitride layer and a metal contact, wherein the n-type gallium nitride layer is grown on a sapphire substrate;
arranging wiring corresponding to the metal contacts on the silicon substrate according to the positions of the metal contacts on the sapphire substrate;
inverting the sapphire substrate on which the light-emitting chip grows, and bonding the inverted sapphire substrate with the silicon substrate through the metal contact and the wiring to obtain a bonded array;
peeling off the sapphire substrate on the bonding array, and then bonding a metal substrate to each n-type gallium nitride layer; preparing a metal contact on a p-type gallium nitride layer of a Micro LED array, wiring corresponding to the Micro-LED array on a silicon substrate, and bonding an array p electrode surface and the silicon substrate by adopting a hot-press welding process to realize electrical interconnection; removing the sapphire substrate by using a laser lift-off technology, bonding the metal substrate to the n-type gallium nitride layer by using a bonding technology, and positioning the p electrode and the n electrode at two sides of the epitaxial layer, thereby realizing gold-wire-free packaging of the Micro-LED array;
and growing a p-type gallium nitride layer, a multi-quantum well layer and an n-type gallium nitride layer on the sapphire substrate in sequence by adopting an MOCVD method to serve as an epitaxial layer of the Micro-LED, and performing metal deposition on the p-type gallium nitride layer of each chip of the Micro-LED array by using an evaporation deposition method after the epitaxial layer is grown to form a metal contact.
5. The method according to claim 4, wherein the step of growing the light emitting chip specifically comprises:
growing the n-type gallium nitride layer on the sapphire substrate;
growing the multiple quantum well layer on the n-type gallium nitride layer;
growing the p-type gallium nitride layer on the multi-quantum well layer;
and carrying out metal deposition on the p-type gallium nitride layer to form the metal contact.
6. The preparation method according to claim 4, wherein the bonding of the inverted sapphire substrate with the silicon substrate through the metal contacts and the wires specifically comprises:
and bonding the inverted sapphire substrate with the silicon substrate through the metal contacts and the wiring by hot-pressing flip chip bonding or ultrasonic hot-pressing bonding.
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