CN110443334B - Implementation method of RFID chip BLF - Google Patents
Implementation method of RFID chip BLF Download PDFInfo
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- CN110443334B CN110443334B CN201910863201.7A CN201910863201A CN110443334B CN 110443334 B CN110443334 B CN 110443334B CN 201910863201 A CN201910863201 A CN 201910863201A CN 110443334 B CN110443334 B CN 110443334B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K17/00—Methods or arrangements for effecting co-operative working between equipments covered by two or more of main groups G06K1/00 - G06K15/00, e.g. automatic card files incorporating conveying and reading operations
- G06K17/0022—Methods or arrangements for effecting co-operative working between equipments covered by two or more of main groups G06K1/00 - G06K15/00, e.g. automatic card files incorporating conveying and reading operations arrangements or provisious for transferring data to distant stations, e.g. from a sensing device
- G06K17/0029—Methods or arrangements for effecting co-operative working between equipments covered by two or more of main groups G06K1/00 - G06K15/00, e.g. automatic card files incorporating conveying and reading operations arrangements or provisious for transferring data to distant stations, e.g. from a sensing device the arrangement being specially adapted for wireless interrogation of grouped or bundled articles tagged with wireless record carriers
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Abstract
The invention provides a method for realizing an RFID chip BLF, which is characterized in thatComprising the following steps: (S1) after receiving a Query command sent by a card reader, the ultrahigh frequency RFID chip registers DR parameters of the Query command; (S2) after the ultrahigh frequency RFID chip receives a Query command sent by the card reader, registering the count value of the TRCAL counter; (S3) deriving period T of reverse Link clock pri And DR, TRCAL. (S4) according to the DR value (64/3 or 8), shifting and adding the count value of the TRCAL counter to calculate T pri Is a value of (2); (S5) for the T calculated in (S4) pri Shift the value of 1 bit to the right and register the shifted T pri A value; (S6) setting T pri A counter to start counting; (S7) setting CLK BLF Signal, when T pri The count value of the counter reaches the shifted T of the (S5) pri When the value is CLK BLF Taking the reverse; (S8) CLK generated by the step (S7) BLF That is, a clock that satisfies the reverse link frequency specified by the protocol may be used as a clock for the RFID chip to return data. The method can avoid using a hardware divider, and is beneficial to reducing the cost and controlling the power consumption.
Description
Technical Field
The invention belongs to the technical field of integrated circuit design. In particular, it belongs to the field of ultra-high frequency RFID chip design technology.
Background
RFID (Radio Frequency Identification), radio frequency identification technology. The radio frequency identification system generally comprises a reader-writer, an electronic tag and a rear-end data processing platform. Currently, the radio frequency identification system has penetrated aspects of daily life, such as access control, ticket systems for public transportation, logistics chain management, medical and health industries, retail industries and the like.
The RFID system can be divided into four types of low frequency, high frequency, ultra-high frequency, and microwave according to the frequency of a radio signal transmitted from the reader-writer. The working frequency of the ultra-high frequency RFID system based on the EPC Class1 Gen2 protocol is 860MHz-960MHz, and the ultra-high frequency RFID system is applied to the scenes of longer read-write distance and higher read-write speed.
The EPC Class1 Gen2 protocol defines the data rate at which an electronic tag returns to a reader as the backscatter link frequency, BLF (Back Scattered Frequency). The BLF of the tag is related to the Query command sent by the reader, as specified by the protocol. The last Query command sent by the card reader will give two parameters, TRCAL and DR, DR/TRCAL being the value of BLF. It can be seen that if an accurate backscatter frequency is calculated, a hardware divider is required in the chip, which consumes a lot of hardware resources, and poses a significant challenge for the cost and power consumption of the chip.
Disclosure of Invention
Aiming at the technical problems, the invention provides a realization method of an ultrahigh frequency RFID chip BLF.
The invention provides a realization method of an ultrahigh frequency RFID chip BLF, which comprises the following steps:
(S1) after receiving a Query command sent by a card reader, the ultrahigh frequency RFID chip registers DR parameters of the Query command, and according to EPC Class1 Gen2 protocol, 1 and 0 of DR respectively represent 64/3 or 8 values in BLF calculation;
(S2) after the ultrahigh frequency RFID chip receives a Query command sent by the card reader, setting a TRCAL counter to calculate the length of the TRCAL, and registering the count value of the TRCAL counter;
(S3) deriving period T of reverse Link clock pri And DR, TRCAL. Period T of reverse link clock pri The relationship with the reverse link frequency BLF is:according to protocol definition->So that
(S4) according to the DR value (64/3 or 8), shifting and adding the count value of the TRCAL counter to calculate T pri Is a value of (2);
(S5) for the T calculated in (S4) pri Shift the value of 1 bit to the right and register the shifted T pri A value;
(S6) setting T pri A counter to start counting;
(S7) setting CLK BLF Signal, when T pri The count value of the counter reaches the shifted T of the (S5) pri When the value is CLK BLF Taking the reverse;
(S8) CLK generated by the step (S7) BLF That is, a clock that satisfies the reverse link frequency specified by the protocol may be used as a clock for the RFID chip to return data.
Drawings
FIG. 1 is a flow chart of a method for implementing an ultra-high frequency RFID chip BLF according to the present invention
Detailed Description
Preferred embodiments of the present device will be described in detail below with reference to the accompanying drawings.
As shown in fig. 1, a method for implementing the ultra-high frequency RFID chip BLF is implemented according to the following steps:
(1) The ultrahigh frequency RFID chip receives a Query command sent by a card reader, according to the protocol specification, DR parameters in the Query command influence BLF, 1 and 0 of DR respectively represent 64/3 or 8 values in BLF calculation, and the parameter value of DR is registered in a register, namely REG_DR;
(2) The ultrahigh frequency RFID chip receives a Query command sent by a card reader, according to the protocol specification, the length of TRCAL in the Query command can affect BLF, a TRCAL counter is set to calculate the length of the TRCAL, and the count value of the TRCAL counter is registered and is recorded as TRCAL_CNT;
(3) Period T of reverse link clock pri The relationship with the reverse link frequency BLF is:according to protocol definition->Therefore->So when dr=0 ++>When dr=1, the ratio of the total power to the total power,
(4) According to said step (3), a shift calculation T pri Is a value of (2). When reg_dr=0, trcal_cnt is shifted right by 3 bits, 0 is added to the left, and the shifted value is denoted as trcal_shift0. When reg_dr=1, the trcal_cnt is shifted to the right by 6 bits, denoted as trcal_temp1, then shifted to the right by 5 bits, denoted as trcal_temp2, and then trcal_temp1 and trcal_temp2 are added, and the added result is denoted as trcal_shift1. When reg_dr=0, T pri Selecting the value of trcal_shift0, when reg_dr=1, T pri Selecting a value of TRCAL_SHIFT1;
(5) T obtained in the step (4) pri The value of (2) is shifted to the right by 1 bit, denoted T pri_half ；
(6) Set T pri A counter to start counting;
(7) Setting CLK BLF Signal, when T pri The count value of the counter is equal to T in the step (5) pri_half At a value of CLK BLF Taking the reverse;
(8) CLK generated through said step (7) BLF That is, a clock that satisfies the reverse link frequency specified by the protocol may be used as a clock for the RFID chip to return data.
The method has the advantages that the calculated BLF meets the error range specified by the protocol while avoiding using a hardware divider, the difficulty of BLF calculation in the EPC Class1 Gen2 protocol is effectively solved, hardware resources are saved, and the cost and the control power consumption of a chip are reduced.
While the present invention has been described in detail with respect to the preferred embodiments thereof, many modifications and substitutions will now become apparent to those skilled in the art upon reading the foregoing. The above description and drawings are only examples of implementing the invention, but it should be understood that the above description should not be taken as limiting the invention.
Claims (1)
1. The implementation method of the RFID chip BLF is characterized by comprising the following steps of:
(S1) after receiving a Query command sent by a card reader, the ultrahigh frequency RFID chip registers DR parameters of the Query command, and according to EPC Class1 Gen2 protocol, 1 and 0 of DR respectively represent 64/3 or 8 values in BLF calculation;
(S2) after the ultrahigh frequency RFID chip receives a Query command sent by the card reader, setting a TRCAL counter to calculate the length of the TRCAL, and registering the count value of the TRCAL counter;
(S3) period T of reverse Link clock pri The relationship with the reverse link frequency BLF is:defined according to a protocolTherefore->
(S4) according to the DR value of 64/3 or 8, shifting and adding the count value of the TRCAL counter to calculate T pri Is a value of (2);
(S5) for the T calculated in (S4) pri Shift the value of 1 bit to the right and register the shifted T pri A value;
(S6) setting T pri A counter to start counting;
(S7) setting CLK BLF Signal, when T pri The count value of the counter reaches the shifted T of the (S5) pri When the value is CLK BLF Taking the reverse;
(S8) CLK generated by the step (S7) BLF Namely, the clock meeting the reverse link frequency specified by the protocol can be used as the clock for returning data to the RFID chip;
the step (S4) is to shift and add the count value of the TRCAL counter according to the DR value of 64/3 or 8 to calculate T pri Comprises:
when reg_dr=0, right SHIFT trcal_cnt by 3 bits, left 0, shifted value record trcal_shift0; when reg_dr=1, the TRCAL_CNT is shifted to the right by 6 bits, denoted as TRCAL_TEMP1, and then
TRCAL_CNTs are shifted to the right by 5 bits and marked as TRCAL_TEMP2, then TRCAL_TEMP1 and TRCAL_TEMP2 are added, and the added result is marked as TRCAL_SHIFT1; when reg_dr=0, T pri Selection of
Value of trcal_shift0, T when reg_dr=1 pri Selecting a value of TRCAL_SHIFT1;
and (S4) performing different shift or shift addition operations according to the DR value, so as to avoid using a hardware divider.
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Citations (4)
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| CN101556644A (en) * | 2009-03-06 | 2009-10-14 | 上海复旦微电子股份有限公司 | Back link frequency regulating method in RFID label and circuit for realizing method thereof |
| CN201498011U (en) * | 2009-03-06 | 2010-06-02 | 上海复旦微电子股份有限公司 | Error shift circuit of feedback link frequency in RFID label |
| CN101814921A (en) * | 2010-03-17 | 2010-08-25 | 华东师范大学 | Coding module of digital baseband system of radio-frequency identification reader |
| US9064196B1 (en) * | 2008-03-13 | 2015-06-23 | Impinj, Inc. | RFID tag dynamically adjusting clock frequency |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| EP3091477B1 (en) * | 2015-05-07 | 2017-09-20 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Rfid reader and method for adjusting a frame length of an rfid system comprising an rfid reader |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9064196B1 (en) * | 2008-03-13 | 2015-06-23 | Impinj, Inc. | RFID tag dynamically adjusting clock frequency |
| CN101556644A (en) * | 2009-03-06 | 2009-10-14 | 上海复旦微电子股份有限公司 | Back link frequency regulating method in RFID label and circuit for realizing method thereof |
| CN201498011U (en) * | 2009-03-06 | 2010-06-02 | 上海复旦微电子股份有限公司 | Error shift circuit of feedback link frequency in RFID label |
| CN101814921A (en) * | 2010-03-17 | 2010-08-25 | 华东师范大学 | Coding module of digital baseband system of radio-frequency identification reader |
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