CN110430382B - Video recording equipment with standard definition video depth detection function - Google Patents
Video recording equipment with standard definition video depth detection function Download PDFInfo
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- CN110430382B CN110430382B CN201910783819.2A CN201910783819A CN110430382B CN 110430382 B CN110430382 B CN 110430382B CN 201910783819 A CN201910783819 A CN 201910783819A CN 110430382 B CN110430382 B CN 110430382B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N17/00—Diagnosis, testing or measuring for television systems or their details
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
Abstract
The invention discloses video recording equipment with a standard definition video depth detection function, which comprises a standard definition video decoding chip and an FPGA chip, wherein the standard definition video decoding chip is used for converting input standard definition videos with different formats into digital videos with a unified data format and sending the digital videos to the FPGA chip, and simultaneously writing a field synchronization locking state, a color carrier frequency locking state and a field frequency state into a register; the FPGA chip is used for detecting whether effective digital video input exists or not, if so, the field synchronization locking state, the color carrier frequency locking state and the field frequency state are read out from a register of the standard definition video decoding chip, and the original format of the digital video is judged. The video recording equipment provided by the invention can carry out depth detection on the standard definition video input to the aerial recording loader, accurately judge the type of the standard definition video and improve the testability and maintainability of the aerial recording loader.
Description
Technical Field
The invention belongs to the field of electronic engineering, and relates to video recording equipment with a standard definition video depth detection function.
Background
The video recording device is a professional device widely applied to various fields, the automobile data recorder records driving videos, the urban sky-eye monitoring system records urban daily operation, the aviation data loader is used for recording … … flight situations of aircrafts, and the video recording is deep into the aspects of human activities, so that necessary services and guarantees are provided for daily work and life of people.
As shown in fig. 1, the video recording device is roughly divided into 4 parts, namely a video acquisition unit, a video compression unit, a scheduling unit and a storage unit, wherein the video acquisition unit acquires an original video and then performs digital conversion, the video compression unit performs coding compression on the digital video to generate coded stream data, the storage unit receives the coded video data and stores the coded video data in a nonvolatile storage medium, and the scheduling control unit performs comprehensive management control on other functional units. In order to make video recording equipment possess good testability and maintainability, improve video recording equipment error detection, mistake proofing, anti-interference, the ability of easy maintenance, video recording equipment all possesses certain built-in test (BIT) ability, and commonly used BIT includes:
1) generating a log list, and recording important information of the operation of the video recording equipment in the log list and storing the important information in a nonvolatile storage medium;
2) detecting an input video, and judging whether the input video exists or not and characteristic information;
3) detecting a video coding frame rate;
4) monitoring heartbeat of video recording equipment;
5) link state monitoring is stored.
The standard definition video is one of video formats, has a resolution smaller than 1280x720, and is generally divided into three types, namely a PAL format, an NTSC format and a SECAM format, wherein the resolution of the PAL format video is 720 × 576@25Hz, the resolution of the NTSC format video is 720 × 480@30Hz, and the resolution of the SECAM format video is 720 × 576@25Hz, and the standard definition video is taken as a traditional video format, and although the standard definition video is eliminated in many consumer electronics products, the standard definition video is still widely applied in the field of industrial equipment, such as helmet displays, parameter displays, aviation record loaders and the like in avionic equipment. As shown in fig. 2, a schematic diagram of standard definition video detection in an aerial record loader is shown, a standard definition video decoding chip receives a video of PAL/NTSC/SECAM system and AD-converts the video into an 8bit YCbCr digital video signal of ITU-R bt.656 standard, an FPGA performs compression coding operation on the digital video signal, a CPU chip controls and obtains the state of the standard definition video decoding chip through an I2C bus, and controls and obtains data of the FPGA through a PCIE bus, and common means for inputting standard definition video include:
1) the FPGA detects the digital video through logic;
2) and the software acquires the value of the register inside the standard definition video decoding chip for detection.
By adopting the two methods, the basic condition of the input standard definition video can be generally obtained, namely whether the input video has two states or not can be obtained, the format of the input video cannot be further judged, the characteristic information of the input video cannot be obtained, the problem is difficult to deeply analyze when a fault occurs, the fault reason is timely and accurately positioned, the testability and maintainability of the aerial record loader are greatly reduced, and therefore, a method for carrying out depth detection on the standard definition video is urgently needed.
Disclosure of Invention
Aiming at the defect of detecting standard definition video by adopting the traditional method, the invention aims to provide video recording equipment with the function of detecting the depth of the standard definition video, which can carry out depth detection on the standard definition video in an aviation record loader.
The invention aims to be realized by the following technical scheme:
a video recording device with a standard definition video depth detection function comprises a standard definition video decoding chip and an FPGA chip, wherein the standard definition video decoding chip is used for converting input standard definition videos with different formats into digital videos with a uniform data format and sending the digital videos to the FPGA chip, and simultaneously writing a field synchronization locking state, a color carrier frequency locking state and a field frequency state into a register;
the FPGA chip is used for detecting whether effective digital video input exists or not, if so, the field synchronization locking state, the color carrier frequency locking state and the field frequency state are read out from a register of the standard definition video decoding chip, and the original format of the digital video is judged.
According to the above characteristics, Z is arranged on the FPGA chipVPA status bit, if the FPGA does not receive the digital video, or the FPGA receives the digital video but the frame synchronization signal interval is larger than a preset value, or the FPGA receives the digital video but detects that the video resolution is smaller than the preset value, the FPGA sends the Z signal to the FPGAVPThe status position is 0, indicating no valid digital video input.
According to the above feature, if the sync-locked state is field sync lock, the color carrier frequency lock state is color carrier frequency lock, and the field frequency state is 50Hz, it is determined that the input video is a PAL video;
if the synchronous locking state is field synchronous locking, the color carrier frequency locking state is that the color carrier frequency is not locked and the field frequency state is 50Hz, judging that the input video is an SECAM video;
and if the synchronous locking state is field synchronous locking, the color carrier frequency locking state is that the color carrier frequency is not locked and the field frequency state is 60Hz, judging that the input video is the NTSC video.
The invention has the beneficial effects that:
1) the video recording equipment provided by the invention can be used for carrying out depth detection on the standard definition video input to the aerial recording loader, accurately judging the type of the standard definition video and improving the testability and maintainability of the aerial recording loader.
2) The video recording equipment provided by the invention is suitable for detecting standard definition videos of all systems, the detection principle and the detection flow can be applied to any occasions using the standard definition videos, and the market popularization is strong.
3) The video recording equipment provided by the invention has the advantages of simple principle design, clear detection flow, easy acceptance by engineers in related fields and strong engineering applicability.
Drawings
Fig. 1 is a schematic configuration diagram of a video recording apparatus.
Fig. 2 is a schematic diagram of conventional airborne standard definition video detection.
Fig. 3 is a flowchart of standard definition video depth detection according to an embodiment.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Referring to fig. 2, the video recording device with the standard definition video depth detection function in this embodiment includes a standard definition video decoding chip and an FPGA chip, and as an example, the standard definition video decoding chip is a 7150 chip developed by a shake core technology.
State quantity Z of standard definition video depth detection mainly through FPGAVPAnd register value Z of 71500x88To determine the characteristics of the input video, the state quantity ZVPThe value is 0 or 1 for a single bit number, wherein 0 represents that the digital video received by the FPGA is invalid, and 1 represents that the digital video received by the FPGA is invalidThe digital video of (1) is valid; register value Z0x88The 7150 chip internal address is the value in the register 0x88, which is defined as shown in table 1.
TABLE 1 GM7150 chip internal 0x88 status register definition
According to the principle diagram of depth detection of the airborne standard-definition video shown in fig. 3, the process of depth detection of the airborne standard-definition video is as follows:
firstly, FPGA detects whether effective digital video input exists
According to the situation of the input video, 7150 has the following characteristics:
1. when no video input is available and power is on for the first time, 7150 enters Freerun mode and outputs the black screen signal of 8bit YCbCr of ITU-R BT.656 standard in default PAL format (720 × 576@25 Hz);
2. according to the change of an input video, 7150 can automatically adapt to the change of a video source system;
3. when the video source is from the existence to the nonexistence, 7150 enters Freurun mode and keeps the standard state of the previous video output;
4. when the video source is available from scratch, 7150 will adapt to the new video input and the video output will adapt to the format of the input video.
No matter whether analog video input exists or not, 7150 outputs 8bit YCbCr digital video signals of ITU-R BT.656 standard, so the FPGA also needs to further detect the input digital video, and if the video frame synchronization signal interval is detected to be more than 128ms or the video resolution is detected to be less than a preset value, the state quantity signal Z is transmittedVPIs set to 0. If no video signal is output when 7150 is powered down or has a fault, the state quantity signal Z is also outputVPIs set to 0.
And secondly, when effective digital video is input into the FPGA, reading out a field synchronization locking state, a color carrier frequency locking state and a field frequency state from a register of the standard definition video decoding chip, and judging the original format of the digital video.
a) PAL system video input
7150 it automatically adapts to PAL system video input and outputs PAL format (720 × 576@25Hz) 8bit YCbCr signal of ITU-R BT.656 standard, FPGA logic judges received digital video is valid, and then outputs state quantity signal ZVPAs shown in table 2, the address register of 0x88 of the 7150 chip has bit2 equal to 1, bit3 equal to 1, and bit5 equal to 1.
b) SECAM system video input
7150 it automatically adapts to video input of SECAM system and outputs 8-bit YCbCr signal of ITU-R BT.656 standard in SECAM system format (720 × 576@25Hz), FPGA logic judges received digital video is effective, and then state quantity signal Z is usedVPAs shown in table 2, the address register of 0x88 of the 7150 chip has bit2 equal to 1, bit3 equal to 0, and bit5 equal to 1.
c) NTSC system video input
7150 it automatically adapts to NTSC video input and outputs NTSC format (720 × 480@30Hz) 8-bit YCbCr signal of ITU-R BT.656 standard, FPGA logic judges the received digital video is valid, and then it will output the state quantity signal ZVPAs shown in table 2, the address register of 0x88 of the 7150 chip has bit2 equal to 1, bit3 equal to 0, and bit5 equal to 0.
TABLE 2 different video inputs GM7150 on-chip 0x88 status register values
It should be understood that equivalents and modifications of the technical solution and inventive concept thereof may occur to those skilled in the art, and all such modifications and alterations should fall within the scope of the appended claims.
Claims (2)
1. The utility model provides a video recording equipment with standard definition video degree of depth detects function, contains standard definition video decoding chip and FPGA chip, its characterized in that: the standard definition video decoding chip is used for converting input standard definition videos with different formats into digital videos with a uniform data format and sending the digital videos to the FPGA chip, and simultaneously writing a field synchronization locking state, a color carrier frequency locking state and a field frequency state into a register;
the FPGA chip is used for detecting whether effective digital video input exists or not, if so, the field synchronization locking state, the color carrier frequency locking state and the field frequency state are read out from a register of the standard definition video decoding chip, and the original format of the digital video is judged: if the synchronous locking state is field synchronous locking, the color carrier frequency locking state is color carrier frequency locking and the field frequency state is 50Hz, judging that the input video is PAL video;
if the synchronous locking state is field synchronous locking, the color carrier frequency locking state is that the color carrier frequency is not locked and the field frequency state is 50Hz, judging that the input video is an SECAM video;
and if the synchronous locking state is field synchronous locking, the color carrier frequency locking state is that the color carrier frequency is not locked and the field frequency state is 60Hz, judging that the input video is the NTSC video.
2. The video recording device with the standard definition video depth detection function as claimed in claim 1, wherein the FPGA chip is provided with ZVPA status bit, if the FPGA does not receive the digital video, or the FPGA receives the digital video but the frame synchronization signal interval is larger than a preset value, or the FPGA receives the digital video but detects that the video resolution is smaller than the preset value, the FPGA sends the Z signal to the FPGAVPThe status position is 0, indicating no valid digital video input.
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| CN1131855A (en) * | 1994-11-30 | 1996-09-25 | 三星电子株式会社 | Multi-broadcast channel selection apparatus |
| CN1777257A (en) * | 2005-11-29 | 2006-05-24 | 天津三星电子显示器有限公司 | Method for automatically identifying received signal standard for analogue television signal receiver |
| CN102176749A (en) * | 2011-01-18 | 2011-09-07 | 凌阳科技股份有限公司 | Method and device for automatically selecting audio format of tuner |
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