CN110429078A - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN110429078A CN110429078A CN201910782376.5A CN201910782376A CN110429078A CN 110429078 A CN110429078 A CN 110429078A CN 201910782376 A CN201910782376 A CN 201910782376A CN 110429078 A CN110429078 A CN 110429078A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- Microelectronics & Electronic Packaging (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The present invention provides a kind of array substrate, display panel and display device, is related to field of display technology, even to avoid damage of the ESD event to cabling reducing, moreover it is possible to reduce the influence to the area of display panel.Wherein, array substrate includes: underlay substrate, and underlay substrate is provided with cabling, and the cabling has point；It is provided with conductive layer between the cabling and underlay substrate, is provided with insulating layer between the conductive layer and the cabling；Wherein, the conductive layer at least part is oppositely arranged with the point, so that conductive layer forms the release way of the charge of release point accumulation.
Description
Technical field
The present invention relates to field of display technology more particularly to a kind of array substrates, display panel and display device.
Background technique
The design that long cabling is inevitably had in array process, due to the easy stored charge of long cabling, and adjacent two
The charge of a long cabling easily has differences, in this way, being easy to produce Electro-static Driven Comb ESD (Electro on the head of cabling
Static Discharge) phenomenon.The generation of ESD event then will lead to electrical connection failure, then lead to various bad phenomenons.
In the related technology, in order to improve ESD event, usually relevant tracks are shorted, such as can be by grid and drain electrode
It is shorted；In this way, break-over of device can be made when source voltage is higher, so that the charge of accumulation is released.
However, will increase display panel since grid and the drain electrode occupied area of short-circuit structure is larger
Cost.
Summary of the invention
In view of the above-mentioned drawbacks in the prior art, the present invention provides a kind of array substrate, display panel and display device, uses
To reduce or even avoid damage of the ESD event to cabling, moreover it is possible to reduce the influence to the area of display panel.
One aspect of the invention is to provide a kind of array substrate, comprising: underlay substrate, underlay substrate are provided with cabling, institute
Cabling is stated with point；Conductive layer is provided between the cabling and underlay substrate, between the conductive layer and the cabling
It is provided with insulating layer；Wherein, the conductive layer at least part is oppositely arranged with the point, so that conductive layer formation is released
Put the release way of the charge of point accumulation.
In a kind of wherein possible implementation, the point includes the end regions of the cabling.
In a kind of wherein possible implementation, the point includes the bending region of the cabling.
In a kind of wherein possible implementation, the point is located at described lead in the orthographic projection of the conductive layer surface
In electric layer surface.
In a kind of wherein possible implementation, the insulating layer is provided at least one via hole, has at least partly described
Point passes through at least one described via hole and is electrically connected with the conductive layer.
In a kind of wherein possible implementation, there is at least partly corresponding conductive layer of point to be connected；It is connected
The conductive layer connect and corresponding cabling insulation set.
In a kind of wherein possible implementation, the conductive layer is made of semiconductor material.
In a kind of wherein possible implementation, the conductive layer can rounded, rectangle or triangle.
Another aspect of the invention is to provide a kind of display panel, including such as aforementioned described in any item array substrates.
Another aspect of the present invention is to provide a kind of display device, including such as aforementioned described in any item display panels.
Array substrate, display panel and display device provided by the invention, by being arranged between cabling and underlay substrate
Conductive layer, and conductive layer has the point at least partly with cabling easily stored charge to be oppositely arranged, will be walked by conductive layer
The charge release of line accumulation even avoids damage of the ESD event to cabling to be conducive to reduce, is conducive to guarantee electricity in display panel
The reliability of connection, and then be conducive to guarantee the functional reliability of display panel.Also, the structure of conductive layer and insulating layer is simple,
Influence to the area of display panel is smaller, and the influence to the cost of display panel is smaller.
Detailed description of the invention
The drawings herein are incorporated into the specification and forms part of this specification, and shows and meets implementation of the invention
Example, and be used to explain the principle of the present invention together with specification.
Fig. 1 is the structural schematic diagram for the display panel that an example provides；
Fig. 2 is the structural schematic diagram of array substrate in the display panel that an example provides；
Fig. 3 is the structural schematic diagram of cabling and conductive layer in the display panel that an example provides；
Fig. 4 is the structural schematic diagram of cabling and conductive layer in the display panel that another example provides；
Fig. 5 is the structural schematic diagram of cabling and conductive layer in the display panel that another example provides；
Fig. 6 is the structural schematic diagram of cabling and conductive layer in the display panel that another example provides.
Description of symbols:
1- display panel；11- array substrate；12- display element；13- pixel confining layer；111- underlay substrate；112- is walked
Line；112a- point；113- insulating layer；114- conductive layer；115- via hole；116- conductive tie layers.
Through the above attached drawings, it has been shown that the specific embodiment of the present invention will be hereinafter described in more detail.These attached drawings
It is not intended to limit the scope of the inventive concept in any manner with verbal description, but is by referring to specific embodiments
Those skilled in the art illustrate idea of the invention.
Specific embodiment
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.
Based on the embodiments of the present invention, those of ordinary skill in the art are obtained without making creative work
The every other embodiment obtained, shall fall within the protection scope of the present invention.In the absence of conflict, following embodiment and implementation
Feature in example can be combined with each other.
Wherein, the term of "upper", "lower" etc. is for describing the relative positional relationship of each structure in the accompanying drawings, only
Convenient for being illustrated for narration, rather than to limit the scope of the invention, relativeness is altered or modified, in no essence
It changes under technology contents, when being also considered as the enforceable scope of the present invention.
In the present invention unless specifically defined or limited otherwise, fisrt feature in the second feature " on " or " down " can be with
It is that the first and second features directly contact or the first and second features pass through intermediary mediate contact.Moreover, fisrt feature exists
Second feature " on ", " top " and " above " but fisrt feature be directly above or diagonally above the second feature, or be merely representative of
First feature horizontal height is higher than second feature.Fisrt feature can be under the second feature " below ", " below " and " below "
One feature is directly under or diagonally below the second feature, or is merely representative of first feature horizontal height less than second feature.
Due to easily generating ESD event in the processing procedure of array substrate.The generation of ESD event then will lead to display panel
Interior electrical connection failure, then leads to various bad phenomenons.And charge is discharged by being shorted relevant tracks in the related technology
Mode, the occupied area of circuit structure for being shorted route is larger, will increase the cost of display panel.
In view of this, the embodiment of the present invention provides a kind of array substrate, display panel and display device, by cabling court
Conductive layer is set to the side of underlay substrate, and conductive layer has at least partly opposite with the point of cabling easily stored charge set
It sets, is discharged with the charge for being accumulated cabling by conductive layer, even avoid unfavorable shadow caused by ESD event to be conducive to reduce
It rings.
Embodiment one
As shown in Figure 1, the present embodiment provides a kind of display panels 1, comprising: array substrate 11, display element 12 and picture
Plain confining layers 13.Wherein, display element 12 and pixel confining layer 13 are set to the surface of array substrate 11.In some instances,
Display element 12 being capable of self-luminous；Display element 12 may include anode, the organic luminous layer for stacking setting array in substrate surface
And cathode；After display panel 1 is powered, under the driving for the electric field that anode and cathode are formed, hole and electronics are in organic luminous layer
Middle combination, so that organic luminous layer shines.Pixel confining layer 13 is for separating display element 12.
Array substrate 11 can be used for carrying other devices of display panel 1, and flow into display element 12 for controlling
Electric current.As shown in Fig. 2, array substrate 11 may include underlay substrate 111 and the cabling 112 for being set to underlay substrate 111.
In some instances, underlay substrate 111 can be made of following at least one material: polyimides, polyphenyl second
Alkene, polyethylene terephthalate, Parylene, polyether sulfone or polyethylene naphthalate.The system of underlay substrate 111
Preparation Method includes coating-solidification method, ink-jet printing, the tape casting.You need to add is that since underlay substrate 111 is relatively thin, generally
In 10-1000um, cause underlay substrate 111 easily-deformable, in order to keep the position for the device being produced on underlay substrate 111 accurate,
The surface that underlay substrate 111 is first prepared or is adsorbed on hard substrate is generally required, again by underlay substrate after progress device preparation
111 remove from hard substrate.
Certainly, the material of underlay substrate 111 and preparation process are not limited to this, and the present embodiment is merely illustrative herein；
The present embodiment is to the material and preparation process of underlay substrate 111 and is not specifically limited.Such as: underlay substrate 111 also can wrap
It includes glass or is made of glass.
In some instances, which can be metal routing 112 made of metal.For example, the cabling
112 can be used for being formed grid or drain electrode.In another example the cabling 112 can be used for by the element of 11 viewing area of array substrate with
Outer member electrical connection.By taking cabling 112 is metal routing 112 as an example: being usually to be initially formed gold when preparing metal routing 112
Belong to layer, the structures such as gluing (photoresist), exposure mask, exposure, development, etching, removing (remaining photoresist) then are carried out to metal layer
Figure technique, and form the cabling 112 of preset shape.
Certainly, the material of cabling 112, position, effect and preparation process are not limited to this, and the present embodiment is only lifted herein
Example explanation；The present embodiment does not do specific limit herein for material, position, effect and the preparation process of 112 cabling 112 of cabling
It is fixed.
For ease of description, the present embodiment and following embodiments might as well be with underlay substrates 111 towards the direction of display element 12
To be upper, such as the arrow S in Fig. 2；Under then direction of the underlay substrate 111 far from display element 12 is.
The downside of cabling 112 can be disposed with insulating layer 113 and conductive layer 114.Namely the downside of cabling 112 is provided with
Insulating layer 113, the downside of insulating layer 113 are provided with conductive layer 114.Insulating layer 113 can be made of common insulating materials.Insulation
The shape of layer 113 can be adapted with the structure of point 112a or conductive layer 114.As shown in Fig. 3, Fig. 4 and Fig. 5, insulating layer
113 are provided at least one via hole 115, have at least partly point 112a to pass through 114 electricity of at least one via hole 115 and conductive layer
Connection.Wherein, cabling 112 may include main part and the point 112a being connected with main part.
In some instances, via hole 115 can for one namely point 112a can by a via hole 115 with lead
Electric layer 114 is electrically connected；The via hole 115, which can be set, may be provided at point in the central area of point 112a or the via hole 115
The region of end 112a change in shape sharply, alternatively, the side that point 112a deviates from main part is arranged in the via hole 115.
In other examples, via hole 115 can be to be multiple, and multiple via holes 115 can be spaced apart.For example, via hole 115
It can be two, one in two via holes 115 can be located at point 112a towards the side of main part or be arranged in point
The central area of end 112a, one in two via holes 115 can be set and deviate from the side of main part in point 112a.
Another example is: via hole 115 can be three or more, each via hole 115 can be along from the side towards main part to another
The direction interval of side is arranged.Certainly, the distribution mode of via hole 115 is not limited to this, and via hole 115 can also be between closed curve
Every the apex for being distributed or being distributed in polygon.
In this example, by the way that multiple via holes 115 are arranged, the charge at 112 tip of cabling is enabled to pass through multiple via holes
115 are rapidly discharged into conductive layer 114, to be conducive to reduce ESD event to the adverse effect of the components such as cabling 112.Wherein, may be used
Conductive metal layer is formed on the hole wall of via hole 115 by techniques such as chemical depositions, so that cabling 112 can be with conduction
Layer 114 is electrically connected.Via hole is alternatively referred to as plated through-hole.
Display panel 1 provided in this embodiment, by the way that conductive layer 114 is arranged between cabling 112 and underlay substrate 111,
And conductive layer 114 has the point 112a at least partly with the easily stored charge of cabling 112 to be oppositely arranged, to pass through conductive layer
114 charges for accumulating cabling 112 discharge, and even avoid damage of the ESD event to cabling 112 to be conducive to reduce, are conducive to protect
The reliability being electrically connected in display panel 1 is demonstrate,proved, and then is conducive to guarantee the functional reliability of display panel 1.Also, conductive layer 114
And the structure of insulating layer 113 is simple, the influence to the area of display panel 1 is smaller, the influence to the cost of display panel 1 compared with
It is small.
In a kind of wherein possible implementation, point 112a includes the end regions of cabling 112.That is, cabling
112 main parts with strip, the both ends of main part are connected separately with point 112a.Wherein, the electricity of end regions accumulation
The difference that lotus can be greater than charge and main part that the first preset value of main part namely end regions accumulate is greater than the first preset value；
Alternatively, the charge of end regions accumulation reaches the second preset value.The present embodiment is herein for the first preset value and the second preset value
Specific value be not specifically limited, those skilled in the art can be configured according to actual needs.
Wherein, having in via hole 115 at least partly can be set in the relatively large number of region of point 112a stored charge, with
It is quickly released conducive to charge.At this point, the via hole 115 can be set at the center of point 112a when via hole 115 is one
Region or the via hole 115, which can be set, deviates from the side of main part in point 112a.It is multiple when via hole 115 is multiple
The side that point 112a deviates from main part is at least partially set in via hole 115.
In this implementation, conductive layer 114 is arranged by the downside of the end regions in cabling 112, to pass through conductive layer
114 rapidly discharge the charge of 112 end of cabling accumulation.
In a kind of wherein possible implementation, point 112a includes the bending region of cabling 112.That is, cabling
112 can be in bending setting.For example, cabling 112 may include first segment and second segment, there is angle between first segment and second segment,
Then the junction and its peripheral region of first segment and second segment then form point 112a.
Wherein, the charge of bending region accumulation can be greater than the other region third preset values of cabling 112, namely bending region product
The difference of tired charge and other regions is greater than third preset value；Alternatively, the charge of bending region accumulation reaches the 4th preset value.
The present embodiment is not specifically limited herein for the specific value of third preset value and the 4th preset value, and those skilled in the art can
It is configured according to actual needs.
Having in via hole 115 at least partly can be set in the relatively large number of region of point 112a stored charge, in favor of
Charge is quickly released.At this point, the via hole 115 can be set in the center of point 112a when via hole 115 is one
The junction in first segment and second segment can be set in domain or the via hole 115.When via hole 115 is multiple, multiple via holes
The junction of first segment and second segment is at least partially set in 115.
In this implementation, conductive layer 114 is arranged by the downside in the bending region in cabling 112, to pass through conductive layer
114 rapidly discharge the charge of 112 end of cabling accumulation.
In a kind of wherein possible implementation, orthographic projection of the point 112a on 114 surface of conductive layer is located at conduction
In 114 surface of layer.For example, orthographic projection of the point 112a in the upper surface of conductive layer 114 is located at the upper surface of conductive layer 114
It is interior.In this way, conductive layer 114 is enabled to coat the point 112a of cabling 112, the charge conducive to point 112a accumulation can
It is rapidly discharged to conductive layer 114.
Optionally, conductive layer 114 can rounded, oval or polygon；Polygon may include rectangle, triangle or
Person's star.In this way, being conducive to the point 112a that conductive layer 114 coats cabling 112, the charge conducive to point 112a accumulation can
It is rapidly discharged to conductive layer 114.
Wherein, the area of conductive layer 114 can be greater than the area of point 112a, in favor of opposite increase point 112a's
Area, conducive to the risk for even avoiding point discharge is reduced.Point 112a is in the edge of the projection of 114 upper surface of conductive layer
There is pre-determined distance, in favor of opposite increase tip between at least part, and the edge of 114 upper surface corresponding position of conductive layer
The area of portion 112a.Wherein, the present embodiment herein for pre-determined distance specific value without limitation, those skilled in the art can
It is configured according to actual needs.
In a kind of wherein possible implementation, conductive layer 114 is made of semiconductor material.Wherein, semiconductor material
Including silicon, germanium, GaAs etc..For example, semiconductor material can be P-Si type semiconductor material.
In the present embodiment, by the lower section of 112 point 112a of cabling be arranged conductive layer 114, and cabling 112 with lead
Between electric layer 114 be arranged insulating layer 113, insulating layer 113 be arranged via hole 115, with by via hole 115 by point 112a with lead
Electric layer 114 connects, in this way, can increase the area of point 112a, relatively conducive to the risk for even avoiding point discharge is reduced.
Wherein, it when point discharge is inevitable, can also be discharged by conductive layer 114, to be conducive to reduce to cabling 112
The adverse effect of itself.In addition, by the way that insulating layer 113, point are arranged between conductive layer 114 and the point 112a of cabling 112
When the electric discharge of end, charge can puncture the insulating layer 113, with by the charge of the small size accumulation of insulating layer 113, to be further reduced pair
The adverse effect of cabling 112 itself.
Embodiment two
Please continue to refer to Fig. 1 and Fig. 2, it is battle array in place of display panel 1 provided in this embodiment, with the difference of embodiment one
The structure of column substrate 11 is different.
In the present embodiment, array substrate 11 may include underlay substrate 111 and the cabling 112 for being set to underlay substrate 111.
Conductive layer 114 and insulating layer 113 are provided between cabling 112 and underlay substrate 111, cabling 112 has point 112a.Such as figure
Shown in 6, there is the corresponding conductive layer 114 of at least partly point 112a to connect；The conductive layer 114 being connected passes through insulating layer 113
With corresponding 112 insulation set of cabling.
Insulating layer 113 is for conductive layer 114 and cabling 112 to be isolated entirely from, in case conductive layer 114 and cabling 112 connect
It connects, to be conducive to that the signal between each conducting wire is avoided to interfere with each other.Wherein, the shape of insulating layer 113 can with point 112a or
The structure of person's conductive layer 114 is adapted, so that conductive layer 114 and cabling 112 are isolated entirely from by insulating layer 113, in favor of
The signal between each conducting wire is avoided to interfere with each other.
It is to be understood that the part that the present embodiment is not illustrated the structure of display panel 1 can be with aforementioned implementation
Example is same or similar, and details are not described herein again for the present embodiment.
By the way that insulating layer 113 and conductive layer 114 are arranged below cabling 112, and adjacent conductive layer 114 is connected,
In this way, the charge of 112 point 112a of cabling release can then puncture insulating layer 113 and discharge to conductive layer 114, to be conducive to subtract
Adverse effect of few point discharge to cabling 112 itself.Also, the structure of conductive layer 114 and insulating layer 113 is simple, to display
The influence of the area of panel 1 is smaller, and the influence to the cost of display panel 1 is smaller.
In the present embodiment, during charge punctures insulating layer 113, insulating layer 113 will consume at least partly charge；In
After charge punctures insulating layer 113, then the charge of 112 point 112a of cabling then can rapidly be discharged to conductive layer 114
And discharged by conductive layer 114, to be conducive to reduce point discharge to the adverse effect of cabling 112 itself.
As shown in fig. 6, array substrate 11 further includes conductive tie layers 116 in a kind of wherein possible implementation, lead
Electric connection layer 116 will be for will at least partly conductive layer 114 be electrically connected.In this way, by the point of 112 corresponding position of adjacent traces
Conductive layer 114 below 112a connects, to improve the ability that conductive layer 114 discharges charge, to be conducive to reduce point discharge pair
The adverse effect of cabling 112 itself.
In some instances, conductive layer 114 can be in rectangle, the tip that the conductive layer 114 of rectangle has part to stretch out cabling 112
Portion 112a, and conductive layer 114 at the point 112a of 112 corresponding position of adjacent traces, tip can be stretched out along corresponding direction
Portion 112a, so that adjacent conductive layer 114 is connected by conductive tie layers 116.Conductive tie layers 116 can be in rectangle.
In other examples, conductive layer 114 can rounded, oval, star or triangle, conductive layer 114 has part
Stretch out the point 112a of cabling 112, and conductive layer 114 at the point 112a of 112 corresponding position of adjacent traces, can be along phase
Point 112a is stretched out in the direction answered；Conductive tie layers 116 can be in rectangle or ellipse or triangle etc..
In alternatively possible implementation, conductive layer 114 includes covering portion and interconnecting piece, and covering portion is arranged corresponding
The underface of conductive layer 114, and covering portion has at least edge to stretch out point 112a, the part of covering portion stretching point 112a
It can be connect with interconnecting piece, interconnecting piece with adjacent conductive layer 114 for connecting；In this way, by the tip of 112 corresponding position of adjacent traces
Conductive layer 114 below portion 112a connects, to improve the ability that conductive layer 114 discharges charge, to be conducive to reduce point discharge
To the adverse effect of cabling 112 itself.
In some instances, covering portion can be in rectangle, circle, ellipse, star or triangle, and covering portion has part to stretch
The point 112a of cabling 112 out, and covering portion at the point 112a of 112 corresponding position of adjacent traces, can be along corresponding
Point 112a is stretched out in direction, in favor of the connection of the interconnecting piece of adjacent conductive layer 114.Interconnecting piece can be in rectangle or ellipse
Or triangle etc..
Embodiment three
Please continue to refer to Fig. 1 to Fig. 6, the present embodiment and embodiment one or embodiment two the difference is that, array
The structure of substrate 11 is different.
In the present embodiment, portion tip portion 112a can be connect by via hole 115 with conductive layer 114 below；Part point
End 112a can be separated it with conductive layer 114 by insulating layer 113, in the conductive layer 114 not connect with point 112a, have to
Small part is connected.In this way, being conducive to that corresponding release way is arranged according to the environment around cabling 112, it is conducive to reduce technique hardly possible
Degree, and it is conducive to reduce conductive layer 114 etc. to the adverse effect of other structures.
Example IV
Please continue to refer to Fig. 1 to Fig. 6, the present embodiment provides a kind of array substrate 11, the structure of array substrate 11 is aforementioned
Array substrate 11 in embodiment one or embodiment two or embodiment three.
Wherein, the structure of array substrate 11, function and realize process can with previous embodiment one or embodiment two or
Array substrate 11 in embodiment three is same or similar, and details are not described herein again for the present embodiment.
Embodiment five
Please continue to refer to Fig. 1 to Fig. 6, the present embodiment provides a kind of display device, display device can be TV, digital phase
Any equipment having a display function such as machine, mobile phone, tablet computer, smartwatch, e-book, navigator.Display device includes
Such as the display panel 1 of previous embodiment one or embodiment two or embodiment three.
Wherein, the structure, function of display panel 1 and realization process can be same or similar with previous embodiment, this implementation
Details are not described herein again for example.
In addition, in the present invention unless specifically defined or limited otherwise, term " installation ", " connected ", " connection ", " Gu
It is fixed " etc. terms shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or integral；It can be
It is connected directly, the mutual of connection inside two elements or two elements can also be can be indirectly connected through an intermediary
Interactively.For the ordinary skill in the art, it can understand as the case may be above-mentioned term in the present invention
Concrete meaning.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (10)
1. a kind of array substrate characterized by comprising underlay substrate, underlay substrate are provided with cabling, and the cabling has point
End；It is provided with conductive layer between the cabling and underlay substrate, is provided with insulating layer between the conductive layer and the cabling；
Wherein, the conductive layer at least part is oppositely arranged with the point, so that conductive layer forms release point
The release way of the charge of accumulation.
2. array substrate according to claim 1, which is characterized in that the point includes the end region of the cabling
Domain.
3. array substrate according to claim 1, which is characterized in that the point includes the bent area of the cabling
Domain.
4. array substrate according to claim 1, which is characterized in that positive throwing of the point in the conductive layer surface
Shadow is located in the conductive layer surface.
5. array substrate according to claim 1-4, which is characterized in that the insulating layer is provided at least one
Via hole has at least partly described point to pass through at least one described via hole and is electrically connected with the conductive layer.
6. array substrate according to claim 1-4, which is characterized in that there is at least partly corresponding institute of point
Conductive layer is stated to be connected；The conductive layer being connected and corresponding cabling insulation set.
7. array substrate according to claim 1, which is characterized in that the conductive layer is made of semiconductor material.
8. array substrate according to claim 1, which is characterized in that the conductive layer can rounded, rectangle or triangle
Shape.
9. a kind of display panel, which is characterized in that including such as described in any item array substrates of claim 1-8.
10. a kind of display device, which is characterized in that including display panel as claimed in claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910782376.5A CN110429078A (en) | 2019-08-23 | 2019-08-23 | Array substrate, display panel and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910782376.5A CN110429078A (en) | 2019-08-23 | 2019-08-23 | Array substrate, display panel and display device |
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| CN110429078A true CN110429078A (en) | 2019-11-08 |
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| CN201910782376.5A Pending CN110429078A (en) | 2019-08-23 | 2019-08-23 | Array substrate, display panel and display device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11380674B2 (en) | 2020-03-30 | 2022-07-05 | Xiamen Tianma Micro-Electronics Co., Ltd. | Array substrate, display panel and display device |
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| CN105679771A (en) * | 2016-01-29 | 2016-06-15 | 厦门天马微电子有限公司 | Array substrate and manufacturing method thereof and display panel comprising array substrate |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101226954A (en) * | 2007-01-19 | 2008-07-23 | 三星Sdi株式会社 | Organic light emitting display |
| CN105679771A (en) * | 2016-01-29 | 2016-06-15 | 厦门天马微电子有限公司 | Array substrate and manufacturing method thereof and display panel comprising array substrate |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11380674B2 (en) | 2020-03-30 | 2022-07-05 | Xiamen Tianma Micro-Electronics Co., Ltd. | Array substrate, display panel and display device |
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