CN110416322A - A kind of overlayer passivation structure and preparation method thereof and solar battery - Google Patents
A kind of overlayer passivation structure and preparation method thereof and solar battery Download PDFInfo
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
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- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
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Abstract
The invention discloses a kind of preparation methods of overlayer passivation structure comprising: in front side of silicon wafer deposit passivation layer, N-type polycrystalline silicon layer, intrinsically polysilicon layer；It adulterates and high-temperature process forms N+Type polysilicon layer；In N+Anti-reflection layer is formed on type polysilicon layer；By the passivation layer in non-electrode region, N+Type polysilicon layer, anti-reflection layer removal；Obtain overlayer passivation structure finished product.A kind of solar battery the invention also discloses overlayer passivation structure and comprising above-mentioned overlayer passivation structure.Implement the present invention, dangling bonds can be removed and reduce surface state, promotes the efficiency of solar battery.
Description
Technical field
The present invention relates to technical field of solar batteries more particularly to a kind of overlayer passivation structure and preparation method thereof and too
Positive energy battery.
Background technique
In order to improve the efficiency of crystal silicon solar batteries, it is necessary to carry out good passivation to battery surface, reduce surface and lack
Fall into the compound open-circuit voltage to improve battery.Existing passivating technique focuses mostly in the passivating back of solar battery, such as height
Imitate solar cell inactivating emitter junction back surface solar battery (PERC) and back side emitter knot, back side local diffusion solar-electricity
(PERL) achieves great success in pond, and wherein the incident photon-to-electron conversion efficiency of PERL solar battery has reached 24.7%；Sun
The back contact solar cells (IBC) of Power company production and hetero-junctions (the Hetero junction of Sanyo company production
Intrinsic Thin layer, HIT) solar battery, efficiency is 24% and 23% etc. respectively.These solar batteries without
One exception uses back side face passivating technique, is that the useful life of solar energy is maintained at higher level, to obtain higher
Open-circuit voltage and short circuit current.
And generally comprise that full surface is heavily doped, selectivity is heavily doped and growth is heavy for the passivating method of solar battery front side
The structures such as product silica, silicon nitride, silica/silicon nitride stack.But these structures are for the passivation effect on cell piece p-type surface
It is limited, limit the promotion of further battery efficiency.
In order to promote passivation effect, Chinese patent application 201811081406.1 is proposed using passivation tunnel layer+N+Type
Polysilicon layer+silicon nitride layer carries out the technology of front side of silicon wafer passivation, achieves good passivation effect.It mainly uses LPCVD
It deposited silicon oxide layer and polysilicon layer in the silicon chip surface of making herbs into wool, then make polysilicon layer form N using phosphorus doping+Type
Polysilicon layer；This process is more complicated, and the time is longer；And since polysilicon layer is thicker, it is not easy to uniform doping is formed, into
And make sheet resistance uneven, or for the Effective Doping of polysilicon, it needs to be promoted surface phosphorus doping density, will also result in this way
Battery open circuit voltage decline, thereby reduces the transformation efficiency of solar battery.
Summary of the invention
Technical problem to be solved by the present invention lies in, a kind of preparation method of overlayer passivation structure is provided, it can be effective
Passivation advantage is played, surface recombination is reduced；The process time is short simultaneously, high production efficiency.
The present invention also technical problems to be solved are, provide a kind of overlayer passivation structure, and theoretical open circuit voltage is high.
The present invention also technical problems to be solved are, provide a kind of overlayer passivation contact solar cell, conversion effect
Rate is high.
In order to solve the above-mentioned technical problems, the present invention provides a kind of preparation methods of overlayer passivation structure comprising:
(1) silicon wafer is pre-processed；
(2) in front side of silicon wafer growth of passivation layer；
(3) N-type polycrystalline silicon layer is grown on the passivation layer；
(4) intrinsically polysilicon layer is grown on the N-type polycrystalline silicon layer；
(5) phosphorus doping is carried out to the intrinsically polysilicon layer, and silicon wafer is subjected to high-temperature process, on the passivation layer
Form N+Type polysilicon layer；
(6) in the N+Anti-reflection layer is deposited on polysilicon layer；
(7) by front side of silicon wafer non-electrode region passivation layer, N+Type polysilicon layer, anti-reflection layer removal；Obtain overlayer passivation structure
Finished product.
As an improvement of the above technical solution, in step (2), ozone oxidation, shape are carried out to the silicon wafer with flannelette
At passivation layer；The passivation layer is silicon dioxide layer.
As an improvement of the above technical solution, enterprising in the passivation layer using LPCVD method or PECVD in step (3)
Row deposit polycrystalline silicon is passed through the phosphine that concentration is 5-15% in deposition process and is doped, to form N-type polycrystalline silicon layer.
As an improvement of the above technical solution, in step (4), using LPCVD or PECVD in the N-type polycrystalline silicon layer
Upper deposition intrinsic polysilicon layer；
In step (5), phosphorus doping is carried out using the method for phosphorus source diffusion, injection phosphine or spin coating.
As an improvement of the above technical solution, the N-type polycrystalline silicon layer and intrinsically polysilicon layer are deposited using LPCVD method；
In step (5), the temperature of the high-temperature process is 750-950 DEG C.
As an improvement of the above technical solution, the passivation layer with a thickness of 2-5nm；The thickness of the N-type polycrystalline silicon layer
For 50-70nm；The intrinsically polysilicon layer with a thickness of 50-200nm.
As an improvement of the above technical solution, the passivation layer with a thickness of 2-5nm；The thickness of the N-type polycrystalline silicon layer
For 50-60nm；The intrinsically polysilicon layer with a thickness of 100-200nm.
As an improvement of the above technical solution, the silicon wafer is p type single crystal silicon piece.
Correspondingly, using above-mentioned preparation method to be prepared the present invention also provides a kind of overlayer passivation structure.
Correspondingly, the present invention also provides a kind of overlayer passivation contact solar cells comprising above-mentioned overlayer passivation knot
Structure.
The invention has the following beneficial effects:
1. of the invention first deposited N-type polycrystalline silicon layer in silicon chip surface, then by the high-temperature process in later period, so that it changes
For N+Type polysilicon layer；N-type polycrystalline silicon layer deposition, the compound N made close to substrate of the two are carried out using LPCVD method simultaneously+Layer side
Resistance uniformly, facilitates the open-circuit voltage for promoting passivating structure.
2. of the invention by N+Type polysilicon layer is divided into two sections of formation, and first segment forms N-type polycrystalline silicon layer using doping in situ,
Later period forms N by high-temperature process+Layer；Second segment adulterates phosphorus by deposition intrinsic polysilicon layer, and high-temperature process forms N+Layer.This
The process time is just substantially saved, process efficiency is accelerated.
3. the present invention is prepared for overlayer passivation structure in front side of silicon wafer electrode district by reasonable technique, effectively play
Passivation can remove dangling bonds and reduce surface state, promotes the efficiency of solar battery.Meanwhile overlayer passivation structure is not yet
Non-electrode region is blocked, does not influence the absorption of sunlight.
Detailed description of the invention
Fig. 1 is a kind of preparation method flow chart of overlayer passivation structure of the present invention；
Fig. 2 is a kind of structural schematic diagram of overlayer passivation structure of the present invention；
Fig. 3 is a kind of structural schematic diagram of overlayer passivation contact solar cell of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, the present invention is made into one below in conjunction with attached drawing
Step ground detailed description.Only this is stated, the present invention occurs in the text or will occur up, down, left, right, before and after, it is inside and outside etc. just
Position word is not to specific restriction of the invention only on the basis of attached drawing of the invention.
Referring to Fig. 1, the invention discloses a kind of preparation methods for being passivated contact structures comprising:
S1: silicon chip surface is pre-processed；
Specifically, the pretreatment includes: to clean silicon wafer, surface organic matter and damaging layer are removed；Then it carries out
Polishing；After polishing, the reflectivity of silicon wafer is controlled in 20-40%；The silicon wafer of this reflectivity range is after supporting battery to Mrs's sun
Light absorptivity with higher, can promote the transfer efficiency of solar battery.
The pretreatment can also are as follows: cleans to silicon wafer, removes surface organic matter and damaging layer；Then it is carved using wet process
Erosion technology carries out making herbs into wool；Preferably, after making herbs into wool, silicon wafer reflectivity 10.5%-11.5%.
S2: in front side of silicon wafer growth of passivation layer；
Wherein, the passivation layer is silicon dioxide layer, with a thickness of 2-5nm.Silicon dioxide layer can efficiently separate electricity
Son and hole reduce the loss of surface fill factor, promote the efficiency of solar battery；Also it can play a protective role to silicon wafer,
So that phosphorus slurry does not enter silicon wafer among subsequent deposition, diffusion process, silicon wafer is polluted.
The present invention forms passivation layer by ozone oxidation；Specifically, controlled at 30-100 DEG C, nitrogen atmosphere it
In, carry out ozone oxidation；Since ozone oxidation is slower, thus control passivation layer with a thickness of 2-5nm, this thickness range can play good
Protective effect well, passivation, are easily formed.
S3: N-type polycrystalline silicon layer is grown on the passivation layer；
Wherein, using LPCVD method or PECVD on the passivation layer deposit polycrystalline silicon, be passed through among deposition process dense
Degree is that the phosphine of 5-15% is doped, to form N-type polycrystalline silicon layer；Preferably, using LPCVD method deposit polycrystalline silicon；Doping
It is passed through phosphine among process and carries out doping in situ.LPCVD method reaction temperature is lower (500 DEG C of <)；Deposition velocity is fast, saves energy
Amount.And more importantly the deposition uniformity of LPCVD method is high, influenced by depositing temperature and concentration of medium smaller.
Preferably, the N-type polycrystalline silicon layer with a thickness of 50-70nm；Preferably 50-60nm.
S4: intrinsically polysilicon layer is grown on the N-type polycrystalline silicon layer；
Specifically, using LPCVD method or PECVD on the passivation layer deposition intrinsic polysilicon；Preferably, it uses
LPCVD method deposit polycrystalline silicon；LPCVD method reaction temperature is lower (500 DEG C of <)；Deposition velocity is fast, saves energy；And depositing homogeneous
Property it is high.
Preferably, the intrinsically polysilicon layer with a thickness of 50-200nm；Preferably 100-160nm.This thickness range
Intrinsically polysilicon layer is being converted to N+There is good passivation after polysilicon layer.Meanwhile after thickness is more than 160nm,
It is uniform to be difficult to sheet resistance.
S5: phosphorus doping is carried out to intrinsically polysilicon layer, and silicon wafer carries out high-temperature process, to form N on the passivation layer+
Type polysilicon layer；
Specifically, carrying out phosphorus doping using the method for phosphorus source diffusion, injection phosphine or spin coating.
The temperature of the high-temperature process is 850-950 DEG C.During the high temperature treatment process, N-type polycrystalline silicon layer is changed into the first N+Type polysilicon layer；Intrinsically polysilicon layer after doping P is converted into the 2nd N+Type polysilicon layer.Using doping in situ, high-temperature process
The first N formed+Type polysilicon layer sheet resistance is more uniform；Be conducive to electrode in subsequent process and form good ohm with silicon wafer to connect
Touching promotes open-circuit voltage, optimizes battery performance.
It should be noted that in step s3, adulterating deposited n-type polysilicon layer using in situ, doping can be substantially improved
Uniformity, so that sheet resistance is uniform；But the process time required for this doping process is very long that (same deposition amount needs ten times
Time).In order to eliminate such defect, the present invention is by N+Type polysilicon layer is divided into two sections and is formed: first segment is using in situ
Doping forms N-type polycrystalline silicon layer, and the later period forms N by high-temperature process+Layer；Second segment passes through deposition intrinsic polysilicon layer, doping
Phosphorus, high-temperature process form N+Layer.This just substantially saves the process time, accelerates process efficiency.This doping also ensures that simultaneously
Close to the N of substrate+Layer sheet resistance is uniform, facilitates the open-circuit voltage for promoting passivating structure, optimizes battery performance.In addition, this
Being segmented the technique being doped can also to be more easier the phosphorus doping technique of intrinsically polysilicon layer, reduce defect.Certain journey
The 2nd N is enhanced on degree+The sheet resistance uniformity of type polysilicon layer.
Preferably, the N+Type polysilicon layer with a thickness of 110-250nm；N is prepared using segmentation+Type polysilicon layer makes
Sheet resistance is more uniform, to improve N+The integral thickness of layer, enhances the whole passivation effect of overlayer passivation structure.
Further, the thickness of N-type polycrystalline silicon layer: thickness=1:(1.5- of intrinsically polysilicon layer is controlled in the present invention
3).The balance of passivation effect and process efficiency can be reached within the above range.
Further, after completing the procedure, the sheet resistivity of the silicon wafer is 30-90 Ω/sq；Preferably 30-50
Ω/sq.In the follow-up process, positive electrode and silicon wafer substrate are capable of forming good Ohmic contact.
S6: in the N+Anti-reflection layer is deposited on polysilicon layer；
Wherein, the anti-reflection layer is silicon nitride material, silicon nitride (SiNx) it can effectively reduce silicon chip surface for sunlight
Reflection, the absorption of sunlight is promoted, to promote the efficiency of solar battery；Silicon nitride film can also play good simultaneously
Passivation.Using plasma chemical vapour deposition technique of the present invention deposits anti-reflection film layer in front side of silicon wafer.Preferably, described to subtract
Anti- layer with a thickness of 10-40nm, further preferably 20-40nm；Silicon dioxide layer, N+Type polysilicon layer and silicon nitride layer are answered
Conjunction enables to front side of silicon wafer to form good passivation, while guaranteeing effective transmission of carrier, promotes solar battery
Efficiency.
S7: by front side of silicon wafer non-electrode region passivation layer, N+Type polysilicon layer, anti-reflection layer removal；Obtain overlayer passivation structure
Finished product.
Specifically, silicon dioxide layer, N using Supreme Being's that laser cutting machine to the non-electrode region of front side of silicon wafer+Type polycrystalline
Silicon layer, anti-reflection layer are cut；Remove the passivating structure in non-electrode region.After this step, non-electrode region is eliminated
Passivating structure reduces absorption of the polysilicon layer in non-electrode region for sunlight, improves the efficiency of solar battery.
It should be noted that traditional overlayer passivation structure, usually covers complete passivation layer and N in battery surface+
Type polysilicon layer, this set make N+Polysilicon layer absorbs a large amount of sunlight, reduces the efficiency of solar battery；This
Invention develops the technique for removing non-electrode region passivating structure, only remains overlayer passivation structure in electrode zone, forms
Selectivity passivation contact structures；The purpose for not only reached effective passivation positive electrode area, nor affects on the absorption of light；Effectively
Improve the efficiency of solar battery.
Correspondingly, using the above method to prepare the invention also discloses a kind of overlayer passivation structure.Specifically, referring to
Fig. 2 comprising silicon wafer 1；Passivation layer 5 on silicon wafer；N on the passivation layer 5+Type polysilicon layer 4 and be set to institute
State N+Anti-reflection layer 3 on type polysilicon layer 4；Wherein, the N+Type polysilicon layer 4 divides for the first N+Type polysilicon layer 41 and the 2nd N+Type polysilicon layer 42；First N+Type polysilicon layer 41 is formed by doping in situ, high-temperature processing technology；2nd N+Type
Polysilicon layer 42 is formed by diffusing, doping, high-temperature processing technology；First N+Type polysilicon layer 41 is close to the passivation layer 5；Institute
State the 2nd N+Type polysilicon layer 42 is close to the anti-reflection layer 6.
Correspondingly, the embodiment of the present invention also discloses a kind of overlayer passivation contact solar cell, use above-mentioned folded
Layer passivating structure.Specifically, the solar battery in the present embodiment includes silicon wafer 1, set on the positive electricity of front side of silicon wafer referring to Fig. 3
Pole 2, anti-reflection layer 3, the N being sequentially arranged between the positive electrode 2 and silicon wafer 1+Type polysilicon layer 4 and passivation layer 5；The N+Type is more
Crystal silicon layer includes the first N close to the passivation layer 5+2nd N of type polysilicon layer 41 and the close anti-reflection layer 3+Type polysilicon
Layer 42；First N+Type polysilicon layer is formed by doping process in situ, the 2nd N+Type polysilicon layer passes through diffusing, doping
It is formed.
Specifically, the solar battery front side further includes the N set on non-electrode region among the present embodiment+Layer and
Anti-reflection film layer.
Specifically, the solar battery is single side battery among the present embodiment；I.e. it is blunt to be additionally provided with first for silicon chip back side
Change film layer 8, the second passivation film 9 and full aluminum back electric field 10.
Among another embodiment of the invention, solar battery is double-side cell, i.e., silicon chip back side is not provided with full aluminium
Electric field is carried on the back, and is equipped with grid line.
It should be noted that the passivating structure in the present invention can be used for conventional solar cells, laser heavy doping solar energy
Battery, PERC solar battery；But not limited to this.Passivating structure in the present invention can be used for monocrystalline silicon battery, polycrystal silicon cell；
Preferably, it is used for p type single crystal silicon battery.
It is further described below with reference to embodiment:
Embodiment 1
The present embodiment discloses a kind of passivating structure, preparation method are as follows:
(1) silicon wafer is cleaned, is polished after cleaning, reflectivity is controlled 30%；
(2) 2nm thick silicon dioxide layer is formed by ozone oxidation；Controlled at 50 DEG C；
(3) use LPCVD, doping method growth thickness in situ for the N-type polycrystalline silicon layer of 50nm；
(4) use LPCVD method growth thickness for the intrinsically polysilicon layer of 50nm；
(5) phosphorus doping is carried out using spin-coating method, and is heat-treated at 900 DEG C, form N+Type polysilicon layer；
(6) SiN is depositedxLayer, with a thickness of 15nm；
(7) by front side of silicon wafer non-electrode region passivation layer, N+Type polysilicon layer, anti-reflection layer removal；Obtain overlayer passivation structure
Finished product.
Embodiment 2
In the present embodiment, preparation method is same as Example 1；The thickness of each tunic layer is different, specifically, the present embodiment it
In:
Silicon dioxide layer is 3nm, and N-type polycrystalline silicon layer is 60nm, intrinsically polysilicon layer 180nm；Anti-reflection layer is 15nm.
Embodiment 3
In the present embodiment, preparation method is same as Example 1, and the thickness of each tunic layer is different, specifically, the present embodiment it
In:
Silicon dioxide layer 4nm, N-type polycrystalline silicon layer 55nm, intrinsically polysilicon layer 120nm；Anti-reflection layer 15nm.
Embodiment 4
Passivating structure in embodiment 1 is applied in laser heavy doping solar battery.Continuous preparation after specific
The method that patent 201811081406.1 can be used.
Embodiment 5
Passivating structure in embodiment 2 is applied in laser heavy doping solar battery.Continuous preparation after specific
The method that patent 201811081406.1 can be used.
Embodiment 6
Passivating structure in embodiment 3 is applied in laser heavy doping solar battery.Continuous preparation after specific
The method that patent 201811081406.1 can be used.
Comparative example 1
Passivating structure is prepared using the method for patent 201811081406.1；It is specific as follows:
(1) flannelette is formed in front side of silicon wafer: forming flannelette in silicon chip surface, loss of weight control is 0.65g, and reflectivity is
11%；
(2) it is deposited using LPCVD method；Tunnel layer is silica；Doped polysilicon layer is the N+ polysilicon of phosphorus doping；Its
In, tunneling layer thickness 2nm, doped polysilicon layer is with a thickness of 55nm；
(3) anti-reflection film layer is deposited in front side of silicon wafer: being deposited using PECVD；Anti-reflection film layer is silicon nitride；Anti-reflection thicknesses of layers
For 35nm.
(4) front side of silicon wafer non-electrode region tunnel layer, doped polysilicon layer, anti-reflection film layer are removed using laser；Using Supreme Being
You remove the film in the non-electrode region in front laser cutting machine；
Comparative example 2
Passivating structure in comparative example 1 is prepared into laser heavy doping battery.Specific method is referring to patent
201811081406.1 embodiment 3.
Comparative example 3
Using conventional overlayer passivation, i.e. aluminium oxide+silicon nitride passivation mode.
Comparative example 4
Laser heavy doping solar battery is prepared using the passivating structure in comparative example 3.
The theoretical open circuit voltage of passivating structure in embodiment 1-3, comparative example 1, comparative example 3 is measured, result
It is as follows:
| Comparative example 3 | Comparative example 1 | Embodiment 1 | Embodiment 2 | Embodiment 3 | |
| Implied Voc | 680mV | 710mV | 713mV | 720mV | 735mV |
Silicon wafer in embodiment 1-3, comparative example 2 is being formed into N+Sheet resistance test, result are carried out after type polysilicon layer
Such as following table；Wherein, sheet resistance unevenness calculation formula is
| Test point 1 | Test point 2 | Test point 3 | Test point 4 | Unevenness | |
| Embodiment 1 | 46.3 | 45.2 | 45.8 | 44.4 | 2.1% |
| Embodiment 2 | 33.2 | 32.4 | 33.3 | 32.8 | 1.36% |
| Embodiment 3 | 32.7 | 32.1 | 32.3 | 32.6 | 0.93% |
| Comparative example 1 | 58.2 | 52.7 | 51.4 | 53.2 | 6.2% |
By embodiment 4-6, the solar battery in comparative example 2 is tested, the result is as follows:
Passivating structure in the present invention it can be seen from above-mentioned test result, sheet resistance spread uniformity height, theoretical open circuit
Voltage is high；Using solar battery made of passivating structure in the present invention, transfer efficiency is also higher.
The above is the preferred embodiment of invention, it is noted that those skilled in the art are come
It says, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also considered as this
The protection scope of invention.
Claims (10)
1. a kind of preparation method of overlayer passivation structure characterized by comprising
(1) silicon wafer is pre-processed；
(2) in front side of silicon wafer growth of passivation layer；
(3) N-type polycrystalline silicon layer is grown on the passivation layer；
(4) intrinsically polysilicon layer is grown on the N-type polycrystalline silicon layer；
(5) phosphorus doping is carried out to the intrinsically polysilicon layer, and silicon wafer is subjected to high-temperature process, to be formed on the passivation layer
N+Type polysilicon layer；
(6) in the N+Anti-reflection layer is deposited on polysilicon layer；
(7) by front side of silicon wafer non-electrode region passivation layer, N+Type polysilicon layer, anti-reflection layer removal；Obtain overlayer passivation structure finished product.
2. the preparation method of overlayer passivation structure as described in claim 1, which is characterized in that in step (2), had to described
The silicon wafer of flannelette carries out ozone oxidation, forms passivation layer；The passivation layer is silicon dioxide layer.
3. the preparation method of overlayer passivation structure as claimed in claim 2, which is characterized in that in step (3), using LPCVD
Method or PECVD carry out deposit polycrystalline silicon on the passivation layer, and the phosphine that concentration is 5-15% is passed through in deposition process and is carried out
Doping, to form N-type polycrystalline silicon layer.
4. the preparation method of overlayer passivation structure as claimed in claim 3, which is characterized in that in step (4), using LPCVD
Or PECVD deposition intrinsic polysilicon layer on the N-type polycrystalline silicon layer；
In step (5), phosphorus doping is carried out using the method for phosphorus source diffusion, injection phosphine or spin coating.
5. the preparation method of overlayer passivation structure as described in claim 3 or 4, which is characterized in that deposit institute using LPCVD method
State N-type polycrystalline silicon layer and intrinsically polysilicon layer；
In step (5), the temperature of the high-temperature process is 850-950 DEG C.
6. the preparation method of overlayer passivation structure as described in claim 1, which is characterized in that the passivation layer with a thickness of 2-
5nm；The N-type polycrystalline silicon layer with a thickness of 50-70nm；The intrinsically polysilicon layer with a thickness of 50-200nm.
7. the preparation method of overlayer passivation structure as claimed in claim 6, which is characterized in that the passivation layer with a thickness of 2-
5nm；The N-type polycrystalline silicon layer with a thickness of 50-60nm；The intrinsically polysilicon layer with a thickness of 100-200nm.
8. the preparation method of overlayer passivation structure as claimed in claim 7, which is characterized in that the silicon wafer is p type single crystal silicon
Piece.
9. a kind of overlayer passivation structure, which is characterized in that it is used such as the described in any item preparation method preparations of claim 1-8
It forms.
10. a kind of overlayer passivation contact solar cell, which is characterized in that it includes overlayer passivation as claimed in claim 9
Structure.
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| CN114267753A (en) * | 2022-02-28 | 2022-04-01 | 海宁正泰新能源科技有限公司 | TOPCon solar cell, preparation method thereof and photovoltaic module |
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