CN110416232A - Array substrate and preparation method thereof, display panel and display device - Google Patents

Array substrate and preparation method thereof, display panel and display device Download PDF

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Publication number
CN110416232A
CN110416232A CN201910779054.5A CN201910779054A CN110416232A CN 110416232 A CN110416232 A CN 110416232A CN 201910779054 A CN201910779054 A CN 201910779054A CN 110416232 A CN110416232 A CN 110416232A
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China
Prior art keywords
oxygen
layer
containing buffer
active
film transistor
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Granted
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CN201910779054.5A
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CN110416232B (en
Inventor
宋威
赵策
王明
丁远奎
刘宁
刘军
胡迎宾
李伟
倪柳松
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Hefei Xinsheng Optoelectronics Technology Co Ltd
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Priority to CN201910779054.5A priority Critical patent/CN110416232B/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1262Multistep manufacturing methods with a particular formation, treatment or coating of the substrate

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Thin Film Transistor (AREA)

Abstract

The embodiment of the present application provides a kind of array substrate and preparation method thereof, display panel and display device.Array substrate includes driving thin film transistor region and switching thin-film transistor area, and includes: underlay substrate;The light shield layer on underlay substrate, including multiple light-shielding structures for being located at driving thin film transistor region;The first oxygen-containing buffer layer on light shield layer;Second oxygen-containing buffer layer, is located on the first oxygen-containing buffer layer and high oxygen content is in the first oxygen-containing active layer, including multiple the second oxygen-containing buffer cells for being located at driving thin film transistor region;Active layer, including multiple active islands, active island includes the second active island positioned at the first active island of driving thin film transistor region and positioned at switching thin-film transistor area, and the first active island is located on the second oxygen-containing buffer cell, and the second active island is located on the first oxygen-containing buffer layer.The present embodiment can be improved the uniformity of the threshold voltage of array substrate, to improve the display quality of display panel.

Description

Array substrate and preparation method thereof, display panel and display device
Technical field
This application involves field of display technology, specifically, this application involves a kind of array substrate and preparation method thereof, showing Show panel and display device.
Background technique
The thin film transistor (TFT) of top gate structure (Top Gate) is with parasitic capacitance is lower, refreshing frequency is more preferable, channel is shorter And the advantages that smaller, more it is able to satisfy the high definition of display panel and the growth requirement of high refreshing frequency.
In order to improve driving thin film transistor (TFT) (DriveThin the Film Transistor, DR of Top Gate structure TFT stability), has light-shielding structure below DR TFT, and switching thin-film transistor (SwitchThin Film Transistor, SW TFT) lower section will not then be provided with light-shielding structure.The meeting in subsequent annealing process of these light-shielding structures Make buffer layer uneven heating, to make buffer layer below DR TFT to the oxygenating ability of the active layer of DR TFT, with SW TFT The buffer layer of lower section is different to the oxygenating ability of the active layer of SW TFT.This will cause DR TFT and SW TFT threshold voltage (Vth) different, the uniformity of entire array substrate Vth is influenced, so that display panel is in some cases, part thin film transistor (TFT) Can not normally, to reduce the display quality of display panel.
Summary of the invention
The application is directed to the shortcomings that existing way, proposes a kind of array substrate and preparation method thereof, display panel and display Device, to solve the prior art technology different there are DR TFT and SW TFT threshold voltage (Vth) caused by light-shielding structure Problem.
First aspect, the embodiment of the present application provide a kind of array substrate, including driving thin film transistor region and switch Thin film transistor region, the array substrate include:
Underlay substrate;
Light shield layer is located on the underlay substrate, including multiple light-shielding structures positioned at the driving thin film transistor region;
First oxygen-containing buffer layer is located on the light shield layer;
Second oxygen-containing buffer layer is located on the described first oxygen-containing buffer layer, including multiple positioned at the driving film crystal The oxygen-containing buffer cell of the second of area under control;
Active layer, including multiple active islands, the active island include multiple positioned at the of the driving thin film transistor region One active island and multiple the second active islands positioned at the switching thin-film transistor area, the first active island are located at described second On oxygen-containing buffer cell, the second active island is located on the described first oxygen-containing buffer layer;
Wherein, the oxygen content of the described first oxygen-containing buffer layer is lower than the oxygen content of the described second oxygen-containing buffer layer.
Optionally, the material of the material of the described first oxygen-containing buffer layer and the second oxygen-containing buffer layer is silica material Material.
Optionally, the described first oxygen-containing buffer layer with a thickness of 300nm-500nm;The thickness of the second oxygen-containing buffer layer For 100nm-300nm.
Optionally, the material of the active layer includes in indium gallium zinc oxide, indium-zinc oxide and indium tin zinc oxide A kind of or combination.
Optionally, the array substrate further include:
First insulating layer, including multiple the first insulating units on the active island;
The first metal layer, including multiple grids on first insulating unit;
Second insulating layer is located on the first metal layer, including multiple via holes through the second insulating layer;
Second metal layer, including multiple source electrodes and multiple drain electrodes, wherein the source electrode and the drain electrode are respectively by described Via hole is connected with the corresponding active island.
The second aspect, the embodiment of the present application provide a kind of display panel, including above-mentioned array substrate.
In terms of third, the embodiment of the present application provides a kind of display device, including above-mentioned display panel.
4th aspect, the embodiment of the present application provide a kind of production method of array substrate, and the array substrate includes Driving thin film transistor region and switching thin-film transistor area, the production method include:
Light shield layer is deposited on underlay substrate, and processing is patterned to the light shield layer to obtain described in multiple be located at Drive the light-shielding structure of thin film transistor region;
The first oxygen-containing buffer layer is deposited on the light shield layer;
The second oxygen-containing buffer layer is deposited on the described first oxygen-containing buffer layer, and figure is carried out to the described second oxygen-containing buffer layer Shapeization processing is located at the second oxygen-containing buffer cell of the driving thin film transistor region to be formed;
Active layer is deposited, and processing is patterned to the active layer to obtain multiple active islands, the active island packet Include multiple the first active islands positioned at the driving thin film transistor region and multiple positioned at the of the switching thin-film transistor area Two active islands, the first active island are located on the described second oxygen-containing buffer cell, and the second active island is located at described first On oxygen-containing buffer layer;
Wherein, the oxygen content of the described first oxygen-containing buffer layer is lower than the oxygen content of the described second oxygen-containing buffer layer.
Optionally, described that the first oxygen-containing buffer layer is deposited on the light shield layer, comprising: control reaction gas N2O and SiH4 The described first oxygen-containing buffer layer is deposited on the light shield layer with the first ratio;
It is described that the second oxygen-containing buffer layer is deposited on the described first oxygen-containing buffer layer, comprising: control reaction gas N2O and SiH4The described second oxygen-containing buffer layer is deposited on the light shield layer with the second ratio;
Wherein, first ratio is less than second ratio.
Optionally, the production method further include:
The first insulating layer is deposited on the active layer, and it is more to be formed to be patterned processing to first insulating layer A first insulating unit, first insulating unit are located on the active island;
The first metal layer is deposited on the first insulating layer, and processing is patterned with shape to the first metal layer At the grid being located on first insulating unit;
Second insulating layer is deposited on the first metal layer, and processing is patterned with shape to the second insulating layer At the via hole for running through the second insulating layer;
Depositing second metal layer on the second insulating layer, and processing is patterned with shape to the second metal layer At multiple source electrodes and multiple drain electrodes, the source electrode and the drain electrode are connected by the via hole with the corresponding active island respectively It connects.
Technical solution bring advantageous effects provided by the embodiments of the present application are:
Array substrate provided in this embodiment and preparation method thereof, display panel and display device, due in annealing process It is middle to be present such that the active layer below the first active island is influenced by more heats because of light-shielding structure, have by making first The oxygen content of buffer layer of the high oxygen content of buffer layer below the island of source below the second active island, can after annealing so that Buffer layer below first active island has the oxygenating ability on the first active island with the buffer layer below the second active island to second The oxygenating ability on source island tends to be identical, to reduce the threshold voltage of driving thin film transistor (TFT) and the threshold value of switching thin-film transistor The difference of voltage, improves the uniformity of the threshold voltage of entire array substrate, and then avoids display panel in some cases Part thin film transistor (TFT) can not normally the case where, improve the display quality of display panel.
The additional aspect of the application and advantage will be set forth in part in the description, these will become from the following description It obtains obviously, or recognized by the practice of the application.
Detailed description of the invention
The application is above-mentioned and/or additional aspect and advantage will become from the following description of the accompanying drawings of embodiments Obviously and it is readily appreciated that, in which:
Fig. 1 is a kind of schematic cross-section of array substrate provided by the embodiments of the present application;
Fig. 2 is the schematic cross-section of another array substrate provided by the embodiments of the present application;
Fig. 3 is a kind of flow chart of the production method of array substrate provided by the embodiments of the present application;
Fig. 4 is the flow diagram of step S1 in a kind of production method of array substrate provided by the embodiments of the present application;
Fig. 5 is the flow diagram of step S2 in a kind of production method of array substrate provided by the embodiments of the present application;
Fig. 6 is the flow diagram of step S3 in a kind of production method of array substrate provided by the embodiments of the present application;
Fig. 7 is the flow diagram of step S4 in a kind of production method of array substrate provided by the embodiments of the present application;
Fig. 8 is the flow diagram of step S5 in a kind of production method of array substrate provided by the embodiments of the present application;
Fig. 9 is the flow diagram of step S6 in a kind of production method of array substrate provided by the embodiments of the present application;
Figure 10 is the flow diagram of step S7 in a kind of production method of array substrate provided by the embodiments of the present application;
Figure 11 is the flow diagram of step S8 in a kind of production method of array substrate provided by the embodiments of the present application.
Detailed description of the invention:
1- underlay substrate;
2- light shield layer;21- light-shielding structure;
The oxygen-containing buffer layer of 3- first;
The oxygen-containing buffer layer of 4- second;The oxygen-containing buffer cell of 41- second;
5- active layer;The active island 51-;The active island 511- first;The active island 512- second;
The first insulating layer of 6-;The first insulating unit of 61-;
7- the first metal layer;71- grid;
8- second insulating layer;81- via hole;
9- second metal layer;91- source electrode;92- drain electrode;
A- drives thin film transistor region;B- switching thin-film transistor area.
Specific embodiment
The application is described below in detail, the example of embodiments herein is shown in the accompanying drawings, wherein identical from beginning to end Or similar label indicates same or similar component or component with the same or similar functions.In addition, if known technology Detailed description the application shown is characterized in unnecessary, then omit it.Below with reference to attached drawing description Embodiment is exemplary, and is only used for explaining the application, and cannot be construed to the limitation to the application.
Those skilled in the art of the present technique are appreciated that unless otherwise defined, all terms used herein (including technology art Language and scientific term), there is meaning identical with the general understanding of those of ordinary skill in the application fields.Should also Understand, those terms such as defined in the general dictionary, it should be understood that have in the context of the prior art The consistent meaning of meaning, and unless idealization or meaning too formal otherwise will not be used by specific definitions as here To explain.
Those skilled in the art of the present technique are appreciated that unless expressly stated, singular " one " used herein, " one It is a ", " described " and "the" may also comprise plural form.It is to be further understood that being arranged used in the description of the present application Diction " comprising " refer to that there are the feature, integer, step, operation, element and/or component, but it is not excluded that in the presence of or addition Other one or more features, integer, step, operation, element, component and/or their group.It should be understood that when we claim member Part is " connected " or when " coupled " to another element, it can be directly connected or coupled to other elements, or there may also be Intermediary element.In addition, " connection " used herein or " coupling " may include being wirelessly connected or wirelessly coupling.It is used herein to arrange Diction "and/or" includes one or more associated wholes for listing item or any cell and all combinations.
In order to improve driving thin film transistor (TFT) (DriveThin the Film Transistor, DR of Top Gate structure TFT stability), has light-shielding structure below DR TFT, and switching thin-film transistor (SwitchThin Film Transistor, SW TFT) lower section will not then be provided with light-shielding structure.
But present inventor is it is considered that these light-shielding structures make buffer layer that can be heated in subsequent annealing process Unevenness, to make buffer layer below DR TFT to the oxygenating ability of the active layer of DR TFT, with the buffer layer below SW TFT It is different to the oxygenating ability of the active layer of SW TFT.It is different (usually that this will cause DR TFT and SW TFT threshold voltage (Vth) In the case of, it is that DR TFT threshold voltage can be lower than SW TFT threshold voltage), this will affect the uniformity of entire array substrate Vth, So that display panel is in some cases, part thin film transistor (TFT) can not normally, to reduce the display matter of display panel Amount.
Array substrate provided by the present application and preparation method thereof, display panel and display device, it is intended to solve the prior art Technical problem as above.
How the technical solution of the application and the technical solution of the application are solved with specifically embodiment below above-mentioned Technical problem is described in detail.
A kind of array substrate is present embodiments provided, as shown in Figure 1, the array substrate includes driving thin film transistor region A With switching thin-film transistor area B.The array substrate includes:
Underlay substrate 1;
Light shield layer 2 is located on underlay substrate 1, including multiple light-shielding structures 21 for being located at driving thin film transistor region A;
First oxygen-containing buffer layer 3 is located on light shield layer 2;
Second oxygen-containing buffer layer 4 is located on the first oxygen-containing buffer layer 3, is located at driving thin film transistor region A's including multiple Second oxygen-containing buffer cell 41;
Active layer 5, including multiple active islands 51, active island 51 include positioned at the first active of driving thin film transistor region A Island 511 and the second active island 512 positioned at switching thin-film transistor area B, the first active island 51 is located at the second oxygen-containing buffer cell On 41, the second active island 512 is located on the first oxygen-containing buffer layer 3;
Wherein, the oxygen content of the first oxygen-containing buffer layer 3 is lower than the oxygen content of the second oxygen-containing buffer layer 4.
In array substrate provided in this embodiment, due to being present such that first because of light-shielding structure 21 in annealing process The active layer of active 511 lower section of island is influenced by more heats, by making the oxygen-containing of the buffer layer below the first active island 511 Amount is higher than the oxygen content of the buffer layer of 512 lower section of the second active island, can after annealing, so that first active 511 lower section of island Buffer layer is to the oxygenating ability on the first active island 511, and the buffer layer with the second active 152 lower section of island is to the second active island 512 Oxygenating ability tends to be identical, thus reduce the threshold voltage of the threshold voltage and switching thin-film transistor that drive thin film transistor (TFT) Difference, improves the uniformity of the threshold voltage of entire array substrate, and then avoids display panel part is thin in some cases Film transistor can not normally the case where, improve the display quality of display panel.
Continuing with referring to Fig. 1, optionally, underlay substrate 1 is glass substrate substrate.It should be understood that underlay substrate 1 It can be other kinds of underlay substrate.
Further, continuing with referring to Fig. 1, the material of the material of the first oxygen-containing buffer layer 3 and the second oxygen-containing buffer layer 4 is equal For silica (SiOx, x is positive number) and material.Specifically, oxygen-containing lower than second slow in the oxygen content for guaranteeing the first oxygen-containing buffer layer 3 It rushes under conditions of the oxygen content of layer 4, it can be according to the practical application request of array substrate, to adjust the oxygen-containing of silica material Amount.
Further, continuing with referring to Fig. 1, the first oxygen-containing buffer layer 3 with a thickness of 300nm-500nm;Second is oxygen-containing slow Rush layer 4 with a thickness of 100nm-300nm.
It further, include indium gallium zinc oxide, indium-zinc oxide and indium tin continuing with the material referring to Fig. 1, active layer 5 One of zinc oxide or combination.
Further, continuing with referring to fig. 2, array substrate provided in this embodiment further include:
First insulating layer 6, including multiple the first insulating units 61 on active island 51;
The first metal layer 7, including multiple grids 71 being located on the first insulating unit 61;
Second insulating layer 8 is located on the first metal layer 7, including multiple via holes 81 through second insulating layer 8;
Second metal layer 9, including multiple source electrodes 91 and multiple drain electrodes 92, wherein source electrode 91 and drain electrode 92 passed through respectively Hole 81 is connected with corresponding active island 51.
Specifically, active island 51, the first insulating unit 61, grid 71, second insulating layer 8, source electrode 91 and drain electrode 92 are common Constitute thin film transistor (TFT), wherein the thin film transistor (TFT) positioned at driving thin film transistor region A is driving thin film transistor (TFT) DR TFT, the thin film transistor (TFT) positioned at switching thin-film transistor area B are switching thin-film transistor SW TFT.
Based on the same inventive concept, a kind of display panel is present embodiments provided, which includes above-described embodiment In array substrate.Therefore, display panel provided in this embodiment has the beneficial effect of array substrate in above-described embodiment, In This is repeated no more.
Based on the same inventive concept, a kind of display device is present embodiments provided, which includes above-described embodiment In display panel.Therefore, display device provided in this embodiment has the beneficial effect of display panel in above-described embodiment, In This is repeated no more.
Based on the same inventive concept, the production method for present embodiments providing a kind of array substrate refers to Fig. 3, and ties Fig. 4 to Fig. 7 is closed, array substrate includes driving thin film transistor region A and switching thin-film transistor area B, system provided in this embodiment Include: as method
S1: depositing light shield layer 2 on underlay substrate 1, and it is multiple positioned at drive to obtain to be patterned processing to light shield layer 2 The light-shielding structure 21 of dynamic thin film transistor region A.
S2: the first oxygen-containing buffer layer 3 is deposited on light shield layer 2.
S3: the second oxygen-containing buffer layer 4 is deposited on the first oxygen-containing buffer layer 3, and figure is carried out to the second oxygen-containing buffer layer 4 Change processing to form the second oxygen-containing buffer cell 41 for being located at driving thin film transistor region A.
S4: deposition active layer 5, and processing is patterned to active layer 5 to obtain multiple active islands 51, active island 51 is wrapped The the first active island 511 for being located at driving thin film transistor region A and the second active island 512 positioned at switching thin-film transistor area B are included, First active island 511 is located on the second oxygen-containing buffer cell 41, and the second active island 512 is located on the first oxygen-containing buffer layer 3.
Wherein, the oxygen content of the first oxygen-containing buffer layer 3 is lower than the oxygen content of the second oxygen-containing buffer layer 4.
The production method of array substrate provided in this embodiment, due in annealing process because light-shielding structure 21 there are due to Make the active layer of the first active 511 lower section of island is influenced by more heats, by the buffer layer for making the first active 511 lower section of island High oxygen content in 512 lower section of the second active island buffer layer oxygen content, can after annealing, so that the first active island 511 The buffer layer of lower section is to the oxygenating ability on the first active island 511, and the buffer layer with the second active 152 lower section of island is to the second active island 512 oxygenating ability tends to be identical, to reduce the threshold voltage of driving thin film transistor (TFT) and the threshold value of switching thin-film transistor The difference of voltage, improves the uniformity of the threshold voltage of entire array substrate, and then avoids display panel in some cases Part thin film transistor (TFT) can not normally the case where, improve the display quality of display panel.
Further, in production method provided in this embodiment:
Fig. 5 is referred to, step S2 includes: control reaction gas N2O and SiH4Is deposited on light shield layer 2 with the first ratio One oxygen-containing buffer layer 3;
Fig. 6 is referred to, " deposits the second oxygen-containing buffer layer 2 on the first oxygen-containing buffer layer 3 " in step S3, comprising: control Reaction gas N2O and SiH4The second oxygen-containing buffer layer 4 is deposited so that the second ratio is upper on the first oxygen-containing buffer layer 3.
Wherein, the first ratio is less than the second ratio.
Specifically, the first ratio and the second ratio each mean N2O and SiH4The ratio between gas flow.Wherein, the first ratio can To control between 30/1~50/1, the second ratio be can control between 60/1~80/1.Preferably, the first ratio control exists 40/1, the second ratio is controlled 70/1.
Further, continuing with referring to Fig. 3, and Fig. 8 to Figure 11, production method provided in this embodiment are combined further include:
S5: depositing the first insulating layer 6 on active layer 5, and it is multiple to be formed to be patterned processing to the first insulating layer 6 First insulating unit 61, the first insulating unit 61 are located on active island 51.
S6: the first metal layer 7 is deposited on the first insulating layer 6, and processing is patterned to be formed to the first metal layer 7 Grid 71 on the first insulating unit 61.
S7: second insulating layer 8 is deposited on the first metal layer 7, and processing is patterned to be formed to second insulating layer 8 Through the via hole 81 of second insulating layer.
S8: the depositing second metal layer 9 in second insulating layer 8, and processing is patterned to be formed to second metal layer 9 Multiple source electrodes 91 and multiple drain electrodes 92, source electrode 91 and drain electrode 92 are connected by via hole 81 with corresponding active island 51 respectively.
Specifically, active island 51, the first insulating unit 61, grid 71, second insulating layer 8, via hole 81, source electrode 91 and drain electrode 92 together constitute thin film transistor (TFT), wherein the thin film transistor (TFT) positioned at driving thin film transistor region A is driving thin film transistor (TFT) DR TFT, the thin film transistor (TFT) positioned at switching thin-film transistor area B are switching thin-film transistor SW TFT.
Using the embodiment of the present application, at least can be realized it is following the utility model has the advantages that
Array substrate provided in this embodiment and preparation method thereof, display panel and display device, due in annealing process It is middle to be present such that the active layer below the first active island is influenced by more heats because of light-shielding structure, have by making first The oxygen content of buffer layer of the high oxygen content of buffer layer below the island of source below the second active island, can after annealing so that Buffer layer below first active island has the oxygenating ability on the first active island with the buffer layer below the second active island to second The oxygenating ability on source island tends to be identical, to reduce the threshold voltage of driving thin film transistor (TFT) and the threshold value of switching thin-film transistor The difference of voltage, improves the uniformity of the threshold voltage of entire array substrate, and then avoids display panel in some cases Part thin film transistor (TFT) can not normally the case where, improve the display quality of display panel.
Those skilled in the art of the present technique have been appreciated that in the application the various operations crossed by discussion, method, in process Steps, measures, and schemes can be replaced, changed, combined or be deleted.Further, each with what is crossed by discussion in the application Kind of operation, method, other steps, measures, and schemes in process may also be alternated, changed, rearranged, decomposed, combined or deleted. Further, in the prior art to have and the step in various operations disclosed herein, method, process, measure, scheme It may also be alternated, changed, rearranged, decomposed, combined or deleted.
In the description of the present application, it is to be understood that term " center ", "upper", "lower", "front", "rear", " left side ", The orientation or positional relationship of the instructions such as " right side ", "vertical", "horizontal", "top", "bottom", "inner", "outside" is based on the figure Orientation or positional relationship is merely for convenience of description of the present invention and simplification of the description, rather than the device of indication or suggestion meaning or Element must have a particular orientation, be constructed and operated in a specific orientation, therefore be not considered as limiting the invention.
Term " first ", " second " be used for descriptive purposes only and cannot be understood as indicating or suggesting relative importance or Implicitly indicate the quantity of indicated technical characteristic." first " is defined as a result, the feature of " second " can be expressed or imply Ground includes one or more of the features.In the description of the present invention, unless otherwise indicated, the meaning of " plurality " is two or It is more than two.
In the description of the present application, it should be noted that unless otherwise clearly defined and limited, term " installation ", " phase Even ", " connection " shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or be integrally connected;It can To be to be connected directly, the connection inside two elements can also be can be indirectly connected through an intermediary.For this field For those of ordinary skill, the concrete meaning of above-mentioned term in the present invention can be understood with concrete condition.
In the description of this specification, particular features, structures, materials, or characteristics can be real in any one or more Applying can be combined in any suitable manner in example or example.
It should be understood that although each step in the flow chart of attached drawing is successively shown according to the instruction of arrow, These steps are not that the inevitable sequence according to arrow instruction successively executes.Unless expressly stating otherwise herein, these steps Execution there is no stringent sequences to limit, can execute in the other order.Moreover, at least one in the flow chart of attached drawing Part steps may include that perhaps these sub-steps of multiple stages or stage are not necessarily in synchronization to multiple sub-steps Completion is executed, but can be executed at different times, execution sequence, which is also not necessarily, successively to be carried out, but can be with other At least part of the sub-step or stage of step or other steps executes in turn or alternately.
The above is only some embodiments of the application, it is noted that for the ordinary skill people of the art For member, under the premise of not departing from the application principle, several improvements and modifications can also be made, these improvements and modifications are also answered It is considered as the protection scope of the application.

Claims (10)

1. a kind of array substrate, including driving thin film transistor region and switching thin-film transistor area, which is characterized in that the array Substrate includes:
Underlay substrate;
Light shield layer is located on the underlay substrate, including multiple light-shielding structures positioned at the driving thin film transistor region;
First oxygen-containing buffer layer is located on the light shield layer;
Second oxygen-containing buffer layer is located on the described first oxygen-containing buffer layer, including multiple positioned at the driving thin film transistor region The second oxygen-containing buffer cell;
Active layer, including multiple active islands, the active island include that multiple first positioned at the driving thin film transistor region have Source island and multiple the second active islands positioned at the switching thin-film transistor area, it is oxygen-containing that the first active island is located at described second On buffer cell, the second active island is located on the described first oxygen-containing buffer layer;
Wherein, the oxygen content of the described first oxygen-containing buffer layer is lower than the oxygen content of the described second oxygen-containing buffer layer.
2. array substrate according to claim 1, which is characterized in that the material of the first oxygen-containing buffer layer and described The material of two oxygen-containing buffer layers is silica material.
3. array substrate according to claim 2, which is characterized in that
The first oxygen-containing buffer layer with a thickness of 300nm-500nm;
The second oxygen-containing buffer layer with a thickness of 100nm-300nm.
4. array substrate according to claim 1, which is characterized in that
The material of the active layer includes one of indium gallium zinc oxide, indium-zinc oxide and indium tin zinc oxide or combination.
5. array substrate according to claim 1, which is characterized in that further include:
First insulating layer, including multiple the first insulating units on the active island;
The first metal layer, including multiple grids on first insulating unit;
Second insulating layer is located on the first metal layer, including multiple via holes through the second insulating layer;
Second metal layer, including multiple source electrodes and multiple drain electrodes, wherein the source electrode and the drain electrode pass through the via hole respectively It is connected with the corresponding active island.
6. a kind of display panel, which is characterized in that including array substrate of any of claims 1-5.
7. a kind of display device, which is characterized in that including display panel as claimed in claim 6.
8. a kind of production method of array substrate, the array substrate includes driving thin film transistor region and switching thin-film transistor Area, which is characterized in that the production method includes:
Light shield layer is deposited on underlay substrate, and it is multiple positioned at the driving to obtain to be patterned processing to the light shield layer The light-shielding structure of thin film transistor region;
The first oxygen-containing buffer layer is deposited on the light shield layer;
The second oxygen-containing buffer layer is deposited on the described first oxygen-containing buffer layer, and the described second oxygen-containing buffer layer is patterned Processing is located at the second oxygen-containing buffer cell of the driving thin film transistor region to be formed;
Active layer is deposited, and processing is patterned to the active layer to obtain multiple active islands, the active island includes more It is a to have positioned at the first active island of the driving thin film transistor region and multiple second positioned at the switching thin-film transistor area Source island, the first active island are located on the described second oxygen-containing buffer cell, and it is oxygen-containing that the second active island is located at described first On buffer layer;
Wherein, the oxygen content of the described first oxygen-containing buffer layer is lower than the oxygen content of the described second oxygen-containing buffer layer.
9. production method according to claim 8, which is characterized in that
It is described that the first oxygen-containing buffer layer is deposited on the light shield layer, comprising: control reaction gas N2O and SiH4With the first ratio The described first oxygen-containing buffer layer is deposited on the light shield layer;
It is described that the second oxygen-containing buffer layer is deposited on the described first oxygen-containing buffer layer, comprising: control reaction gas N2O and SiH4With Second ratio deposits the described second oxygen-containing buffer layer on the light shield layer;
Wherein, first ratio is less than second ratio.
10. production method according to claim 8 or claim 9, which is characterized in that further include:
It deposits the first insulating layer on the active layer, and processing is patterned to first insulating layer to form multiple the One insulating unit, first insulating unit are located on the active island;
The first metal layer is deposited on the first insulating layer, and processing is patterned to form position to the first metal layer Grid on first insulating unit;
Second insulating layer is deposited on the first metal layer, and processing is patterned to the second insulating layer and is passed through with being formed Wear the via hole of the second insulating layer;
Depositing second metal layer on the second insulating layer, and it is more to be formed to be patterned processing to the second metal layer A source electrode and multiple drain electrodes, the source electrode and the drain electrode are connected by the via hole with the corresponding active island respectively.
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