CN110400798A - A kind of repid discharge RC type esd protection circuit - Google Patents
A kind of repid discharge RC type esd protection circuit Download PDFInfo
- Publication number
- CN110400798A CN110400798A CN201910654738.2A CN201910654738A CN110400798A CN 110400798 A CN110400798 A CN 110400798A CN 201910654738 A CN201910654738 A CN 201910654738A CN 110400798 A CN110400798 A CN 110400798A
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- level
- discharge
- nmos transistor
- drain electrode
- protection circuit
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
- H01L27/0285—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements bias arrangements for gate electrode of field effect transistors, e.g. RC networks, voltage partitioning circuits
Abstract
The present invention provides a kind of repid discharge RC type esd protection circuit, including trigger module and discharge module, the trigger module includes three-level inverter modules, PMOS feedback module, feedback enhancing trigger module, resistance and NMOS transistor capacitor;The discharge module includes MESDDischarge tube, wherein MESDDischarge tube is NMOS transistor.The RC type esd protection circuit uses Cascoded PMOS feed circuit and feedback enhancing trigger circuit.When ESD triggering, chip protection circuit can quickly open repid discharge, electrostatic be consumed, to reduce chip failure risk.
Description
Technical field
The invention belongs to electronic circuit design field more particularly to a kind of repid discharge RC type esd protection circuits.
Background technique
Chip has electrostatic potential in processes such as cutting, encapsulation, transport and carryings, when different electrostatic potential (e.g., chip testing
Personnel) with chip contact when, limited charge will shift.Due to may time of contact it is very short, thus time of occurrence it is short,
Voltage value is up to several kilovolts of electrostatic discharge pulses, and a large amount of charges are either internally or externally released via internal circuit, can be in chip
Inside generates a large amount of Joule heats, so as to cause IC chip failure.Therefore, it is necessary to esd protection circuit is established on chip
To protect device on IC and circuit from ESD damage.
Fig. 1 is a kind of common esd protection circuit structure chart, shows a common esd protection circuit, main to wrap
Trigger module 001 and discharge module 002 are included, trigger module 001 is by resistance R, NMOS capacitor Mc, PMOS transistor Mp1 and NMOS
Transistor Mn1 is constituted, and discharge module 002 is by a NMOS transistor MESDIt constitutes.In normal work, the first NMOS transistor
MESDGrid be in low level, the first NMOS transistor MESDIn off state.Above-mentioned esd protection circuit, not only puts
Electrically activate slow, and discharge capability also very little.
Summary of the invention
In order to solve the deficiencies in the prior art, the invention proposes a kind of solution ESD repid discharge and have put
The RC type esd protection circuit of the big feature of electric energy power.The RC type esd protection circuit uses Cascoded PMOS feed circuit
Enhance trigger circuit with feedback.When ESD triggering, chip protection circuit can quickly open repid discharge, consume electrostatic, thus
Reduce chip failure risk.
The present invention provides a kind of repid discharge RC type esd protection circuit, including trigger module and discharge module, the touchings
Hair module includes three-level inverter modules, PMOS feedback module, feedback enhancing trigger module, resistance and NMOS transistor capacitor;
The discharge module includes MESDDischarge tube, wherein MESDDischarge tube is NMOS transistor.
Further, the three-level inverter modules include first order phase inverter, second level phase inverter and third level reverse phase
Device, wherein
The first order phase inverter is made of the first PMOS transistor and the first NMOS transistor;
The second level phase inverter is made of the second PMOS transistor and the second NMOS transistor;
The third level phase inverter is made of third PMOS transistor and third NMOS transistor.
Further, the feedback enhancing trigger module includes the 4th PMOS transistor and the 4th NMOS transistor, wherein
The 4th PMOS transistor grid is connected with third level inverter output, and source electrode is connected with power vd D, drain electrode and the
Three-level inverter input is connected;
The 4th NMOS transistor grid is connected with third level inverter output, and source electrode is connected with ground VSS, drain electrode and third
Grade inverter input is connected.
Further, the PMOS feedback module includes the 5th PMOS transistor, and wherein grid and third level phase inverter are defeated
Outlet is connected, and source electrode is connected with power vd D, and drain electrode is connected with the source electrode of the second PMOS transistor.
Further, the first PMOS transistor grid is connected with first order inverter input, source electrode and power vd D
It is connected, drain electrode is connected with first order inverter output;
The first NMOS transistor grid is connected with first order inverter input, and source electrode is connected with ground VSS, drain electrode and first
Grade inverter output is connected;
The second PMOS transistor grid is connected with second level inverter input, source electrode and the 5th PMOS transistor drain electrode phase
Even, drain electrode is connected with second level inverter output;
The second NMOS transistor grid is connected with second level inverter input, and source electrode is connected with ground VSS, drain electrode and second
Grade inverter output is connected;
The third PMOS transistor grid is connected with third level inverter input, and source electrode is connected with power vd D, drain electrode and the
Three-level inverter output is connected;
The third NMOS transistor grid is connected with third level inverter input, and source electrode is connected with ground VSS, drain electrode and third
Grade inverter output is connected.
Further, the first order inverter output is connected with the second level inverter input, and described second
Grade inverter output is connected with the third level inverter input.
Further, described resistance one end is connected with the first order inverter input, and the other end is connected with power supply;
The grid of the NMOS transistor capacitor is connected with described resistance one end, and drain electrode, source electrode are connected to the ground.
Further, the grid of the MESD discharge tube is connected with third level inverter output, and drain electrode is connected with power supply,
Source electrode is connected to the ground.
Further, in the case where protecting circuit normal operating conditions, the third level inverter output is in low level,
MESDDischarge tube is in off state;
When an esd event occurs, power end VDD generates high voltage, the conducting of the first PMOS transistor, first order inverter output
Become high level, so that third level inverter output be made also to become high level, MESDDischarge tube conducting, power vd D to ground VSS
Form discharge path.
Other features and advantages of the present invention will be illustrated in the following description, also, partly becomes from specification
It obtains it is clear that understand through the implementation of the invention.
Detailed description of the invention
Attached drawing is used to provide further understanding of the present invention, and constitutes part of specification, and with it is of the invention
Embodiment together, is used to explain the present invention, and is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is a kind of common esd protection circuit structure chart;
Fig. 2 is a kind of repid discharge RC type esd protection circuit structure chart according to the present invention;
Fig. 3 is that the present invention and general structure the electric discharge comparison diagram of ESD occur;
Fig. 4 is the normal working voltage current graph that ESC of the invention protects circuit.
Specific embodiment
Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings, it should be understood that preferred reality described herein
Apply example only for the purpose of illustrating and explaining the present invention and is not intended to limit the present invention.
Fig. 2 is a kind of repid discharge RC type esd protection circuit structure chart according to the present invention, as shown in Fig. 2, the present invention mentions
A kind of repid discharge RC type esd protection circuit supplied, comprising: trigger module 003 and discharge module 004;
The trigger module 003 include three-level inverter modules 005, PMOS feedback module 006, feedback enhancing trigger module 007,
Resistance R and NMOS transistor capacitor Mc;
The discharge module 004 includes NMOS transistor MESD discharge tube, and grid is connected with D, and drain electrode is connected with power vd D, source
Pole is connected with ground VSS;
The three-level inverter modules 005 include PMOS transistor Mp1, Mp2, Mp3 and NMOS transistor Mn1, Mn2, Mn3,
Middle PMOS transistor Mp1 and NMOS transistor Mn1 forms first order phase inverter, and first order inverter input is A, and output end is
B。
First order inverter input A is connected with one end of the grid of NMOS transistor capacitor Mc, resistance R respectively;
The drain electrode of NMOS transistor capacitor Mc and source electrode ground connection;The other end of resistance R is controlled to a power supply.
PMOS transistor Mp2 and NMOS transistor Mn2 forms second level phase inverter, and second level inverter input is B, defeated
Outlet is C;PMOS transistor Mp3 and NMOS transistor Mn3 forms third level phase inverter, and third level inverter input is C, defeated
Outlet is D.PMOS transistor Mp1 grid is connected with A, and source electrode is connected with power vd D, and drain electrode is connected with B, NMOS transistor Mn1
Grid is connected with A, and source electrode is connected with ground VSS, and drain electrode is connected with B, and PMOS transistor Mp2 grid is connected with B, and source electrode and PMOS are brilliant
Body pipe Mpf2 drain electrode is connected, and drain electrode is connected with C, and NMOS transistor Mn2 grid is connected with B, and source electrode is connected with ground VSS, drain electrode and C
It is connected, PMOS transistor Mp3 grid is connected with C, and source electrode is connected with power vd D, and drain electrode is connected with D, NMOS transistor Mn3 grid
It is connected with C, source electrode is connected with ground VSS, and drain electrode is connected with D.
The PMOS feedback module 006 includes PMOS transistor Mpf2, and grid is connected with D, and source electrode is connected with power vd D,
Drain electrode is connected with the source electrode of PMOS transistor Mp2;
The feedback enhancing trigger module 007 includes PMOS transistor Mpf1 and NMOS transistor Mnf1, wherein PMOS transistor
Mpf1 grid is connected with D, and source electrode is connected with power vd D, and drain electrode is connected with C, and NMOS transistor Mnf1 grid is connected with D, source electrode
It is connected with ground VSS, drain electrode is connected with C;
In the case where protecting circuit normal operating conditions, D point is in low level (essentially identical with the level of ground terminal VSS), NMOS crystal
Pipe MESD is in off state.When an esd event occurs, due to static charge buildup, very high voltage is generated in power end VDD.
Since NMOS transistor capacitor Mc grid A voltage cannot be mutated, PMOS transistor Mp1 conducting, terminal B becomes high level, thus
Endpoint D is set also to become high level, discharge tube NMOS transistor MESD is in the conductive state, so that power vd D is put to ground VSS formation
The esd event of electric pathway, burst is eliminated.
During ESD triggering, it is primarily due to PMOS feedback loop of the invention and exists, endpoint D high level can be accelerated
It establishes, so that discharge tube NMOS transistor MESD is quickly opened, forms discharge path faster.Secondly feedback of the invention enhancing
Trigger circuit exists, and during ESD triggering, can also accelerate the foundation of endpoint D high level, so that discharge tube NMOS transistor
MESD is quickly opened, and forms discharge path faster.
Fig. 3 is that the present invention and general structure the electric discharge comparison diagram of ESD occur, as shown in figure 3, Nornal waveform is general knot
Structure esd discharge waveform, This case waveform are repid discharge RC type esd protection circuit discharge waveform of the invention.When ESD is touched
When hair, compared to general structure, discharge capability of the invention can promote 350mA.
Fig. 4 is the normal working voltage current graph that ESC of the invention protects circuit, as shown in figure 4, chip works normally
When, repid discharge RC type esd protection circuit of the invention is in close state, and only consumes the quiescent current of 650nA.
Those of ordinary skill in the art will appreciate that: the foregoing is only a preferred embodiment of the present invention, and does not have to
In the limitation present invention, although the present invention is described in detail referring to the foregoing embodiments, for those skilled in the art
For, still can to foregoing embodiments record technical solution modify, or to part of technical characteristic into
Row equivalent replacement.All within the spirits and principles of the present invention, any modification, equivalent replacement, improvement and so on should all include
Within protection scope of the present invention.
Claims (9)
1. a kind of repid discharge RC type esd protection circuit, including trigger module and discharge module, which is characterized in that
The trigger module, including three-level inverter modules, PMOS feedback module, feedback enhancing trigger module, resistance and NMOS
Transistor capacitance;
The discharge module, including MESDDischarge tube, wherein MESDDischarge tube is NMOS transistor.
2. repid discharge RC type esd protection circuit according to claim 1, which is characterized in that the three-level phase inverter mould
Block includes first order phase inverter, second level phase inverter and third level phase inverter, wherein
The first order phase inverter is made of the first PMOS transistor and the first NMOS transistor;
The second level phase inverter is made of the second PMOS transistor and the second NMOS transistor;
The third level phase inverter is made of third PMOS transistor and third NMOS transistor.
3. repid discharge RC type esd protection circuit according to claim 1, which is characterized in that the feedback enhancing triggering
Module includes the 4th PMOS transistor and the 4th NMOS transistor, wherein
The 4th PMOS transistor grid is connected with third level inverter output, and source electrode is connected with power vd D, drain electrode and the
Three-level inverter input is connected;
The 4th NMOS transistor grid is connected with third level inverter output, and source electrode is connected with ground VSS, drain electrode and third
Grade inverter input is connected.
4. repid discharge RC type esd protection circuit according to claim 1, which is characterized in that the PMOS feedback module
Including the 5th PMOS transistor, wherein grid is connected with third level inverter output, and source electrode is connected with power vd D, drain electrode with
The source electrode of second PMOS transistor is connected.
5. repid discharge RC type esd protection circuit according to claim 2, which is characterized in that the first PMOS crystal
Tube grid is connected with first order inverter input, and source electrode is connected with power vd D, drain electrode and first order inverter output phase
Even;
The first NMOS transistor grid is connected with first order inverter input, and source electrode is connected with ground VSS, drain electrode and first
Grade inverter output is connected;
The second PMOS transistor grid is connected with second level inverter input, source electrode and the 5th PMOS transistor drain electrode phase
Even, drain electrode is connected with second level inverter output;
The second NMOS transistor grid is connected with second level inverter input, and source electrode is connected with ground VSS, drain electrode and second
Grade inverter output is connected;
The third PMOS transistor grid is connected with third level inverter input, and source electrode is connected with power vd D, drain electrode and the
Three-level inverter output is connected;
The third NMOS transistor grid is connected with third level inverter input, and source electrode is connected with ground VSS, drain electrode and third
Grade inverter output is connected.
6. repid discharge RC type esd protection circuit according to claim 1, which is characterized in that the first order phase inverter
Output end is connected with the second level inverter input, and the second level inverter output and the third level phase inverter are defeated
Enter end to be connected.
7. repid discharge RC type esd protection circuit according to claim 1, which is characterized in that described resistance one end and institute
It states first order inverter input to be connected, the other end is connected with power supply;
The grid of the NMOS transistor capacitor is connected with described resistance one end, and drain electrode, source electrode are connected to the ground.
8. repid discharge RC type esd protection circuit according to claim 1, which is characterized in that the MESDThe grid of discharge tube
Pole is connected with third level inverter output, and drain electrode is connected with power vd D, and source electrode is connected with ground VSS.
9. repid discharge RC type esd protection circuit according to claim 1, which is characterized in that in the protection normal work of circuit
Make under state, the third level inverter output is in low level, MESDDischarge tube is in off state;
When an esd event occurs, power end generates high voltage, the conducting of the first PMOS transistor, and first order inverter output becomes
At high level, so that third level inverter output be made also to become high level, MESDDischarge tube conducting, power supply form electric discharge to ground
Access.
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CN201910654738.2A CN110400798A (en) | 2019-07-19 | 2019-07-19 | A kind of repid discharge RC type esd protection circuit |
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CN201910654738.2A CN110400798A (en) | 2019-07-19 | 2019-07-19 | A kind of repid discharge RC type esd protection circuit |
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CN104348148A (en) * | 2013-08-06 | 2015-02-11 | 创意电子股份有限公司 | Electrostatic discharge clamping circuit |
CN106257670A (en) * | 2015-06-16 | 2016-12-28 | 恩智浦有限公司 | Static discharge power rail clamp circuit |
CN108922886A (en) * | 2018-08-24 | 2018-11-30 | 电子科技大学 | A kind of RC circuit triggering bi-directional ESD protection circuit based on SOI technology |
CN109286181A (en) * | 2017-07-21 | 2019-01-29 | 上海韦玏微电子有限公司 | Power clamp ESD protective circuit |
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2019
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Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
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US20040136126A1 (en) * | 2003-01-10 | 2004-07-15 | Smith Jeremy C. | Electrostatic discharge protection circuit with feedback enhanced triggering |
CN101099278A (en) * | 2004-11-12 | 2008-01-02 | 德州仪器公司 | Electrostatic discharge protection power rail clamp with feedback-enhanced triggering and conditioning circuitry |
CN1787321A (en) * | 2004-12-08 | 2006-06-14 | 上海华虹Nec电子有限公司 | Electrostatic discharge protection circuit |
CN104348148A (en) * | 2013-08-06 | 2015-02-11 | 创意电子股份有限公司 | Electrostatic discharge clamping circuit |
CN104283198A (en) * | 2014-07-08 | 2015-01-14 | 香港应用科技研究院有限公司 | Power supply clamp ESD protection circuit using transmission gate |
CN106257670A (en) * | 2015-06-16 | 2016-12-28 | 恩智浦有限公司 | Static discharge power rail clamp circuit |
CN109286181A (en) * | 2017-07-21 | 2019-01-29 | 上海韦玏微电子有限公司 | Power clamp ESD protective circuit |
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