CN110380726A - Multidigit analog compensation SAR adc circuit - Google Patents

Abstract

The invention discloses a kind of multidigit analog compensation SAR adc circuit, the input terminal access of the multidigit SAR module has analog signal V_in, the output end of multidigit SAR module connects with the electrode input end of comparator CMP；The negative input of the comparator CMP is connected with the capacitive DAC circuit of multidigit, and wherein the capacitor in the capacitive DAC circuit of multidigit is respectively C₀、C₁...C_n‑1, and capacitor C₀、C₁...C_n‑1Capacitance be respectively C₀、2C₀、2²C₀...2^n‑1C₀；The bottom crown of the capacitor of the capacitive DAC circuit of the multidigit accesses input voltage V_ref, the top crown of the capacitor of the capacitive DAC circuit of multidigit connects with the negative input of comparator CMP, and the negative input of the comparator CMP is also connected with compensation circuit and capacitor C_A, capacitor C_ABottom crown ground connection.The present invention carries out charge compensation to the capacitive DAC circuit of multidigit by follow-on compensation circuit, so that total amount of electric charge will not reduce in the capacitive DAC circuit of multidigit, to reduce the required precision of the capacitor in the capacitive DAC circuit of multidigit in production process, while it ensure that whole precision.

Description

Multidigit analog compensation SAR adc circuit

Technical field

The present invention relates to semiconductor integrated circuit technology field, especially a kind of multidigit analog compensation SAR adc circuit.

Background technique

Gradual approaching A/D converter (SAR ADC) is the super low-power consumption modulus of high-precision, low conversion rate in one kind Converter.It mainly include sampling hold circuit, comparator, digital analog converter (DAC) and control logic module.It is compared to other The analog-digital converter (ADC) of structure, SAR ADC has many advantages, such as that structure is simple, area is small, low in energy consumption, thus is widely used in In the equipment such as portable, medical.SAR ADC (gradually-appoximant analog-digital converter) is a type very big in ADC, to 12 with The SAR ADC of upper precision substantially uses capacitor array structure or resistance capacitance mixing array structure, but both structures are to electricity Hold and the matching of resistance propose very high requirement, is easy to produce error in production and the size of capacitance C is caused to change, So that overall precision is deteriorated.

Summary of the invention

The object of the present invention is to provide a kind of multidigit analog compensation SAR adc circuits.The present invention passes through follow-on benefit Circuit is repaid to carry out charge compensation to the capacitive DAC circuit of multidigit, so that total amount of electric charge will not subtract in the capacitive DAC circuit of multidigit It is small, to reduce the required precision of the capacitor in the capacitive DAC circuit of multidigit in production process, and then it ensure that whole fortune Row precision.

Technical solution of the present invention: multidigit analog compensation SAR adc circuit, including comparator CMP and multidigit SAR module；

The input terminal access of the multidigit SAR module has analog signal V_in, the output end and comparator of multidigit SAR module The electrode input end of CMP connects；The negative input of the comparator CMP is connected with the capacitive DAC circuit of multidigit, wherein more Capacitor in the capacitive DAC circuit in position is respectively C₀、C₁...C_n-1, and capacitor C₀、C₁...C_n-1Capacitance be respectively C₀、2C₀、 2²C₀...2^n-1C₀；The bottom crown of the capacitor of the capacitive DAC circuit of the multidigit accesses input voltage V_ref, multidigit is capacitive The top crown of the capacitor of DAC circuit connects with the negative input of comparator CMP, and the negative input of the comparator CMP is also It is connected with compensation circuit and capacitor C_A, capacitor C_ABottom crown ground connection.

In above-mentioned multidigit analog compensation SAR adc circuit, the compensation circuit includes a capacitor C_BWith it is multiple according to The secondary capacitor that progressively increases to progressively increase, multiple capacitors that progressively increase are respectively C_E1、C_E2...C_En, progressively increase capacitor C_E1、C_E2...C_EnCapacitance point It Wei not C_O、2C_O、3C_O...nC₀, in which:

The capacitor C_BTop crown be connected with the negative input of comparator CMP, the top crown of multiple capacitors that progressively increase Respectively with capacitor C_BBottom crown be connected, the bottom crowns of multiple capacitors that progressively increase ground connection.

In multidigit analog compensation SAR adc circuit above-mentioned, the capacitor that progressively increases equipped with 7 and is followed successively by C_E1、C_E2、 C_E3、C_E4、C_E5、C_E6、C_E7, wherein the capacitor C that progressively increases_E1、C_E2、C_E3、C_E4、C_E5、C_E6、C_E7Capacitance be respectively C_O、2C_O、3C_O、 4C_O、5C_O、6C_O、7C₀。

In multidigit analog compensation SAR adc circuit above-mentioned, the capacitor C_BCapacitance is C₀。

In multidigit analog compensation SAR adc circuit above-mentioned, the capacitor C_ACapacitance is C₀。

Compared with prior art, the invention has the following advantages:

1, the present invention is connected with the capacitive DAC circuit of multidigit, the comparator CMP in the negative input of comparator CMP Negative input be also connected with compensation circuit and capacitor C_A, wherein capacitor C_ABottom crown ground connection, the present invention is by follow-on Compensation circuit carrys out the capacitive DAC circuit of multidigit and carries out charge compensation, so that total amount of electric charge will not subtract in the capacitive DAC circuit of multidigit It is small, to reduce the required precision of the capacitor in the capacitive DAC circuit of multidigit in production process, it ensure that the essence of overall operation Degree.

2, the improved compensation circuit in the present invention includes a capacitor C_BIt is multiple with multiple capacitors that progressively increase successively to progressively increase The capacitor that progressively increases is respectively C_E1、C_E2...C_En, progressively increase capacitor C_E1、C_E2...C_EnCapacitance be respectively C_O、2C_O、3C_O...nC₀, In: the capacitor C_BTop crown be connected with the negative input of comparator CMP, the top crown of multiple capacitors that progressively increase respectively with Capacitor C_BBottom crown be connected, the bottom crowns of multiple capacitors that progressively increase ground connection；The capacitor that progressively increases equipped with 7 and is followed successively by C_E1、 C_E2、C_E3、C_E4、C_E5、C_E6、C_E7, wherein the capacitor C that progressively increases_E1、C_E2、C_E3、C_E4、C_E5、C_E6、C_E7Capacitance be respectively C_O、2C_O、 3C_O、4C_O、5C_O、6C_O、7C₀.When above-mentioned compensation circuit is for multidigit capacitive DAC circuit capacitor negligible amounts, compensation effect is outstanding Be it is obvious, ensure that whole precision.

Detailed description of the invention

Fig. 1 is circuit diagram of the invention；

Fig. 2 is existing SAR adc circuit figure；

Fig. 3 is b in the capacitive DAC circuit of multidigit under ideal conditions₀Compare the general circuit figure of output bit；

Fig. 4 is b in the capacitive DAC circuit of multidigit under physical condition₀Compare the general circuit figure of output bit.

Specific embodiment

The present invention is further illustrated with reference to the accompanying drawings and examples, but be not intended as to the present invention limit according to According to.

Embodiment: a kind of multidigit analog compensation SAR adc circuit, as shown in Figure 1:

Including comparator CMP and multidigit SAR module；

The input terminal access of the multidigit SAR module has analog signal V_in, the output end and comparator of multidigit SAR module The electrode input end of CMP connects；The negative input of the comparator CMP is connected with the capacitive DAC circuit of multidigit, wherein more Capacitor in the capacitive DAC circuit in position is respectively C₀、C₁...C_n-1, and capacitor C₀、C₁...C_n-1Capacitance be respectively C₀、2C₀、 2²C₀...2ⁿ-¹C₀；The bottom crown of the capacitor of the capacitive DAC circuit of the multidigit accesses input voltage V_ref, multidigit is capacitive The top crown of the capacitor of DAC circuit connects with the negative input of comparator CMP, and the negative input of the comparator CMP is also It is connected with compensation circuit and capacitor C_A, capacitor C_ABottom crown ground connection, the capacitor C_ACapacitance is C₀。

When not accessing compensation circuit, as shown in Fig. 2, the output voltage of the circuit system is,

Wherein b₀、b₁...b_n-1For the comparison output bit of the circuit system.

And the output voltage of the capacitive DAC circuit of multidigit is,

Available from above formula, the precision of whole system circuit is related to the precision of the capacitive DAC circuit of multidigit, byIt determines,

As shown in figure 3, in the ideal situation, to circuit system output bit b₀Position is analyzed, i.e., coefficient isMultidigit electricity The desired output voltage of appearance type DAC circuit is,

As shown in figure 4, and under physical condition because ADC is non-ideal component, its practical transformation curve and ideal convert There are certain deviations for curve, show as a variety of errors, such as zero point error full scale error, and reduce whole system circuit Signal ratio, in addition in the actual production process, the capacitive DAC circuit of the multidigit can have the change of certain capacitance, deviation Capacitance is denoted as Δ C, then the actual output voltage of the capacitive DAC circuit of multidigit is,

Similarly can comparison output bit to circuit system be b₁...b_nPosition is precision in 14...21_nUnder, carry out successively class It pushes away,

In the capacitive DAC circuit b of multidigit₀When position, the actual output voltage of the capacitive DAC circuit of multidigit is more capacitive than multidigit The desired output voltage of DAC circuit then has more additional

First by the ideal output electricity of the actual output voltage of the capacitive DAC circuit of multidigit and the capacitive DAC circuit of multidigit Pressure ratio relatively determinesIt is positive and negative:

In V_out=(0,1) determines that Δ C's is positive and negative, works as V_outWhen=0, Δ C is positive；Work as V_outWhen=1, Δ C is negative.

WhenIt is timing, then compensation circuit must provide a negative voltage, so that,

Wherein compensation rateSize, by V_out=0 arrives V_out=1 or V_out=1 arrives V_out=0 determines, through overcompensation Afterwards,Even if in process of production, the size C of capacitor₀Generate change Change will not cause to change to the precision of SAR ADC, it is ensured that SARADC precision with higher.

The compensation circuit includes a capacitor C_BWith multiple capacitors that progressively increase successively to progressively increase, multiple capacitor difference of progressively increasing For C_E1、C_E2...C_En, progressively increase capacitor C_E1、C_E2...C_EnCapacitance be respectively C_O、2C_O、3C_O...nC₀, in which:

The capacitor C_BTop crown be connected with the negative input of comparator CMP, the top crown of multiple capacitors that progressively increase Respectively with capacitor C_BBottom crown be connected, the bottom crowns of multiple capacitors that progressively increase ground connection.The described capacitor that progressively increases is equipped with 7 and successively For C_E1、C_E2、C_E3、C_E4、C_E5、C_E6、C_E7, wherein the capacitor C that progressively increases_E1、C_E2、C_E3、C_E4、C_E5、C_E6、C_E7Capacitance be respectively C_O、 2C_O、3C_O、4C_O、5C_O、6C_O、7C₀.Such compensation circuit needle is in the capacitive DAC circuit capacitor negligible amounts of multidigit, compensation effect Fruit is particularly evident, ensure that whole precision.

Additional quantity in real process isWhen the capacitor negligible amounts in the capacitive DAC circuit of multidigit, volume Outer numerical quantity is bigger, is lower so as to cause conversion accuracy, and transformed error is larger, and the compensation circuit in the present invention can be directed to multidigit When capacitive DAC circuit capacitor negligible amounts, compensation effect is particularly evident, has but protected whole precision.Using compensation circuit come To charge compensation, so that total amount of electric charge will not reduce in the capacitive DAC circuit of multidigit, to reduce multidigit electricity in production process The required precision of capacitor in appearance type DAC circuit, while ensure that whole precision.

Claims (4)

1. multidigit analog compensation SAR adc circuit, including comparator CMP and multidigit SAR module；It is characterized by:

The input terminal access of the multidigit SAR module has analog signal V_in, the output end and comparator CMP of multidigit SAR module Electrode input end connect；The negative input of the comparator CMP is connected with the capacitive DAC circuit of multidigit, wherein multidigit Capacitor in capacitive DAC circuit is respectively C₀、C₁...C_n-1, and capacitor C₀、C₁...C_n-1Capacitance be respectively C₀、2C₀、 2²C₀...2^n-1C₀；The bottom crown of the capacitor of the capacitive DAC circuit of the multidigit accesses input voltage V_ref, multidigit is capacitive The top crown of the capacitor of DAC circuit connects with the negative input of comparator CMP, and the negative input of the comparator CMP is also It is connected with compensation circuit and capacitor C_A, capacitor C_ABottom crown ground connection.

2. multidigit analog compensation SAR adc circuit according to claim 1, it is characterised in that: the compensation circuit packet Include a capacitor C_BWith multiple capacitors that progressively increase successively to progressively increase, multiple capacitors that progressively increase are respectively C_E1、C_E2...C_En, progressively increase capacitor C_E1、C_E2...C_EnCapacitance be respectively C_O、2C_O、3C_O...nC₀, in which:

The capacitor C_BTop crown be connected with the negative input of comparator CMP, the top crown of multiple capacitors that progressively increase respectively with Capacitor C_BBottom crown be connected, the bottom crowns of multiple capacitors that progressively increase ground connection.

3. multidigit analog compensation SAR adc circuit according to claim 2, it is characterised in that: the capacitor C_BCapacitance For C₀。

4. multidigit analog compensation SAR adc circuit according to claim 1, it is characterised in that: the capacitor C_ACapacitance For C₀。