CN110337765A - Semiconductor light source with extension embeddability autoregistration electricity and optical confinement - Google Patents
Semiconductor light source with extension embeddability autoregistration electricity and optical confinement Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18308—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
- H01S5/18322—Position of the structure
- H01S5/18327—Structure being part of a DBR
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18308—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL] having a special structure for lateral current or light confinement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/2205—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers
- H01S5/2206—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers based on III-V materials
- H01S5/2209—GaInP based
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/10—Construction or shape of the optical resonator, e.g. extended or external cavity, coupled cavities, bent-guide, varying width, thickness or composition of the active region
- H01S5/18—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities
- H01S5/183—Surface-emitting [SE] lasers, e.g. having both horizontal and vertical cavities having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]
- H01S5/18386—Details of the emission surface for influencing the near- or far-field, e.g. a grating on the surface
- H01S5/18391—Aperiodic structuring to influence the near- or far-field distribution
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/20—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
- H01S5/2205—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers
- H01S5/2206—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure comprising special burying or current confinement layers based on III-V materials
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Geometry (AREA)
- Semiconductor Lasers (AREA)
- Led Devices (AREA)
Abstract
The present invention relates to a kind of methods for obtaining surface-emitting semiconductor light source, provide electricity and optical confinement simultaneously, and determine lateral dimension using embedded structure to pass through photoetching process.
Description
Technical field:
The present invention relates to a kind of methods for obtaining surface-emitting semiconductor light source, provide electricity and optical confinement simultaneously, and
And lateral dimension is determined to pass through photoetching process using embedded structure.
Background technique:
Stimulated luminescence was proposed by Albert Einstein for the first time in 1917, steps graceful reality the nineteen sixty Theo more
The laser motion of optical frequency is showed and has demonstrated the presence of ruby laser, laser has been achieved for major progress, in the modern times
It is become more and more important in the world.Currently, laser is in industry, automobile, engineering, scientific research, communication and communication, medical and military affairs
Etc. being frequently used in many fields.
Laser is classified as two kinds according to their emitting area；Edge-emission and vertical cavity surface-emitting laser (VCSEL).
Vertical cavity surface-emitting laser (VCSEL:Vertical Cavity Surface Emitting Laser) type is partly led
The basis of volumetric laser can trace back to for the 1970's, be introduced into generation nineteen ninety as industrial products and returned to for the 1970's, first
Secondary use is in information and communication technology (ICT) field.In addition, in recent years, continuing to develop such as in new technical field；It is able to carry out posture knowledge
Other and 3-D scanning intelligence sensor, the laser lighting of monitoring and night vision system, pumped solid state laser, industrial infrared heating system
It unites, anticollision laser scanning device and automatic Pilot automatic driving vehicle in vehicle etc..
Vertical cavity surface-emitting laser (VCSEL) and other semiconductor light sources such as fringe radiation semiconductor laser (EEL) and
Light emitting diode (LED) is compared, and is had many advantages.Some in these advantages include being readily produced, and low energy consumption, circular light is defeated
Out, diverging is not being communicated with high effective optical closely.Compared with high power laser light, have such as high efficiency, long-life, narrow spectrum point
Cloth and stable spatial distribution, high device reliability, high-temperature operation, the superior performance such as cheaper and easier packaging.
Currently, vertical cavity surface-emitting laser (VCSEL) technology based on GaAs is based on method for oxidation.VCSEL most
Basic requirement is that electric current and light beam are limited in a small region or volume.In VCSEL, in order to current limit one
A zonule, first H+implantation method are applied.Although this method provides current limit, since it does not change refractive index,
Therefore optical confinement is not provided.It is electrical and optical all to be limited with oxide aperture technological invention alternatively,
Oxide inhibits the flowing of electric current and light refractive index is much smaller than GaAs/AlAs system.
For method for oxidation, in VCSEL design, the thin layer of high aluminium content is used in square region on the active area.For
This layer of exposure, oxide windows abrasion exceed its depth, and the oxidation of steam oven is realized using hot water mode of oxidizing in this stage, and
And provide electric current and the confined VCSEL aperture area of optics.Since oxide is insulator, resistance to current characteristics is provided
And because refractive index is less than AlGaAs, aperture area provides optical guidance.In this way it is possible to swash very small
Electrical and optical guidance is carried out in light region, however, production efficiency and integrity problem due to diameter less than 5 microns, VCSEL
Production need strict control.
Lower than these sizes, VCSEL chip provides advantage for data communication, but due to manufacture and integrity problem without
It is preferred.The limit for reaching method for oxidation limits further developing and preventing from reaching VCSEL photoelectron for VCSEL chip
Learn the optimum performance allowed.
The problem of oxide-VCSEL technology encounters is as follows:
Scaleability problem:: oxidation rate changes simultaneously with chip board in the oxide VCSEL method based on timing
And the variation of diameter is generated to the variation of the distance in the time of required diameter from the outer circle of abrasion.It is logical currently used for high-speed data
The oxide aperture of the VCSEL chip of letter is 5 μm or more.One reason for this is that the variation of diameter cannot be maintained at required
It produces in limit.Since the performance of chip depends on oxide aperture size, the productibility of device size is extremely important, therefore
The VCSEL diameter changed in this way can not be further decreased.
Thermal resistance problem: laser life exponentially declines with temperature, and low thermal resistance makes VCSEL work and hold at a lower temperature
The continuous longer time, however due to one of the reason of oxide is the material for preventing hot transmitting, is the thermal resistance of increase device.
Integrity problem: in oxidation process, by high AlGaAs layer (the usually Al of aluminium content0.98Ga0.02As) become
Lead to the defects of semiconductor crystal when AlxOy.These structures formed between oxidation and semiconductor surface lead to device event
Hinder and reduces reliability.In addition, due to the thermal expansion between semiconductor during oxidation then cools to room temperature at high temperature
Stress caused by difference is another factor for leading to reliability decrease.
Another method used except oxide VCSEL method is that the VCSEL based on two-step growth based on photoetching is raw
At method.These methods are based on, by amplifying the frame mode perimeter with high energy band and low-refraction in second step
Material by providing electrical and optical limitation forms.However, also there is this method thickness such as to etch, due to contacting and oxygen with air
Change AlGaAs material and does not have many disadvantages such as scalability in small size.
Patent application US6534331 is related to a kind of surface-emitting semiconductor laser for obtaining and having improved current limit
Method.Subject of the present invention is the current limiting element that can be used for constructing luminescent device.The current limiting element includes top
Layer and hole confining layers.The top layer includes the upper semiconductive material of first conduction type transparent to the light.It is described
Restricted area is around the bore region and includes dopant material to provide the high resistance to the electric current flowing.Of the invention
In one embodiment, restricted area includes the semiconductor material of the second conductivity type.
Patent application EP1568112 is related to generating the method for burying tunnel knot in a kind of surface-emitting semiconductor laser.
The present invention relates to one kind to have in surface-emitting semiconductor laser by comprising n doping semiconductor layer and including at least one p
The active area and limited on the 2nd n doping semiconductor layer in the p doped region of active area that doping semiconductor layer surrounds
The manufacture of the burial tunnel knot of tunnel knot, and in the first step of this method, etch process is executed, then in second step
In, carving area is sealed by mass transfer until it is in suitable gas by least one of the semiconductor layer being limited in tunnel junctions
In atmosphere.
Patent application US8774246 describes a kind of photoetching VCSEL method based on diffusion.In the present invention, p doping/
Insulator/high p doped layer is grown in the region above active position chamber respectively, and electrical and optical boot section is by standard UV photoetching
It is limited with etch process.Chip is packed into reactor for the second amplification step, by being used for platform after being etched the flat top
VCSEL is introduced into additive to high temperature in the high diffusion coefficient additive material reactor in face.Then upper mirror layer is amplified.It is logical
Cross table top high p contribution diffusion, undoped region also become doping and form the channel that electric current passes through below in table top.?
The area table top Wai Gu, undoped layer prevents electric current flowing by means of Fermi's grade pinning effect, therefore generates mesa region and Gu Qu
Voltage difference between domain, and electric current is limited to mesa region.Since peak region is the region with long wavelength's resonance, lead to
Crossing, there is high effective refractive index also to provide optical guidance.
Compared with oxide-VCSEL technology, such VCSEL is had many advantages, but this method there is also
Difficult design and performance limitation.Due to needing high additive level and the additive to be dispersed into VCSEL by heat treatment process
The additive in portion, high-content will lead to optical absorption losses.In addition, the progress of diffusion in the horizontal direction can prevent VCSEL
Effectively reduce submicron-scale.Therefore, although can reduce submicron-scale in terms of photoetching, as caused by spreading
Optical loss and extending transversely so that this becomes difficult.In addition, this method is not suitable for preparing the nanometer laser sequence based on VCSEL
Column.Method therefore, it is necessary to substitute diffusing V CSEL method He solve these problems.The present invention relates to one kind to pass through electricity and optics
Limitation obtains the new method of semiconductor light source and provides the solution of the above problem.
Goal of the invention:
The purpose of the present invention is passing through while providing electricity and optical confinement, surface emission light source or laser are obtained.
It is another object of the present invention to by eliminating problem of oxidation and allowing due to utilizing photoetching VCSEL method, Neng Gousheng
Produce the therefore high-power VCSEL sequence of high frequency.
Another object of the present invention is to allow since used method is non-oxide using the knot with high-termal conductivity
Structure.
Another object of the present invention is that single and sequential structure size and distance can be controlled with sub-micrometer precision.
Another object of the present invention is to allow to produce nanometer laser (VCSEL of submicron-scale) and sequence.
Detailed description of the invention:
The view of Fig. 1 vertical cavity surface-emitting laser (VCSEL) structure
Fig. 2 vertical cavity surface-emitting laser (VCSEL) structure is formed as the side sectional view of two-dimensional sequence
Fig. 3 vertical cavity surface-emitting laser (VCSEL) structure is formed as the top view of two-dimensional sequence
The first time amplification procedure view of Fig. 4 vertical cavity surface-emitting laser (VCSEL) production process
The photoetching of Fig. 5 vertical cavity surface-emitting laser (VCSEL) production and PSCB layers of etch process view
Second of amplification procedure view of Fig. 6 vertical cavity surface-emitting laser (VCSEL) production process
Fig. 7 vertical cavity surface-emitting laser (VCSEL) makes result view
Fig. 8 shows that effective refractive index passes through the adjustable calculated result of PSCB thickness degree
Ref. No. explanation:
101. dephased current barrier layer
102. opening
103. top contact metal
Mirror layer on 104.
105. active area
106. lower mirror layer
107. substrate
108. bottom contacts metal
Specific embodiment
It is electrical and optical in method to limit simultaneously the present invention relates to a kind of method for obtaining surface-emitting semiconductor light source
It is provided and lateral dimension can be determined by photoetching process using embedded structure.
The vcsel structure that Fig. 1 is shown includes；Dephased current barrier layer (101) (PSCB layers), optical mode and current limit opening
(102), top contact metal (103), upper mirror layer (104), active area (105), lower mirror layer (106), substrate (107) and bottom contact
Metal (108).
Active area (105) is located in the vertical cavity limited by lower mirror layer (106) and upper mirror layer (104).Vertical cavity includes light
Interior zone where mould and current limit opening (102) and the electric current quilt comprising dephased current barrier layer (101) (PSCB layers)
The perimeter of blocking.The perimeter that electric current comprising dephased current barrier layer (101) (PSCB layers) is blocked can be located at
In top mirror layer (104) or lower part mirror layer (106), so that perimeter is except active region (105).It is moved by abrasion
Phase current barrier layer (101) forms optical mode and current limit opening (102) in this region.
In order to block power with high current, dephased current barrier layer (101) (PSCB layers) are mixed by adding undoped or n
Miscellaneous silicon, selenium or tellurium can amplify.
VCSEL manufacturing method according to the present invention includes three basic steps: being amplified for the first time, photoetching process and second
Amplification.
Lower mirror layer (106), active area (105) and phase shift electricity comprising n doping in the first time amplification procedure that Fig. 4 is shown
The layer of flow barrier (101) is amplified.Upper mirror layer (104) are amplified and amplify in second of amplification procedure after photoetching process
Engineering terminates.Usually the layer including 10 to 40 periods is right for upper mirror layer (104) and lower mirror layer (106).This is in lower mirror layer (106)
Between 20-40, between upper mirror layer (104) 10-20.These layers to be by GaAs/AlGaAs, GaAs/AlAs or
AlGaAs/AlAs layers composition.Dielectric layer to form upper mirror layer (104) to can also be used for.First amplification procedure is to adulterate GaAs to n
Substrate (107) is performed.Other substrates (107) or crystalline material that can be used are also possible to InP, GaN, Si, Ge,
InAs, GaP or sapphire.
After lower mirror layer (106), active area (105) is amplified.Active area (105) is usually by InGaAs Quantum Well group
At.Quantum Well, quantum dot or the quantum wire that can be used to form active area (105) may include InGaAsN, InAlAs,
InGaAsP, AlGaAs, GaAs or InAs etc. different materials.In order to which positively charged and electronegative carrier injects active area
(105), the region when region below active area (105) shown in Fig. 2 is n doping above active area (105) is that p mixes
Miscellaneous amplification.It is the fact that p is adulterated on the contrary, dephased current barrier layer (101) with the upper mirror layer (104) above active area (105)
(PSCB layers) are the opposite types of undoped or upper mirror layer (104), that is, n-type doping, to deprive acknowledgement of consignment or be exposed to anti-
To charging.For this purpose, dephased current barrier layer (101) (PSCB layers), in order to block electric current, undoped or n doping is put
Greatly.If the current blocking feature of dephased current barrier layer (101) (PSCB layers) will be used in n-type region, in this case,
It can also undoped or p doping be amplified.(PSCB layers) of dephased current barrier layer (101) be located at active area (105) and
Region between upper mirror layer or inside upper mirror layer (104).Be formed comprising optical mode on active area (105) by photoetching process and
The inner opening (102) of current limit and perimeter comprising dephased current barrier layer (101) (PSCB layers).Therefore, it is formed
Material of the layer needed for inner opening (102) and perimeter (dephased current barrier layer (101) and peripheral layer) preferably by being free of aluminium
Material constitutes (GaAs, InGaP, InGaAs, InGaAsP), so that they will not be oxidized when being exposed to air upon wear.With this
The first step of kind mode, amplification process as shown in Figure 4 terminates.After the first amplification procedure, start photoetching process.
Photoetching-vcsel structure shown in fig. 5 is transferred to its first amplification procedure by photoetching and engraving method and is completed
Chip board on.Photoetching-vcsel structure can be by standard UV photoetching, electron beam (e-beam) photoetching or nano impression (nano-
Imprint it) is lithographically formed.The size of the structure can be defined as so that as low as 10 nanometers of the narrow edge or diameter.Then
It is worn using selective wet process or the formation of dry method abrasion method is open (102) and dephased current barrier layer after the completion of wear process
(101) it is located at perimeter, and dephased current barrier layer (101) are removed in interior zone.In this way, electric current can be with
By opening (102) region without passing through perimeter, to provide electric limitation.
The opening (102) being formed has optical confinement and electric limiting performance.For optical mode, in the opening
(102) guidance or reverse leading may be implemented in.This feature can be controlled by changing the thickness of dephased current barrier layer (101)
System.
Sample calculated result is as shown in figure 8, be located at work quilt of the G.R. Hadley of the prior art about VCSEL in calculating
It uses[1].By this, analysis shows, the variation of transit chamber resonance wavelength can control effective refractive index.That is, having long wave
The chamber of long resonance has bigger effective refractive index.
As shown in figure 8, can realize guidance or reverse leading by changing the thickness of dephased current barrier layer (101).
This feature.Use GaAs dephased current barrier layer (101) and 980 nanometers of wavelength as example in this calculating.It guides and anti-
It is periodically repeated to guidance behavior with thickness.The reason is that chamber resonance wave shows circulation behavior.Dephased current barrier layer
(101) start to increase with its thickness, be transferred to short wavelength and disappear and occur in long wave strong point.With the increase of thickness, meeting
It is transferred to short wavelength and disappears again.
The above-mentioned behavior cyclicity of effective refractive index it is lasting, and the main advantage of this behavior be dephased current resistance
The design flexibility that barrier (101) allows thickness to select.Thin dephased current barrier layer (101) needs reversed with upper mirror layer (104)
To provide current blocking, (that is, if upper mirror layer (104) is that p is adulterated, thin dephased current barrier layer (101) is n for doping
Doping) when, thick dephased current barrier layer (101) can provide electric current by undoped amplification and inhibit.In addition, thick phase shift
Region of the current barrier layer (101) other than opening (102) can also be used to realize high capacitance, and this feature is for obtaining high speed
VCSEL is extremely important.
After photoetching and abrasion process, sample becomes appropriate for second of amplification procedure.
As shown in fig. 6, upper mirror layer (104) is amplified in second of amplification procedure in reactor after chip board cleaning
(such as GaAs/AlGaAs layers to).With carbon, beryllium or zinc are doped, so that all epitaxial layers in second of amplification procedure are all
It is p-type.
After second of amplification procedure, what progress was as shown in Figure 7 on sample complies with standard laser fabrication schedule, and passes through
It places bottom contact metal (108) and top contact metal (103) completes manufacturing process.
Reference
[1](″Effective index model for vertical-cavity surface-emitting
Lasers, " Opt.Lett.20,1483 (1995)) (" effective index model of vertical cavity surface emitting laser "
Opt.Lett.20,1483 (1995))
Claims (12)
1. the present invention is a kind of surface-emitting semiconductor light source, it is characterised in that: including passing through dephased current barrier layer (101)
(PSCB layers), optical mode and current limit opening (102), top contact metal (103), upper mirror layer (104), active area (105), under
Mirror layer (106), substrate (107) and bottom contact metal (108).
2. surface luminous semiconductor light source according to claim 1, which is characterized in that its current barrier layer for including (101)
Amplified by adding the silicon of undoped or n doping, selenium or tellurium.
3. surface-emitting semiconductor light source according to claim 1, it is characterised in that: the upper mirror layer (104) includes 10-
The layer in 20 periods is right.
4. surface-emitting semiconductor light source according to claim 1, it is characterised in that: the lower specular layer (106) includes
The layer in 20-40 period is right.
5. surface-emitting semiconductor light source according to claim 1, it is characterised in that: its upper mirror layer (104) for including and
Lower mirror layer (106) is by GaAs/AlGaAs, GaAs/AlAs or AlGaAs/AlAs layers to composition.
6. surface-emitting semiconductor light source according to claim 1, it is characterised in that: its active area for including (105) by
Quantum Well comprising InGaAs, InGaAsN, InAlAs, InGaAsP, AlGaAs, GaAs or InAs, point or quantum wire are formed.
7. surface-emitting semiconductor light source according to claim 1, it is characterised in that: form perimeter institute upon wear
The layer (dephased current barrier layer (101) and peripheral layer) needed is preferably made of non-aluminum material, so that they are when being exposed to air
It is not oxidized.
8. surface-emitting semiconductor light source according to claim 1, it is characterised in that: dephased current barrier layer (101) tool
There is controllable thickness to be guided and reverse leading.
9. the present invention relates to a kind of methods for obtaining surface-emitting semiconductor light source, it is characterised in that；It is walked including technique below
It is rapid:
Layer comprising lower mirror layer (106), active area (105) and dephased current barrier layer (101) be amplified in sequence
Primary amplification,
Photoetching, forming the inner opening (102) for providing electricity limitation and optical confinement and being formed includes dephased current barrier layer
(101) perimeter,
The second amplification that upper mirror layer (104) is amplified,
Production process is completed by placing bottom contact metal (108) and top contact metal (103).
10. a kind of method for obtaining surface-emitting semiconductor light source according to claim 8, it is characterised in that；In its light
Standard UV photoetching is used in carving technology step.
11. a kind of method for obtaining surface-emitting semiconductor light source according to claim 8, it is characterised in that；In its light
Electron beam lithography is used in carving technology step.
12. a kind of method for obtaining surface-emitting semiconductor light source according to claim 8, it is characterised in that；In its light
Nano-imprint lithography is used in carving technology step.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TR2016/20378 | 2016-12-30 | ||
| TR2016/20378A TR201620378A2 (en) | 2016-12-30 | 2016-12-30 | Method of obtaining surface emission semiconductor light source with embedded electrical and optical restriction layer. |
| PCT/TR2017/050728 WO2018208274A2 (en) | 2016-12-30 | 2017-12-29 | Aligned electrical and optical confinement |
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| Publication Number | Publication Date |
|---|---|
| CN110337765A true CN110337765A (en) | 2019-10-15 |
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| CN201780081435.5A Pending CN110337765A (en) | 2016-12-30 | 2017-12-29 | Semiconductor light source with extension embeddability autoregistration electricity and optical confinement |
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| Country | Link |
|---|---|
| CN (1) | CN110337765A (en) |
| TR (1) | TR201620378A2 (en) |
| WO (1) | WO2018208274A2 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20220294186A1 (en) * | 2021-03-09 | 2022-09-15 | Rayir, Co. | Laser device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20240162685A1 (en) * | 2022-11-07 | 2024-05-16 | Ii-Vi Delaware, Inc. | Vertical cavity surface emitting laser (vcsel) emitter with guided-antiguided waveguide |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5446752A (en) * | 1993-09-21 | 1995-08-29 | Motorola | VCSEL with current blocking layer offset |
| US5903590A (en) * | 1996-05-20 | 1999-05-11 | Sandia Corporation | Vertical-cavity surface-emitting laser device |
| US20020191656A1 (en) * | 2001-06-13 | 2002-12-19 | Mawst Luke J. | Vertical-cavity surface-emitting semiconductor laser arrays |
| US20050249254A1 (en) * | 2004-04-14 | 2005-11-10 | Deppe Dennis G | Current-confinement heterostructure for an epitaxial mode-confined vertical cavity surface emitting laser |
| WO2006024025A2 (en) * | 2004-08-25 | 2006-03-02 | Nanosource, Inc. | Optical-mode-confined and electrical-current-confined semiconductor light sources utilizing resistive interfacial layers |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6411638B1 (en) * | 1999-08-31 | 2002-06-25 | Honeywell Inc. | Coupled cavity anti-guided vertical-cavity surface-emitting laser |
| WO2010027581A1 (en) * | 2008-09-04 | 2010-03-11 | 3M Innovative Properties Company | Monochromatic light source |
| JP5434131B2 (en) * | 2009-02-24 | 2014-03-05 | 富士通株式会社 | Multi-wavelength laser device and manufacturing method thereof |
-
2016
- 2016-12-30 TR TR2016/20378A patent/TR201620378A2/en unknown
-
2017
- 2017-12-29 WO PCT/TR2017/050728 patent/WO2018208274A2/en active Application Filing
- 2017-12-29 CN CN201780081435.5A patent/CN110337765A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5446752A (en) * | 1993-09-21 | 1995-08-29 | Motorola | VCSEL with current blocking layer offset |
| US5903590A (en) * | 1996-05-20 | 1999-05-11 | Sandia Corporation | Vertical-cavity surface-emitting laser device |
| US20020191656A1 (en) * | 2001-06-13 | 2002-12-19 | Mawst Luke J. | Vertical-cavity surface-emitting semiconductor laser arrays |
| US20050249254A1 (en) * | 2004-04-14 | 2005-11-10 | Deppe Dennis G | Current-confinement heterostructure for an epitaxial mode-confined vertical cavity surface emitting laser |
| WO2006024025A2 (en) * | 2004-08-25 | 2006-03-02 | Nanosource, Inc. | Optical-mode-confined and electrical-current-confined semiconductor light sources utilizing resistive interfacial layers |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20220294186A1 (en) * | 2021-03-09 | 2022-09-15 | Rayir, Co. | Laser device |
Also Published As
| Publication number | Publication date |
|---|---|
| TR201620378A2 (en) | 2017-05-22 |
| WO2018208274A8 (en) | 2019-08-01 |
| WO2018208274A3 (en) | 2019-01-31 |
| WO2018208274A2 (en) | 2018-11-15 |
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