CN110335865B - High-robustness bidirectional SCR device capable of inhibiting current saturation effect - Google Patents

High-robustness bidirectional SCR device capable of inhibiting current saturation effect Download PDF

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Publication number
CN110335865B
CN110335865B CN201910561270.2A CN201910561270A CN110335865B CN 110335865 B CN110335865 B CN 110335865B CN 201910561270 A CN201910561270 A CN 201910561270A CN 110335865 B CN110335865 B CN 110335865B
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heavily doped
doped region
conductivity type
well region
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CN110335865A (en
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刘继芝
黄美晨
杜飞波
刘志伟
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University of Electronic Science and Technology of China
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University of Electronic Science and Technology of China
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
    • H01L27/0262—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices

Abstract

The invention belongs to the field of Electrostatic Discharge (ESD) protection of an integrated circuit, and relates to a bidirectional SCR (DDSCR), in particular to a high-robustness bidirectional SCR capable of inhibiting a current saturation effect, which is used for overcoming the current saturation effect of the conventional DDSCR when the current is larger. The invention adds an n-type heavily doped region in each of the two n-type well regions on the basis of the traditional DDSCR device and directly connects the two n-type heavily doped regions to the electrode or connects the two n-type heavily doped regions to the electrode through the resistor, thereby adding a new path in the device, reducing the resistance value of the device, simultaneously inhibiting the current saturation effect of the device caused by the increase of the resistor under the condition of large current and realizing higher protection capability.

Description

High-robustness bidirectional SCR device capable of inhibiting current saturation effect
Technical Field
The invention belongs to the field of Electrostatic Discharge (ESD) protection of an integrated circuit, and particularly relates to an ESD protection structure device, in particular to a bidirectional Silicon Controlled Rectifier (SCR) device, and particularly relates to a high-robustness bidirectional SCR device capable of inhibiting a current saturation effect.
Background
Electrostatic discharge is an event that limited charges are transferred between two objects with different electric potentials, and since the first bipolar transistor invention and the first IC chip are born, the electrostatic discharge poses an increasingly serious threat to the reliability of the IC chip; instantaneous high-voltage electrostatic pulses generated by ESD flow through the chip pins, so that internal circuits of the chip are damaged and the chip cannot work normally; for integrated circuits, electrostatic discharge may occur on the pins of the integrated circuit from production to transportation, system integration, and user use.
In some application occasions, in order to improve the driving capability or the anti-interference capability, an interface circuit with an input signal amplitude higher than the power supply voltage is needed, so that a traditional ESD protection device cannot be used between an IO interface and a power supply, and an ESD protection device with a bidirectional function needs to be used. A bidirectional SCR (Dual-Directional SCR, referred to as DDSCR) has become an important choice for designing a bidirectional ESD protection scheme because it can provide bidirectional protection and has higher robustness, but the problem of reduced robustness of the DDSCR device due to current saturation effect is an important factor restricting its development and application.
As shown in fig. 1, when a positive pulse is applied to PAD1 of a conventional DDSCR device (PAD2 is grounded), first, the p-n junction formed by n-well region 120 and p-well region 150 is reverse biased, and when the voltage across the p-n junction is greater than the avalanche breakdown voltage, a large number of electron-hole pairs are generated near the p-n junction; the generated holes reach the PAD2 through the p-type well region 150, the n-type well region 130 and the n-type heavily doped region 132, and the parasitic NPN is turned on; the generated electrons reach the PAD1 through the n-type well region 120 and the n-type heavily doped region 121, a voltage drop is generated on the resistance of the n-type well region 120, so that the p-n junction formed by the p-type heavily doped region 122 and the n-type well region 120 is forward biased, the parasitic PNP transistor is turned on, and a current channel of the SCR1 is formed, wherein the current path is as indicated in fig. 1.
When a positive pulse is applied to the PAD2 of the DDSCR device (PAD1 is grounded), the p-n junction formed by the n-type well region 130 and the p-type well region 150 is avalanche broken down to generate a large number of electron-hole pairs; the generated holes reach the PAD1 through the p-type well region 150, the n-type well region 120 and the n-type heavily doped region 121, and the parasitic NPN is turned on; the generated electrons reach the PAD2 through the n-type well region 130 and the n-type heavily doped region 132, and a voltage drop is generated on the resistance of the n-type well region 130, so that a p-n junction formed by the p-type heavily doped region 131 and the n-type well region 130 is forward biased, and the parasitic PNP transistor is turned on to form an SCR current channel.
However, when the current is large, the current saturation effect occurs in the DDSCR device, and the TLP test result is shown in fig. 2; when the DDSCR device is in current saturation, the resistance of the device is increased, and the protection capability of the DDSCR is reduced. Therefore, how to suppress the current saturation effect for ESD protection under advanced process is an important research direction for optimizing the DDSCR device.
Disclosure of Invention
The invention aims to provide a high-robustness DDSCR (RDDSCR) device capable of inhibiting a current saturation effect, and the device structure effectively inhibits the current saturation effect by adding a current path.
In order to achieve the purpose, the invention adopts the technical scheme that:
a highly robust bidirectional SCR device capable of suppressing the effects of current saturation, comprising:
a first conductivity type silicon substrate 110; a second conductive type deep well region 140 formed on the first conductive type silicon substrate; a first conductive type well region 150 formed on the second conductive type deep well; a second conductivity type well region a 120 and a second conductivity type well region B130 formed on the first conductivity type well region;
a second conductive type heavily doped region A connected with the PAD1 is sequentially arranged in the second conductive type well region A 1121. Heavily doped region A of the first conductivity type 2122 and a heavily doped region a of the second conductivity type 3123, shallow trench isolation is arranged between every two adjacent heavily doped regions;
a second conductive type heavily doped region B connected with the PAD2 is sequentially arranged in the second conductive type well region B 3133. Heavily doped region B of the first conductivity type 1131 and a heavily doped region B of the second conductivity type 2132, shallow trench isolation is arranged between adjacent heavily doped regions;
the second conductive type heavily doped region A 3123 and a heavily doped region B of the second conductivity type 3133 are provided with shallow trench isolations.
Further, the heavily doped region A of the second conductivity type 3123 is connected to a PAD1 via a first resistor R1, the heavily doped region B of the second conductivity type 3133 is connected to the PAD2 through the second resistor R2, and the resistance of the first resistor R1 and the resistance of the second resistor R2 should be smaller than the resistance of the second conductivity type well region a and the second conductivity type well region B, respectively.
The invention has the beneficial effects that:
compared with the traditional bidirectional SCR structure, the structure reduces the resistance value of the device by adding a new path in the device, can inhibit the current saturation effect of the device caused by the resistance increase under the condition of large current, and can realize higher protection capability.
Drawings
FIG. 1 is a conventional DDSCR device structure;
FIG. 2 shows TLP test results of a conventional DDSCR and the RDDSCR of the present invention;
FIG. 3 is a high robustness DDSCR device structure proposed by the present invention;
fig. 4 is a layout implementation structure of a high-robustness DDSCR device proposed in an embodiment of the present invention.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and specific embodiments.
The embodiment provides a high-robustness bidirectional SCR device capable of suppressing the current saturation effect, and the device structure thereof is shown in fig. 3; the method specifically comprises the following steps:
a p-type silicon substrate 110; the n-type deep well region 140 formed on the p-type silicon substrate 110 is used for isolating the SCR device above the n-type deep well region from the p-type silicon substrate;
a p-type well region 150 formed on the n-type deep well region 140, and two n- type well regions 120 and 130 formed on the p-type well region 150; an n-type heavily doped region 121, a p-type heavily doped region 122 and an n-type heavily doped region 123 are arranged in the n-type well region 120, and an n-type heavily doped region 133, a p-type heavily doped region 131 and an n-type heavily doped region 132 are arranged in the n-type well region 130; the n-type heavily doped region 121 and the p-type heavily doped region 122 are connected with the PAD1, and the n-type heavily doped region 123 is directly connected to the PAD1 or connected to the PAD1 through a resistor R1; the p-type heavily doped region 131 and the n-type heavily doped region 132 are connected with the PAD2, and the n-type heavily doped region 133 is directly connected to the PAD2 or connected to the PAD2 through a resistor R2;
shallow trench isolation is arranged among the n-type heavily doped region 121, the p-type heavily doped region 122, the n-type heavily doped region 123, the n-type heavily doped region 133, the p-type heavily doped region 131 and the n-type heavily doped region 132, as shown by the shaded area in fig. 2.
Fig. 4 shows a layout implementation manner of the high-robustness bidirectional SCR device capable of suppressing the current saturation effect, in which two active regions are added to the RDDSCR device according to the embodiment compared with the conventional DDSCR device, but the high-robustness DDSCR device provided by the present invention has a smaller area under the condition of the same protection capability.
The high-robustness DDSCR device of the embodiment is formed by adding an n-type heavily doped region in each of two n-type well regions on the basis of a traditional DDSCR device and directly connecting the n-type heavily doped region to an electrode or connecting the n-type heavily doped region to the electrode through a resistor. When a positive pulse is applied to the PAD1 of the high-robustness DDSCR device (PAD2 is grounded), firstly, a p-n junction formed by the n-type well region 120 and the p-type well region 150 is reversely biased, and when the voltage across the p-n junction is larger than the avalanche breakdown voltage of the p-n junction, a large number of electron-hole pairs are generated near the p-n junction; the generated electrons reach the PAD1 through the n-type well region 120, the n-type heavily doped region 123 and the resistor R1, and meanwhile, the generated electrons also reach the PAD1 through the n-type well region 120 and the n-type heavily doped region 121; finally, the voltage drop on the two channels causes the forward bias of the p-n junction formed by the p-type heavily doped region 122 and the n-type well region 120, and the parasitic PNP tube is opened; due to the forward bias of the p-n junction formed by the p-type well region 150 and the n-type well region 130, the collector current of the parasitic PNP transistor flows into the n-type well region 130, a part of the current flows into the PAD2 through the heavily n-doped region 132 to form the SCR1 current channel, and the other part of the current flows into the PAD2 through the heavily n-doped region 133 and the resistor R2 to form the SCR2 current channel. Since the device is a bi-directional device, it is structurally completely symmetrical, and the reverse turn-on process is as described above.
Compared with the traditional DDSCR device which only has one SCR1 path, the high-robustness DDSCR device of the embodiment has two paths of an SCR1 and an SCR2, as shown in FIG. 3; because a path is added to the high-robustness DDSCR device, the current path of the device is widened, the resistance is reduced, and the current saturation effect can be inhibited. As can be seen from the TLP test result of fig. 2, the resistance of the high-robustness DDSCR device is small, and when the current is large, current saturation does not occur, and the protection capability of the device is improved.
While the invention has been described with reference to specific embodiments, any feature disclosed in this specification may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise; all of the disclosed features, or all of the method or process steps, may be combined in any combination, except mutually exclusive features and/or steps.

Claims (2)

1. A highly robust bidirectional SCR device capable of suppressing the effects of current saturation, comprising:
a first conductivity type silicon substrate (110); a second conductivity type deep well region (140) formed on said first conductivity type silicon substrate; a first conductivity type well region (150) formed over said second conductivity type deep well; a second conductivity type well region A (120), a second conductivity type well region B (130) formed over said first conductivity type well region;
a second conductive type heavily doped region A connected with the PAD1 is sequentially arranged in the second conductive type well region A1(121) A first conductive type heavily doped region A2(122) And a heavily doped region A of the second conductivity type3(123) Shallow trench isolation is arranged between every two adjacent heavily doped regions;
a second conductive type heavily doped region B connected with the PAD2 is sequentially arranged in the second conductive type well region B3(133) A first conductive type heavily doped region B1(131) And a heavily doped region B of the second conductivity type2(132) Shallow trench isolation is arranged between every two adjacent heavily doped regions;
the second conductive type heavily doped region A3(123) And a second conductive type heavily doped region B3(133) Shallow trench isolation is arranged between the two layers.
2. The highly robust bidirectional SCR device of claim 1, wherein said heavily doped region A of the second conductivity type3(123) Connected to PAD1 through a first resistor (R1), the heavily doped region B of the second conductivity type3(133) Is connected to the PAD2 through a second resistor (R2), and the resistance of the first resistor (R1) and the resistance of the second resistor (R2) should be smaller than the resistance of the second conductivity type well region a and the second conductivity type well region B, respectively.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107731811A (en) * 2017-09-06 2018-02-23 电子科技大学 A kind of SCR device triggered by longitudinal BJT for ESD protection
CN108807374A (en) * 2018-07-03 2018-11-13 江南大学 A kind of high-voltage bidirectional Transient Voltage Suppressor

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7427787B2 (en) * 2005-07-08 2008-09-23 Texas Instruments Incorporated Guardringed SCR ESD protection

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107731811A (en) * 2017-09-06 2018-02-23 电子科技大学 A kind of SCR device triggered by longitudinal BJT for ESD protection
CN108807374A (en) * 2018-07-03 2018-11-13 江南大学 A kind of high-voltage bidirectional Transient Voltage Suppressor

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