CN110324968A - Circuit substrate and its manufacturing method - Google Patents

Circuit substrate and its manufacturing method Download PDF

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Publication number
CN110324968A
CN110324968A CN201910237201.6A CN201910237201A CN110324968A CN 110324968 A CN110324968 A CN 110324968A CN 201910237201 A CN201910237201 A CN 201910237201A CN 110324968 A CN110324968 A CN 110324968A
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CN
China
Prior art keywords
circuit substrate
mounting structure
identification label
component
formation process
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201910237201.6A
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Chinese (zh)
Inventor
生天目里美
古桥孝彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
FDK Corp
Original Assignee
FDK Corp
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Filing date
Publication date
Application filed by FDK Corp filed Critical FDK Corp
Publication of CN110324968A publication Critical patent/CN110324968A/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0266Marks, test patterns or identification means
    • H05K1/0269Marks, test patterns or identification means for visual or optical inspection
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

The present invention can be easy to carry out the qualified judgement of the positional shift between circuit substrate and the electronic component for being installed on circuit substrate in a short time, can improve the treating capacity of judgment step.The circuit substrate (2) that component (23) is installed include: with for installing component (23) the first pad (17) and the second pad (18) mounting structure and be configured at and the identification of mounting structure same layer label (10a), identification label (10a) includes first part (11) and is configured in a manner of separating the first interval (S1) with first part (11) along first direction (x), and in a first direction on (x) with the second part (12) of the first width (W1).Furthermore, the manufacturing method of foregoing circuit substrate (2) includes the preparatory process of prepared substrate and will include that the mounting structure of the first pad (17) and the second pad (18) that are used for installing component (23) is formed in the mounting structure formation process of substrate, and mounting structure formation process includes at least part structure for being formed simultaneously above-mentioned mounting structure and the label formation process of identification label (10a).

Description

Circuit substrate and its manufacturing method
Technical field
The present invention relates to the circuit substrates and its manufacturing method that constitute electronic circuit module, more particularly to are installed by surface Technology is installed with the circuit substrate and its manufacturing method of electronic component.
Background technique
As the technology with the electronic circuit module of predetermined function is constituted, it is widely used a kind of using surface mounting technique Various electronic components are integrated in the skill and technique of one piece of circuit substrate.Be installed in these electronic circuit modules be used for and other The connector of circuit substrate connection.This connector includes at least more than ten connection terminals, in order to improve packing density, these companies The spacing of connecting terminal is becoming narrow gradually.
As the gimmick that above-mentioned connector surface is installed on to circuit substrate, exist it is a kind of will be with by solder reflow techniques More than ten connection terminals of relatively narrow spacing configuration are connected to the technology for being formed in each pad of circuit substrate.By upper In the case where stating technology progress surface installation, following process is needed: by each connection terminal in each weldering for being used to connect them It is directed at position in the prescribed limit of disk and loads, and carries out the qualified judgement of above-mentioned positional shift.
It is loaded to be directed at position as described above, needs the phase of the position between the electronic component and substrate to installing Mutual relation is detected, for example, disclosing a kind of technology in documents 1: it is respectively formed label in electronic component and substrate, And the distance between these labels are measured to calculate position offset.
In addition to this, as the shape of connector becomes larger, do not require nothing more than makes between connection terminal and pad as described above Position alignment also requires the shape for being arranged to connector integrally to control on the surface of circuit substrate to be accurately electrically connected In predetermined region, with the interference for preventing and being set between neighbouring other component.In this case, it is desirable that such one Kind of method: other than the position alignment between connection terminal and pad, it is also contemplated that the deviation of the outer dimension of connector into Row position alignment integrally controls connector in the defined region of circuit substrate.
Existing technical literature
Patent document
Patent document 1: Japanese Patent Laid-Open 9-246291 bulletin
But in technology disclosed in patent document 1, the label of the label and circuit substrate to electronic component is needed Respective positions are detected, and according to the difference of these location informations, are calculated the information of positional shift.In order to each The position of label is detected, for example, it is desired to which optical scanner label to identify its shape, as a result, detection time is elongated, is examined The treating capacity for surveying the qualified judgement of device is lower.Above situation can be such that output when manufacture reduces, and cause manufacturing cost Increase.
Summary of the invention
The circuit substrate of first method according to the present invention is the circuit substrate that a kind of pair of component is installed, circuit base Plate includes the mounting structure for installing component and is configured at and the identification of above-mentioned mounting structure same layer label, identification label packet First part and second part are included, above-mentioned second part is in a manner of separating the first interval along first direction and above-mentioned first part Configuration, and there is the first width in a first direction.
Second method according to the present invention, on the basis of above-mentioned first method, first part and second part are by tool The quadrangle for being parallel to the side of the second direction orthogonal with first direction is constituted.
Third Way according to the present invention, on the basis of above-mentioned second method, identification label also includes Part III, Above-mentioned Part III is configured to and second part interval;And Part IV, above-mentioned Part IV are configured to along second party The second interval is separated to Part III, and there is the second width in a second direction, Part III and Part IV are by packet Include the quadrangle composition for being parallel to the side of first direction.
Fourth way according to the present invention, on the basis of above-mentioned Third Way, first part and Part III are configured to It is overlapped at same position.
5th mode according to the present invention, on the basis of above-mentioned Third Way or above-mentioned fourth way, second part is The rectangle extended with the first width and in a second direction, Part IV is with the second width and extends in a first direction Rectangle, a part of second part are overlapped with a part of Part IV and form L-shaped.
6th mode according to the present invention, on the basis of above-mentioned first method either type into above-mentioned 5th mode, Mounting structure has top layer's wiring layer, and identification label is formed in above-mentioned top layer's wiring layer.
7th mode according to the present invention, on the basis of above-mentioned six mode, top layer's wiring layer includes and component The pad of connection terminal connection.
Eighth mode according to the present invention, on the basis of above-mentioned first method either type into above-mentioned 5th mode, Mounting structure includes through-hole, and identification label is formed by above-mentioned through-hole.
The manufacturing method of the circuit substrate of 9th mode according to the present invention is the system for the circuit substrate installed to component Make method, comprising: preparatory process, in above-mentioned preparatory process, prepared substrate;And mounting structure formation process, in above-mentioned peace In assembling structure formation process, the mounting structure for being used for installing component is formed in substrate, mounting structure formation process includes simultaneously A part of mounting structure and the label formation process of identification label are formed, identification label has first part and along first party It is configured to the mode for separating the first interval with first part, and in a first direction with the second part of the first width, thus The position offset between a part and above-mentioned component to mounting structure detects.
Tenth mode according to the present invention, on the basis of above-mentioned nine mode, a part of structure of mounting structure is most Upper layer wiring layer, label formation process further includes conductive layer formation process and pattern formation process, wherein in above-mentioned conductive layer shape At in process, the conductive layer for being used for top layer's wiring layer is formed in substrate, in above-mentioned pattern formation process, by conductive layer shape At pattern, and it is formed simultaneously top layer's wiring layer and above-mentioned identification label.
Circuit substrate according to the present invention and its manufacturing method, only by visual observation or identification of the image recognition to circuit substrate The component the covering whether first part of label and second part respectively expose or be installed, which is hidden, to be checked, just can be easy Whether the setting position of ground judgement part is in the range of regulation.As long as being pole for visual or image recognition review time Short time, therefore, the treating capacity of check device are big.It is able to achieve output as a result, to be improved, manufacturing cost is reduced Effect.
Detailed description of the invention
Fig. 1 is the top view of the identification label of first embodiment of the invention.
Fig. 2 is the top view for indicating the movement of identification label of first embodiment of the invention.
Fig. 3 A is the top view for indicating the movement of identification label of first embodiment of the invention.
Fig. 3 B is the top view for indicating the movement of identification label of first embodiment of the invention.
Fig. 4 A is the top view for indicating the movement of identification label of first embodiment of the invention.
Fig. 4 B is the top view for indicating the movement of identification label of first embodiment of the invention.
Fig. 5 is the top view of the identification label of the variation 1 of first embodiment of the invention.
Fig. 6 is the top view of the movement of the identification label for the variation 1 for indicating first embodiment of the invention.
Fig. 7 is the top view of the identification label of the variation 2 of first embodiment of the invention.
Fig. 8 is the top view of the movement of the identification label for the variation 2 for indicating first embodiment of the invention.
Fig. 9 is the electronic circuit using the circuit substrate of the identification label for the variation 2 for being installed with first embodiment of the invention The top view of module.
Figure 10 is equipped with the top view of the circuit substrate of the identification label of the variation 2 of first embodiment of the invention.
Figure 11 is the identification label of the variation 2 of first embodiment of the invention and the configuration diagram of mounting structure.
Figure 12 is equipped with the top view of the circuit substrate of the identification label of second embodiment of the invention.
(symbol description)
1 electronic circuit module;
2 circuit substrates;
10a, 10b, 10c identification label;
11 first parts;
12 second parts;
13 Part III;
14 Part IV;
15 Part V;
16 Part VI;
17 first pads;
18 second pads;
20 shapes;
21 connection terminals;
22 fixing terminals;
23 components;
30 electronic components;
31,32 pad;
33 top layer's wiring layers;
DW position offset;
S1 first is spaced;
S2 second is spaced;
The first width of W1;
The second width of W2;
X first direction;
Y second direction.
Specific embodiment
Hereinafter, being illustrated based on attached drawing to first embodiment of the invention.
Fig. 1 is the top view of the identification label 10a of first embodiment of the invention.Identification label 10a includes for example square The first part 11 of shape and for example rectangular second part 12.First part 11 and second part 12 along first direction x each other Separate the first interval S1.Second part has width W1 in a first direction.
In addition, the shape of first part 11 and second part 12 is respectively not limited to square and rectangle, it can also be with For arbitrary shape.However, it is desirable to can be to the interval S1 and work as the shortest distance between first part 11 and second part 12 W1 for the maximum width of second part 12 is provided, and S1 and maximum width W1 are arranged in specified directions at interval for configuration It is listed on straight line.
Furthermore, it may be desirable to, can by visual observation or image recognition easily detect identification label 10a.In order to upper State purpose, it may be desirable to, first part 11 and second part 12 be respectively with it is parallel with second direction y while four while Shape.
Fig. 2 indicates that identification label 10a and the shape 20 for the component 23 for carrying out position alignment using identification label 10a are respective Configuration.It is located in the end of the shape 20 of the component 23 of alignment and is provided with the first width W1 to second part 12 and right The first interval S1 between first part 11 and second part 12 carries out defined, second part 12 the consistent position in end When, the datum mark that position offset is zero can be defined as.
In the state of fig. 2, if can be conceived to detect first part 11 and second part 12 to be examined It looks into, then first part 11 is not detected, and only second part 12 is detected.
The position of the shape 20 of Fig. 3 A expression component 23 is from datum mark to first part 11 along first direction x displacement offset d W State afterwards.In detail in this figure, second part 12 is whole exposes, and first part 1 by the covering of shape 20 of component 23 and entirely without Method is seen.
Can the case where with Fig. 2, be identical, detect first part 11 and second part 12 if being conceived to be checked, Then first part 11 is not detected, and only second part 12 is detected, about this point, the testing result of Fig. 3 A and Fig. 2's Testing result is identical.
Fig. 3 B indicates the state of position ratio Fig. 3 A of the shape 20 of component 23 more to the direction of first part 11 significantly position State after setting offset.In the above-described state, position offset dW is bigger than the first interval S1, therefore, one of first part 11 Divide and exposes.
Can the case where with Fig. 3 A, be identical, detect first part 11 and second part 12 if being conceived to be checked, Then a part of first part 11 and second part are detected.
Above-mentioned testing result can detect first part 11 a part on this point with the detection in Fig. 2 and Fig. 3 A As a result significantly different.According to the configuration of first part 11 shown in Fig. 3 B it is found that can detect that first part 11 is to meet position Offset dW > first is spaced the case where condition of S1.Therefore, according to detect first part 11 (at least part) this One as a result, can be judged as that position offset dW is greater than the first interval S1.
From the foregoing, it will be observed that if configuring identification label 10a in a manner of allowing the upper limit value of position offset to be the first interval S1 First part 11 and second part 12 can judge then only by whether detect first part 11 (at least part) It is qualified product that position offset is in allowed band under (state of Fig. 3 A) or position offset is more than allowed band The rejected product of (state of Fig. 3 B).
As described above, by above-mentioned steps realize can be by the way that (mesh can be detected to the judgement of qualified product/rejected product Depending on) go out first part 11 and second part 12 and unambiguously determine, therefore, measurement can be completed in a short time, and can hold Easily judged.
Fig. 4 A indicates the position of the shape 20 of component 23 from datum mark to the direction opposite with first part 11, along first party State to after x position offset d W.In detail in this figure, a part of second part 12 is covered by the shape 20 of component 23, but can be examined Measure the part of exposing.On the other hand, first part 11 is covered and can not be seen completely by the shape 20 of component 23.
Under the state of fig. 4, first part 11 and second part 12 can be detected to be checked if being conceived to, A part 11 is not detected, and can detect a part of second part 12.Above-mentioned testing result is only detecting second On this point of dividing 12 is identical as the testing result of Fig. 2.
Fig. 4 B indicates that the state of position ratio Fig. 4 A of the shape 20 of component 23 is bigger to the direction opposite with first part 11 State after amplitude positions offset.In detail in this figure, position offset dW is bigger than the first width W1, therefore, second part 12 it is whole Body is covered by the shape 20 of component 23, to can not detect.Therefore, it can not be examined according at the position of configuration second part 12 Measure second part 12 as a result, can be judged as that position offset dW is more than the first width W1.
From the above mentioned, if designing identification label 10a in a manner of allowing the upper limit value of position offset to be the first width W1 The shape of second part 12 can judge it is that position offset is in and permits then only by whether detect second part 12 Perhaps the qualified product in range (state of Fig. 4 A) or position offset are more than the rejected product (shape of Fig. 4 B of allowed band State), it can be easily performed in a short time.
Fig. 5 is in the first embodiment of the present invention, other than above-mentioned identification label 10a is arranged, to also set up insighted Not Biao Ji 10b variation 1 top view.Identification label 10b includes for example square Part III 13 and such as rectangle Part IV 14.Part III 13 and Part IV 14 are separated from each other second along the second direction y orthogonal with first direction x It is spaced S2.Part IV has width W2 in a second direction.In addition, Part III 13 is separated from each other with first part 11.
In addition, the shape of Part III 13 and Part IV 14 is respectively not limited to square and rectangle, it can also be with For arbitrary shape.However, it is desirable to can be to the interval S2 and work as the shortest distance between Part III 13 and Part IV 14 W2 for the maximum width of Part IV 14 is provided, and S2 and maximum width W2 are arranged in specified directions at interval for configuration It is listed on straight line.
Furthermore, it may be desirable to, can by visual observation or image recognition easily detect identification label 10b.In order to upper State purpose, it may be desirable to, Part III 13 and Part IV 14 be respectively with it is parallel with first direction x while four while Shape.
Furthermore, it may be desirable to, identification label 10a, 10b respectively equally can visual or image recognitions.Above-mentioned design energy Realize the inspection together of identification label 10a, 10b.Especially more preferably, identification label 10b and identification label 10a are configured to 90 degree of rotational symmetry each other.
Fig. 6 is indicated identification label 10a, 10b and is carried out the shape of the component 23 of position alignment using identification label 10a, 10b 20 respective configurations.It is located at and first to second part 12 in the end of the first direction x of the shape 20 of the component 23 of alignment Width W1 carry out as defined in second part 12 the consistent position in end when, the position offset that can be defined as first direction is zero Datum mark.Equally, it is located at and the second width W2 to Part IV 14 in the end of the second direction y of the shape 20 of component 23 When the consistent position in end of Part IV 14 as defined in carrying out, the position offset that can be defined as second direction is zero benchmark Point.
For this variation 1 identification mark 10a, 10b, can with step shown in Fig. 3 A, Fig. 3 B, Fig. 4 A and Fig. 4 B Identical step, by visual observation or image recognition easily detects first direction x and second direction y respective positions offset Whether respectively more than the first interval S1, the interval the first width W1 and second S2, the second width W2.
As the design operation of identification label, firstly, so that the upper limit value of the permission position offset of first direction x is the The mode of one interval S1 and the first width W1 designs the first part 11 of identification label 10a and the shape of second part 12.Herein On the basis of, preferably so that the upper limit value of the permission position offset of second direction y is the side of the second interval S2 and the second width W2 The Part III 13 of formula design identification label 10b and the shape of Part IV 14.
By checking first part 11 and second part 12 on x in a first direction, third portion is checked on second direction y Divide 13 and Part IV 14, can easily judge it is that the position offset that above-mentioned identification marks is in allowed band in a short time Interior qualified product or above-mentioned identification label are more than the rejected product of allowed band.
Fig. 7 indicates that the identification of the variation 2 of first embodiment of the invention marks 10c.Identification label 10c includes pros The Part V 15 of shape and the Part VI 16 for the L-shaped for being composed two rectangles.
Part V 15 is separated from each other the first interval S1 along first direction x and Part VI 16.Part VI is in first party There is width W1 on x.In addition, y and Part VI 16 are separated from each other the second interval S2 to Part V 15 in a second direction.6th Part has width W2 on second direction y.
In addition, constitute a rectangle of the L-shaped of Part VI 16 has the first width W1 on x in a first direction, For the rectangle that y in a second direction extends, another rectangle has the second width W2 on second direction y, for along first The rectangle that direction x extends.
The end of the shape 20 of the component 23 of position alignment is carried out Fig. 8 shows identification label 10c and using identification label 10c Configuration.The shape 20 of the component 23 of alignment have along first direction x extend while with y in a second direction extend while substantially just The end of friendship.
Here, making the L along the side that first direction x extends and Part VI 16 of the end of the shape 20 of the component 23 of alignment It is consistent with the opposite side of Part V in such a way that there is the second interval S2 in shape.Moreover, making y extension in a second direction It is consistent while with opposite with Part V in a manner of with the first interval S1 in the L-shaped of Part VI 16.It can will be with The state of aforesaid way configuration is defined as the datum mark that position offset in the first direction and a second direction is respectively zero.
The Part V 15 of this variation 2 and the identification for making variation 1 mark the respective first part 11 of 10a, 10b and the Three parts 13 are respectively equivalent in the structure that same position is overlapped configuration.In addition, the Part VI 16 of L-shaped with by making to identify The rectangle and make identification label 10b's that the second part 12 of label 10a keeps the first width W1 and y extends in a second direction It is equivalent that Part IV 14, which keeps the second width W2 and the structure made of the rectangle coincidence that first direction x extends,.
Fig. 9 is the electronics using the circuit substrate of the identification label for the variation 2 for being installed with first embodiment of the invention The top view of circuit module.Component 23 (such as connector) is equipped with by surface installation in circuit substrate 2, and on identical surface On, 30 surface of electronic component is installed on pad 31,32.On circuit substrate 2, it is overlapped with four angles with component 23 Mode marks 10c configured with four groups of identifications.
By visual observation or image procossing identifies the 5th marked to four angles in above-mentioned configuration, being configured at component 23 Whether the Part VI 16 of part 15 and L-shaped, which exposes, is detected.According to above-mentioned testing result, can while and promptly carry out Qualified judgement in terms of following two: whether by each position alignment of the connection terminal 21 of component 23 to can be with regulation First pad 17 of substrate is separately connected;And whether by each position alignment of the connection terminal 21 of component 23 to can will Four angles of component 23 are limited in the prescribed limit of circuit substrate 2.
Figure 10 is the top view for constituting the circuit substrate 2 of electronic circuit module 1 shown in Fig. 9.It is filled in foregoing circuit substrate 2 The identification of variation 2 equipped with first embodiment of the invention marks 10c.In addition, circuit substrate 2 further includes for installing component 23 mounting structure, mounting structure include the first pad 17 and the second pad 18, wherein above-mentioned first pad 17 and component 23 Connection terminal 21 each electrical connection, above-mentioned second pad 18 is connected to the fixing terminal 22 of component 23, to improve component 23 installation strength.
Above-mentioned mounting structure can also also have the weldering for installing top layer's wiring layer 33 and other electronic components 30 Disk 31,32.Can be constituted on layer identical with top layer's wiring layer 33 identification label 10c, the first pad 17, the second pad 18, Pad 31,32.In addition, identification label 10c can also be formed by through-hole when mounting structure is through-hole.
Then, the manufacturing method of circuit substrate 2 shown in Fig. 10 is illustrated.Above-mentioned manufacturing method includes prepared substrate Preparatory process.Aforesaid substrate may be the multi-layered wiring board for being formed with multilayer wiring layer.
Then, in mounting structure formation process, the mounting structure including the first pad 17 and the second pad 18 is formed In the surface of aforesaid substrate.Identification label 10c is formed by label formation process, but it is preferable that, label formation process is It is same will to identify that label 10c and mounting structure are formed in by identical manufacturing process for a part of mounting structure formation process Layer.
By using with include the identical manufacturing process of the mounting structure of the first pad 17 and the second pad 18 and mark identification Note 10c is formed in same layer, so as to accurately form identification label 10c and the first pad 17 and the second weldering according to design The mutual alignment relation of disk 18.
Therefore, if by the position alignment at four angles of circuit substrate 2 and identification label 10c, as a result, connection terminal 21 and fixing terminal 22 also become the state with 18 position alignment of the first pad 17 and the second pad respectively.
Above-mentioned mounting structure also may include the pad 31,32 and top layer's wiring installed to other electronic components Layer 33.In this case, other than identification label 10c, the first pad 17 and the second pad 18, pad 31,32 and most Upper layer wiring layer 33 also can be formed in same layer by identical manufacturing process.
In addition, label formation process also may include that the conductive layer for being used for top layer's wiring layer 33 is formed in leading for substrate Electric layer formation process.In addition it is also possible to include that pattern formation process makes above-mentioned conductive layer shape in above-mentioned pattern formation process At pattern, and it is formed simultaneously including pad 31,32, the installation of top layer's wiring layer 33, the first pad 17 and the second pad 18 Structure and identification label 10c.
Figure 12 is equipped with the top view of the circuit substrate of the identification label of second embodiment of the invention.In this embodiment party In formula, the identification detected to the positional shift of first direction x marks 10a and examines to the positional shift of second direction y The identification label 10b of survey is configured at different positions.
Identification label 10a component 23 shape, in a first direction in each on opposite each other two sides it is each Configuration one, identification label 10b component 23 shape, in a second direction in each on opposite each other two sides it is each Configuration one.

Claims (10)

1. a kind of circuit substrate, installs component, which is characterized in that
The circuit substrate includes mounting structure for installing the component and is configured at and the mounting structure same layer Identification label,
The identification label includes first part and second part, and the second part is along first direction and the first part The mode for separating the first interval configures, and has the first width in said first direction.
2. circuit substrate as described in claim 1, which is characterized in that
The first part and the second part are by with the side for being parallel to the second direction orthogonal with the first direction Quadrangle constitute.
3. circuit substrate as claimed in claim 2, which is characterized in that
The identification label also includes Part III, and the Part III is configured to and the second part interval;And Part IV, the Part IV are configured to separate the second interval along the second direction and the Part III, and described There is the second width in second direction,
The Part III and the Part IV are made of the quadrangle for including the side for being parallel to the first direction.
4. circuit substrate as claimed in claim 3, which is characterized in that
The first part and the Part III are configured to be overlapped at same position.
5. circuit substrate as described in claim 3 or 4, which is characterized in that
The second part is the rectangle for having first width and extending along the second direction,
The Part IV is the rectangle for having second width and extending along the first direction,
A part of the second part is overlapped with a part of the Part IV and forms L-shaped.
6. circuit substrate according to any one of claims 1 to 4, which is characterized in that
The mounting structure has top layer's wiring layer, and the identification label is formed in top layer's wiring layer.
7. circuit substrate as claimed in claim 6, which is characterized in that
Top layer's wiring layer includes the pad connecting with the connection terminal of the component.
8. circuit substrate according to any one of claims 1 to 4, which is characterized in that
The mounting structure includes through-hole, and the identification label is formed by the through-hole.
9. a kind of manufacturing method of circuit substrate is the manufacturing method for the circuit substrate installed to component, which is characterized in that Include:
Preparatory process, in the preparation process, prepared substrate;And
Mounting structure formation process will be used to install the mounting structure shape of the component in the mounting structure formation process Substrate described in Cheng Yu,
The mounting structure formation process includes being formed simultaneously a part of the mounting structure and identifying that the label of label is formed Process,
The identification label includes first part;And to separate the side at the first interval along first direction and the first part Formula configures and in said first direction with the second part of the first width, thus a part and institute to the mounting structure The position offset stated between component is detected.
10. the manufacturing method of circuit substrate as claimed in claim 9, which is characterized in that
The structure of a part of the mounting structure is top layer's wiring layer,
The label formation process further includes conductive layer formation process and pattern formation process, in the conductive layer formation process In, the conductive layer for being used for top layer's wiring layer is formed in the substrate, in the pattern formation process, by the conductive layer Pattern is formed, and is formed simultaneously top layer's wiring layer and identification label.
CN201910237201.6A 2018-03-28 2019-03-27 Circuit substrate and its manufacturing method Pending CN110324968A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018-062565 2018-03-28
JP2018062565A JP7101512B2 (en) 2018-03-28 2018-03-28 Circuit board and its manufacturing method

Publications (1)

Publication Number Publication Date
CN110324968A true CN110324968A (en) 2019-10-11

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ID=68112793

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Application Number Title Priority Date Filing Date
CN201910237201.6A Pending CN110324968A (en) 2018-03-28 2019-03-27 Circuit substrate and its manufacturing method

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Country Link
JP (1) JP7101512B2 (en)
CN (1) CN110324968A (en)
TW (1) TWI771567B (en)

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