CN103426867B - Conformal barrier enclosure module - Google Patents
Conformal barrier enclosure module Download PDFInfo
- Publication number
- CN103426867B CN103426867B CN201210161102.2A CN201210161102A CN103426867B CN 103426867 B CN103426867 B CN 103426867B CN 201210161102 A CN201210161102 A CN 201210161102A CN 103426867 B CN103426867 B CN 103426867B
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- CN
- China
- Prior art keywords
- adhesive body
- conformal barrier
- barrier enclosure
- enclosure module
- electronic component
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/20—Structure, shape, material or disposition of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The present invention relates to a kind of conformal barrier enclosure module, include a substrate, at least one electronic component being located at substrate and one covers the adhesive body of electronic component, the inside of adhesive body therein is formed there through a vertical channel, vertical channel extends to the inside of electronic component and vertical channel and is laid with a conductive structure from the surface of adhesive body, conductive structure is electrically connected with electronic component and forms a test contacts on the surface of adhesive body, thus, tester i.e. can pass through test contacts and electrically measures electronic component.
Description
Technical field
The present invention is relevant with conformal barrier enclosure module, and it is a kind of convenient to internal electronic element to particularly relate to
The conformal barrier enclosure module electrically measured.
Background technology
Please referring initially to shown in Fig. 1, a kind of existing conformal barrier enclosure module 1, it is mainly in envelope
Dress processing procedure forms an electromagnetism with metal sputtering, spraying or other plated film modes on the surface of adhesive body 2
Screen layer 3, in order to replace traditional crown cap used to reduce manufacturing cost.Tie at encapsulation procedure
After bundle, encapsulation module can electrically be measured, to confirm by tester by a test probe
Its function is the most normal.
But in traditional design, because whole electronic component 4 is all covered by adhesive body 2,
Detect individually so the electronic component 4 within adhesive body 2 cannot be pointed to, when tester examines
When measuring encapsulation module exception, tester's not way judges it is which electronics unit actually
Part 4 is out of joint, and in the case, tester have to destroy encapsulation module 1 to carry out breakage
Analyze, to judge problem place.Therefore, traditional conformal barrier enclosure module 1 is the most true
There is necessity of improvement in fact.
Summary of the invention
Present invention is primarily targeted at a kind of conformal barrier enclosure module of offer, it need not remove envelope
Internal electronic element can electrically be measured by colloid.
In order to reach above-mentioned purpose, the conformal barrier enclosure module of the present invention includes a substrate, at least
One electronic component, an adhesive body, and a conductive structure.The table of this substrate is located at by those electronic components
Face；This adhesive body is poured into the surface of this substrate and covers those electronic components in order to protect those electricity
The inside of sub-this adhesive body of element is formed there through a vertical channel, and this vertical channel is from the table of this adhesive body
Face extends to this electronic component；This conductive structure is laid in vertical channel and the electric connection of this adhesive body
Those electronic components also form a test contacts on the surface of this adhesive body so that tester can be square
Just through this test contacts, those electronic components are electrically measured.
In conformal barrier enclosure module provided by the present invention, the surface of this adhesive body can be laid with one
Electro-magnetic screen layer, in order to provide effectiveness, and, it is recessed that the surface of this adhesive body can have one
Groove, this groove connects this vertical channel, and the test contacts of this conductive structure is formed in this groove, uses
To avoid being formed short circuit between this electro-magnetic screen layer.
Accompanying drawing explanation
Fig. 1 is the generalized section of existing conformal barrier enclosure module.
Fig. 2 is the generalized section of the present invention the first preferred embodiment.
Fig. 3 is the generalized section of the present invention the second preferred embodiment, and the surface of display adhesive body is laid
There is electro-magnetic screen layer.
Fig. 4 is the generalized section of the present invention the 3rd preferred embodiment.
Fig. 5 is analogous to Fig. 4, and the surface of main display adhesive body is laid with electro-magnetic screen layer.
Fig. 6 is another generalized section of the present invention the 3rd preferred embodiment, and main display groove is not
Similar shape.
Fig. 7 is analogous to Fig. 6, and the surface of main display adhesive body is laid with screen layer.
Fig. 8 is the generalized section of the stack type encapsulation structure of the application present invention the 3rd preferred embodiment.
[main element symbol description]
" first and second embodiment "
10 conformal barrier enclosure module 12 substrates
121 substrate surface test point 14 electronic components
16 adhesive body 162 vertical channels
164 electro-magnetic screen layer 166 gaps
18 conductive structure 182 test contacts
" the 3rd embodiment "
20 conformal barrier enclosure module 26 adhesive bodies
262 vertical channel 264 electro-magnetic screen layers
266 groove 28 conductive structures
282 test contacts 30 devices
40 stack type encapsulation structures
Detailed description of the invention
In order to describe the structure of the present invention, feature and effect place in detail, hereby enumerate two preferred embodiments
And after coordinating following graphic explanation such as.
Refer to Fig. 2, the conformal barrier enclosure module 10 provided by the present invention the first preferred embodiment,
Include substrate 12, an at least electronic component 14, adhesive body 16, and at least one conduction knot
Structure 18, electronic component 14 therein is multiple with the quantity of conductive structure 18 in the present embodiment.
The structure of substrate 12 is identical with existing multilayer board, and substrate is located at by each electronic component 14
The surface of 12 and be electrically connected with substrate 12, and substrate 12 is in the face of the surface of adhesive body 16 also
At least one substrate surface test point 121 can be had additional.
Adhesive body 16 is poured into the surface of substrate 12 and is covered by such electronic component 14, in order to
Protected effect is provided.The quantity that the inside of adhesive body 16 to be tested according to such electronic component 14 is with thunder
The modes such as processing or chemical etching of penetrating run through a plurality of vertical channel 162, and each vertical channel 162 is self-styled
The surface of colloid 16 extends to electronic component 14 and the position of substrate surface test point 121 to be tested.
Conductive structure 18 is arranged in pairs or groups be provided with predetermined pattern with metal sputtering, spraying or other plated film mode
One shields (not shown) and is laid in each vertical channel 162 of adhesive body 16 so that conduction knot
Structure 18 is electrically connected with the electronic component 14 and substrate surface test point 121 to be tested with its one end, separately
One end forms a test contacts 182 on the surface of adhesive body 16, with for a test probe (in figure not
Show) touch.
Thus, as long as tester utilizes test when carrying out failure analysis, probe touches each test contacts
182, the electronic component 14 to be tested and substrate surface test point 121 can be carried out basic electrical
Measure, and measure while just can immediately know which electronic component 14 go wrong or
Judge substrate 12 whether normal operation itself, the most also avoid the need for again whole module first being removed envelope
Colloid 16 or destroy whole module and the problem that effectively solves traditional design.
Subsidiary one is mentioned that, aforementioned first embodiment is only the illustration of the present invention, the electronics unit to be tested
Part 14 may contain partial amt or total amount of electronic component 14, and substrate 12 can also
Being not provided with any substrate surface test point 121, those skilled in the art can optionally be adjusted.
Referring to Fig. 3 again and show the present invention the second preferred embodiment, also may be used in the surface of adhesive body 16
An electro-magnetic screen layer 164 is laid, in order to each electronics with metal sputtering, spraying or other plated film modes
Element 14 provides effectiveness, and conductive structure 18 is to utilize with this electro-magnetic screen layer 164
The collocation of same processing procedure is provided with a shielding (not shown) of predetermined pattern and is completed, but in order to avoid electricity
Short circuit is formed, between the two it is necessary to have gap 166 between magnetic masking layer 164 and each test contacts 182
Existence.
Referring again to Fig. 4 and Fig. 5, the conformal shielding envelope provided by the present invention the 3rd preferred embodiment
Die-filling group 20, its primary structure is that with the difference of above-described embodiment the surface of adhesive body 26 is corresponding
The position of each vertical channel 262 forms a groove 266 with rectangular cross section respectively, makes conductive structure
The top of 28 forms a test contacts 282 in each groove 266, by separating of each groove 266,
When an electro-magnetic screen layer 264 is laid in the position beyond each groove 266, the surface of adhesive body 26,
Formation short circuit can be prevented effectively between electro-magnetic screen layer 264 and test contacts 282.
Certainly, the section configuration of groove 266 is not limited to rectangle, also can be fabricated to ladder wide at the top and narrow at the bottom
Shape, as shown in FIG. 6 and 7, touches test contacts 282 in stretching into groove 266 in order to test probe.
Additionally, the conformal barrier enclosure module 20 of the present embodiment may utilize each test contacts
282 electrically connect with other semiconductor devices 30 being stacked in conformal barrier enclosure module 20 end face
Connect, and then form a stack type encapsulation structure 40, as shown in Figure 8.
In sum, the conformal barrier enclosure module of the present invention utilizes design and the conduction knot of vertical channel
The laying of structure, it is not necessary to remove adhesive body and just can quickly complete the electrical measurement of each electronic component, and
And can find the problem easily, effectively to promote the efficiency of encapsulation procedure.
Finally, it is necessary to again illustrate, the present invention takes off composed component disclosed in embodiment in front, only
For illustrating, not for limiting the scope of this case, the replacement of other equivalence elements or change, also
The claim that should be this case is contained.
Claims (8)
1. a conformal barrier enclosure module, it is characterised in that include:
One substrate；
The surface of this substrate is located at by least one electronic component；
One adhesive body, is poured into the surface of this substrate and covers this electronic component and run through in inside
At least one vertical channel, this vertical channel extends to this electronic component from the surface of this adhesive body；And
At least one conductive structure, is laid in the vertical channel of this adhesive body and is electrically connected with this electronic component
And form a test contacts on the surface of this adhesive body；
The surface of described adhesive body has a groove, and this groove connects this vertical channel；This conductive structure
This test contacts is formed in this groove.
Conformal barrier enclosure module the most as claimed in claim 1, it is characterised in that this adhesive body
Surface is laid with an electro-magnetic screen layer, has between this electro-magnetic screen layer and test contacts of this conductive structure
There is a gap.
Conformal barrier enclosure module the most as claimed in claim 1, it is characterised in that breaking of this groove
Face is shaped as rectangle.
Conformal barrier enclosure module the most as claimed in claim 1, it is characterised in that breaking of this groove
Face is shaped as wide at the top and narrow at the bottom trapezoidal.
Conformal barrier enclosure module the most as claimed in claim 1, it is characterised in that this adhesive body
Position beyond this groove, the surface is laid with an electro-magnetic screen layer.
6. the conformal barrier enclosure module as described in claim 2 or 5, it is characterised in that this conduction
Structure is to utilize the processing procedure identical with this electro-magnetic screen layer to be completed.
Conformal barrier enclosure module the most as claimed in claim 1, it is characterised in that this real estate pair
The surface of this adhesive body is provided with at least one substrate surface test point, the internal correspondence of this adhesive body run through to
A few vertical channel extends to this substrate surface test point from the surface of this adhesive body, and at least one leads
Electricity structure is located at the vertical channel of this adhesive body and is electrically connected with this substrate surface test point, and in this envelope
The surface of colloid forms a test contacts.
Conformal barrier enclosure module the most as claimed in claim 1, it is characterised in that also include one
Other semiconductor devices are stacked in the end face of this conformal barrier enclosure module, and utilize this test contacts with
Other semiconductor devices are electrically connected with and form a stack type encapsulation structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210161102.2A CN103426867B (en) | 2012-05-18 | 2012-05-18 | Conformal barrier enclosure module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210161102.2A CN103426867B (en) | 2012-05-18 | 2012-05-18 | Conformal barrier enclosure module |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103426867A CN103426867A (en) | 2013-12-04 |
| CN103426867B true CN103426867B (en) | 2016-08-17 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210161102.2A Active CN103426867B (en) | 2012-05-18 | 2012-05-18 | Conformal barrier enclosure module |
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| Country | Link |
|---|---|
| CN (1) | CN103426867B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114376719A (en) * | 2022-03-23 | 2022-04-22 | 杭州维纳安可医疗科技有限责任公司 | Pulse generation device, system and control method |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201123216Y (en) * | 2007-12-03 | 2008-09-24 | 环隆电气股份有限公司 | Electromagnetic shielding device |
| CN102237342A (en) * | 2010-05-05 | 2011-11-09 | 中兴通讯股份有限公司 | Wireless communication module product |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4793496B2 (en) * | 2009-04-06 | 2011-10-12 | 株式会社デンソー | Semiconductor device and manufacturing method thereof |
| US8569869B2 (en) * | 2010-03-23 | 2013-10-29 | Stats Chippac Ltd. | Integrated circuit packaging system with encapsulation and method of manufacture thereof |
-
2012
- 2012-05-18 CN CN201210161102.2A patent/CN103426867B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201123216Y (en) * | 2007-12-03 | 2008-09-24 | 环隆电气股份有限公司 | Electromagnetic shielding device |
| CN102237342A (en) * | 2010-05-05 | 2011-11-09 | 中兴通讯股份有限公司 | Wireless communication module product |
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| Publication number | Publication date |
|---|---|
| CN103426867A (en) | 2013-12-04 |
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