CN110264843A - A kind of adder experimental teaching unit - Google Patents

Abstract

The invention discloses a kind of adder experimental teaching units, including pedestal, panel and banana head connecting line；The panel is integrated with XOR gate logic unit, light emitting diode, NAND gate logic unit, adder unit, logic level unit and UPS unit.The device using flexible is easily achieved, and each functional unit can be connected into one-bit full addres by banana head connecting line by user, while can carry out functional test and demonstration to adder chip 74LS283；The device uses large-sized element and chip identification, has the function of good class demonstration, is the good experimental vehicle of classroom interactions, convenient for being promoted the use of on university researchers, use value with higher and wide application prospect.

Description

A kind of adder experimental teaching unit

Technical field

The present invention relates to electronic technology fields, and in particular to a kind of adder experimental teaching unit.

Background technique

" Fundamental Digital Electronic Technique " this subject is colleges and universities' Electronics Science and Technology, Electronics and Information Engineering and communication engineering etc. The profession basis of the non-electronics majors profession such as Electronics Specialties and Computer Science and Technology, Internet of Things engineering and physics must Class is repaired, is played an important role in entire System for Cultivating, is the design of following digital system, single-chip microcontroller, computer composition The study of the courses such as principle, IC design is laid a good foundation.Adder as typical combinational logic circuit, It is played an important role in " Fundamental Digital Electronic Technique " this subject.It is mainly wrapped about the knowledge point of adder and its circuit theory Include the design of discrete component adder and the use of adder chip 74LS283.Made by the study of the two Key Points The design method of students adder and the test and use of adder chip.This partial knowledge of adder grasp it is secured with The no study for directly influencing other subsequent combinational logic circuits.

Currently, the experiment condition of each colleges and universities' electric specialty is preferable, it is equipped with digital circuit specialized laboratory.But it is existing College Curricula System in, this subject is all made of the teaching tempo of " Theory Course+laboratory ", i.e., first carried out in multi-media classroom Then theory teaching carries out experimental teaching in specialized laboratory." Fundamental Digital Electronic Technique " is the very strong class of practicality Journey, if carrying out knowledge implantation simply in theory teaching, the learning effect of student can be very poor.If worn in teaching process Experimental demonstration is inserted, and there are problems.For example, experimental facilities in specialized laboratory or be the very big large size of occupied area Experiment porch or be more bulky experimental box.It is that can not be moved to common multimedia religion for large-scale experiment porch Demonstration of attending class is carried out in room.For experimental box, due to small volume, and there are many functional unit for including, this leads to element Density is very big, and LED, charactron, switch etc. use small size component.Two rows of students can see before being also only when experimental demonstration Clear, subsequent student is difficult to see experimentation and result.Meanwhile the power supply of experimental box is all made of 220V alternating current, it can Mobility is poor.In addition, the flip lid on experimental box can block if experimental box is just being carried out class demonstration facing towards student Raw sight, demonstration are got up very inconvenient.

For the non-electronics majors such as Computer Science and Technology, Internet of Things engineering and physics profession, situation is not allowed equally to find pleasure in It sees.The colleges and universities poor for some experiment conditions, since non-electrolyte water solution does not have the laboratory of profession, the experiment of this subject is past Related experiment teaching is completed toward emulating using computer based EDA.Such case is the most general for computer profession Time.The learning experience for eventually leading to student is poor, and teacher lacks intuitive in the explanation of knowledge point, and atmosphere of giving lessons is more dull.

Student is often to interactivity to be shown to the questionnaire survey of college student course learning according to authoritative institutions such as maxs The course of strong attend class mode and experimental demonstration class is most interested, and energy is concentrated the most when listening to the teacher.And those PPT are inculcated Formula teaching is often unable to pull oneself together.The problem of encountering during being given lessons according to " Fundamental Digital Electronic Technique " this subject, i.e., can not Adder circuit function presentation is easily carried out in Theory Course using hardware device, the present invention provides one kind to drill convenient for classroom The adder experimental teaching unit shown, for building discrete component adder and carrying out functional test to 74LS283 chip.The dress Set be both adder circuit experimental demonstration instruments used for education, while be also carry out classroom interactions good carrier, to classroom instruction Positive exemplary role is played, can be improved the Classroom attention and study initiative of student, there is good popularization and is made Use prospect.

Summary of the invention

Aiming at the problems existing in the prior art, classroom teaching quality is improved, the invention proposes a kind of experiments of adder Instructional device, the technical solution used in the present invention are as follows:

A kind of adder experimental teaching unit, including pedestal, panel and banana head connecting line；The panel is integrated with exclusive or Gate logic unit, light emitting diode, NAND gate logic unit, adder unit, logic level unit and UPS unit；

The XOR gate logic unit is made of 74LS86 chip, chip adapter panel and banana connector, 74LS86 chip It is fixed on panel by chip adapter panel, the power supply of 74LS86 chip and ground the port power output end with UPS unit respectively Mouth is connected with ground port, and " XOR logic " input and output side of 74LS86 chip is connected with banana connector；

The light emitting diode is made of light emitting diode, resistance and banana connector, the cathode of light emitting diode It is connected by resistance with the ground port of UPS unit, the anode of light emitting diode is connected with banana connector；

The NAND gate logic unit is made of CD4011 chip, chip adapter panel and banana connector, CD4011 chip It is fixed on panel by chip adapter panel, the power supply of CD4011 chip and ground the port power output end with UPS unit respectively Mouth is connected with ground port, and " NAND Logic " input and output side of CD4011 chip is connected with banana connector；

The adder unit is made of 74LS283 chip, locking bed and banana connector, and 74LS283 chip passes through lock Tight seat is fixed on panel；

The logic level unit is made of single-pole double-throw switch (SPDT), banana connector and exclusion, single-pole double-throw switch (SPDT) side Input terminal be connected with the ground port of UPS unit, the input terminal of other side passes through the output port of power source of exclusion and UPS unit It is connected, the intermediate output of single-pole double-throw switch (SPDT) is connected with banana connector；

The UPS unit is made of 5V power outlet, ups power module, lithium battery, power switch and banana connector, The anode and cathode of 5V power outlet are connected with the power input port of ups power module, the anode and cathode and UPS of lithium battery The battery port of power module is connected, and the output head anode of ups power module is connected by power switch with banana connector, is Entire experimental provision power supply, the negative pole of output end of ups power module is connected with banana connector, as connecing for entire experimental provision Ground terminal.

Preferably, the pedestal is the rectangular parallelepiped structure being made of single-layer acrylic plate, and the panel is single-layer acrylic Plate is simultaneously fixed on the pedestal by stock screw；The pedestal and panel are 60 centimetres long, 45 centimetres wide.

Preferably, the chip adapter panel is made of screw hole location, chip carrier socket, printed circuit cable and pad, the pad It is connected by conducting wire with the banana connector, the chip adapter panel is screwed on the panel.

Preferably, the diameter of the light emitting diode is 1 centimetre, and luminescent color is red.

Preferably, the lithium battery is 18650 lithium batteries.

Preferably, respectively there is a plug at the banana head connecting line both ends, and the plug is by plastic handle and metal lotus flower Head is constituted, and the diameter of the metal lotus flower head and the diameter of bore of the banana connector are 2 millimeters, the plastic handle The jack that top is 2 millimeters with internal diameter.

Compared with prior art, the invention has the following advantages:

1. the present invention can the adder chip to model 74LS283 test, while can also build be based on it is " different Or door " and non-conjunction one-bit full addres circuit, the substantially former of students adder is made by the demonstration of this experimental provision Reason, is familiar with the pin function of 74LS283 chip, grasps the design method of combinational logic circuit, has simple, understandable and versatility Strong feature.

2. functional unit of the invention is abundant, it is easy to accomplish, user can be by banana head connecting line by each functional unit Connection is to complete the test of adder chip and building for discrete component adder circuit, using flexible.

3. pedestal and panel of the invention is all made of acrylic board production, have weatherability and resistance to acid and alkali good, anti-impact The advantages such as power is strong, easy to clean and insulating properties is good are hit, and low cost, cost performance are high.

4. pedestal and a length of 60 centimetres of panel in the present invention, width is 45 centimetres, each unit is printed with phase on panel The large scale mark figure of chip or element is answered, the diameter of light emitting diode is 1 centimetre, and this unique large scale design makes this Invention has the function of good class demonstration, is the good experimental vehicle of classroom interactions, convenient to be promoted on university researchers It uses, there is wide use value and application prospect.

Detailed description of the invention

Fig. 1 is the schematic diagram of pedestal in the present invention；

Fig. 2 is the structure chart of panel in the present invention；

Fig. 3 is the circuit diagram of each unit on panel in the present invention；

Fig. 4 is chip adapter panel schematic diagram in the present invention；

Fig. 5 is the circuit diagram that one-bit full addres are built in the present invention；

Fig. 6 is the circuit diagram that 74LS283 chip is tested in the present invention.

Appended drawing reference: 101- XOR gate logic unit, 102- light emitting diode, 103- NAND gate logic unit, 104- adder unit, 105- logic level unit, 106-UPS unit, 201- chip adapter panel, 202- screw hole location, 203- Chip carrier socket, 204- printed circuit cable, 205- pad.

Specific embodiment

Technical solution of the present invention is understood for the ease of technical staff, now in conjunction with Figure of description to technical side of the invention Case is described further.

A kind of adder experimental teaching unit, including pedestal, panel and banana head connecting line.The structural representation of the pedestal Figure as shown in Figure 1, pedestal be by with a thickness of 3 millimeters acrylic board production " box-like " cuboid, it is wide the length is 60 centimetres Degree is 45 centimetres, is highly 5 centimetres.The structure chart of the panel is as shown in Fig. 2, and with the acrylic board with a thickness of 3 millimeters Production, respectively there is a screw hole location, and consistency from top to bottom on 4 angles of panel and pedestal, convenient for panel is passed through stock screw It is fixed on the base.One important function of pedestal is the electronic circuit cabling at the protection panels back side, another effect is just It exists side by side on dais in by the panel front of the experimental provision towards student, facilitates the connection and its state of observation of students circuit.

It is patrolled as shown in Fig. 2, the panel is integrated with XOR gate logic unit 101, light emitting diode 102, NAND gate Collect unit 103, adder unit 104, logic level unit 105 and UPS unit 106.

The XOR gate logic unit 101 is made of 74LS86 chip, chip adapter panel 201 and banana connector, 74LS86 chip is fixed on panel by chip adapter panel 201, the power port of 74LS86 chip and port respectively with UPS The output port of power source of unit 106 is connected with ground port and be chip power supply, " XOR logic " of 74LS86 chip input with it is defeated Outlet is connected with banana connector.74LS86 chip interior has four groups of independent two input terminals XOR gates, as the XOR gate of Fig. 2 is patrolled Shown in volume unit 101, banana connector A1 connects the input terminal of first group of XOR gate with B1, and first group of connection of banana connector Y1 The output end of XOR gate.And so on, two input terminals and an output end of excess-three group XOR gate are inserted with banana head respectively Seat " A2, B2, Y2 ", " A3, B3, Y3 " and " A4, B4, Y4 " connection.Circuit diagram corresponding to XOR gate logic unit 101 in Fig. 2 As shown in the sub-circuit figure in Fig. 3 marked as 101, which is to use Proteus Software on Drawing, and the software default chip is automatic Power supply and ground are connect, therefore 7 pins of the chip and 14 pins are ignored and (do not have the two pins in circuit diagram).Such as Fig. 3 mark Shown in sub-circuit figure number for 101,4 independent XOR gates use " U1:A "~" U1:D " to mark respectively, the input of 4 XOR gates, The pin designations of digital representation 74LS86 chip on output pin.

The main function of XOR gate logic unit 101 is to come together to build one-bit full addres with NAND gate logic unit 103, It is discussed in detail in specific embodiment below.

As shown in figure 4, there is screw hole location 202 (to be distributed in 4 angles of chip adapter panel 201 on the chip adapter panel 201 On), chip carrier socket 203, printed circuit cable 204 and pad 205.The effect of chip adapter panel 201 is fixed integrated logic gate chip, Good electrical communication is constituted between each pad and chip pin, it is convenient to be connected with corresponding banana connector.In this implementation In example, specifically by taking XOR gate logic unit 101 as an example, opened in the XOR gate logic unit 101 of panel front two rows of 14 total The circular hole that diameter is 1 millimeter, the centre distance of the two neighboring circular hole of horizontal direction are 2.5 millimeters, vertically adjacent two circles 30 millimeters of the centre distance in hole；By 74LS86 chip be inserted into chip carrier socket 203 (as shown in figure 4, pay attention to the notch of chip towards a left side, According to direction from left to right, the 1st pad is connected a row with 1 pin of chip below at this time, and the 2 of the 2nd pad and chip Pin is connected, and so on to the 7th pad；That pad right above 7th pad is the 8th pad, and direction is pressed at this time According to from right to left, being successively the 9th pad, until the 14th pad in the upper left corner)；First, lower left corner hole location is selected, will be led Line passes through the 1st pad in 201 lower left corner of acrylic panel and chip adapter panel from back side of panel, and conducting wire is welded on the pad On, according to the sub-circuit figure in Fig. 3 marked as 101, the other end of conducting wire is welded on banana connector " A1 ", and so on, Other than the 7th and the 14th pad, remaining pad is each welded in corresponding banana connector.7 pins of 74LS86 chip It is ground terminal, therefore the conducting wire of the 7th pad is welded on the grounding ports of UPS unit 106 on the back of the panel.Similarly, the core 14 pins of piece are power end, therefore the conducting wire of the 14th pad is welded on the power output end of UPS unit 106 on the back of the panel Mouthful.After all conducting wire welding, chip adapter panel is fixed on to the XOR gate logic unit 101 of panel front with 4 screws Shown region.

The red light emitting diodes and banana connector structure that the light emitting diode 102 is 1 centimetre by 8 diameters At as shown in Figure 2.The purpose of selection major diameter light emitting diode is easy for experimental demonstration, facilitates observation of students.Light emitting diode It is the corresponding region that the LED seat for being 1 centimetre by diameter of bore is fixed on panel, LED seat is commercially available on the market. In mounted LED lamp seat, the actual size according to lamp holder overall diameter is needed, aperture is carried out in panel corresponding region, then LED Lamp holder insertion panel is simultaneously fixed by nut on the back of the panel.In the present embodiment, used lamp holder overall diameter is 1.35 centimetre.The adjacent center spacing of 8 lamp holders is appropriate, facilitates aperture, in the present embodiment, adjacent lamp holder center spacing is 3.5 centimetre.5 centimeters open the circular hole that a diameter is 4 millimeters immediately below each lamp holder, for installing banana connector. Next red light emitting diodes are put into lamp holder, it is 10K that the cathode of light emitting diode, which is passed through resistance value, at the back side of panel The resistance of Ω be connected with the ground port of UPS unit 106 (particular by conducting wire fly line weld complete), light-emitting diodes tube anode with Banana connector is connected.As shown in the light emitting diode 102 in Fig. 2, it is 1 li that " LED1 "~" LED8 ", which represents 8 diameters, The red light emitting diodes of rice, the anode of this 8 light emitting diodes are connected with banana connector " L1 "~" L8 " respectively, specific electricity Road is as shown in the sub-circuit figure in Fig. 3 marked as 102, and in the circuit diagram, element numbers " D1 "~" D8 " respectively represents front 8 light emitting diodes.

The major function of light emitting diode 102 is the height for showing summation output end level.In order to verify Whether the light emitting diode of installation succeeds, and a plug of banana head connecting line can be inserted into Fig. 2 in UPS unit 106 Power port, i.e., insertion labeled as " V1 " banana connector in, another plug of banana head connecting line is sequentially inserted into In light emitting diode 102 marked as " L1 ", " L2 " ..., the banana connector of " L8 ", press power switch, observation is corresponding Light emitting diode whether be lit, it is whether problematic come the installation process for verifying light emitting diode with this.

The NAND gate logic unit 103 is made of CD4011 chip, chip adapter panel 201 and banana connector, CD4011 chip is fixed on panel by chip adapter panel 201, the power port of CD4011 chip and port respectively with UPS The output port of power source of unit 106 is connected with ground port and be chip power supply, " NAND Logic " of CD4011 chip input with it is defeated Outlet is connected with banana connector.CD4011 chip interior has four groups of independent two input terminals NAND gates, as the NAND gate of Fig. 2 is patrolled Shown in volume unit 104, banana connector A1 connects the input terminal of first group of NAND gate with B1, and first group of connection of banana connector Y1 The output end of NAND gate.And so on, two input terminals and an output end of excess-three group NAND gate are inserted with banana head respectively Seat " A2, B2, Y2 ", " A3, B3, Y3 " and " A4, B4, Y4 " connection.Circuit diagram corresponding to NAND gate logic unit 103 in Fig. 2 As shown in the sub-circuit figure in Fig. 3 marked as 103, which is to use Proteus Software on Drawing, and the software default chip is automatic Power supply and ground are connect, therefore 7 pins of the chip and 14 pins are ignored and (do not have the two pins in circuit diagram).Such as Fig. 3 mark Shown in sub-circuit figure number for 103,4 independent NAND gates use " U1:A "~" U1:D " to mark respectively, the input of 4 NAND gates, The pin designations of digital representation CD4011 chip on output pin.Chip adapter panel 201 is used in NAND gate logic unit 103 The implementation steps of fixed CD4011 chip are similar with the fixed implementation steps of 74LS86 chip of front XOR gate logic unit 101, Which is not described herein again.

The main function of NAND gate logic unit 103 is to come together to build one-bit full addres with XOR gate logic unit 101, It is discussed in detail in specific embodiment below.

The adder unit 104 is made of 74LS283 chip, locking bed and banana connector, and 74LS283 chip passes through Locking bed is fixed on 104 region of adder unit on panel.In the present embodiment, using the expanded letter of 16 pins of dual-in-line Locking bed, leg diameter are 0.8 millimeter, and length is 1 centimetre, which can buy on the market.In panel front plus Two rows of total 16 diameters are opened for 1 millimeter of circular hole, in the two neighboring circular hole of horizontal direction in the corresponding position of multiplier unit 104 Heart distance is 2.5 millimeters, and the centre distance of vertically adjacent two circular holes is 10 millimeters.101 are coated in the bottom of locking bed Glue, and locking bed is inserted into mentioned-above two rows of circular holes, locking bed and panel are fixed together by 101 glue. 16 pins of locking bed are connected with corresponding banana connector using the form of fly line at the back side of panel, physical circuit is such as Shown in sub-circuit figure in Fig. 3 marked as 104, marked as " 1 " on the pin and panel of first, locking bed lower left corner hole location Banana connector is connected, and the pin of second hole location in the lower left corner is connected with the banana connector on panel marked as " 2 ", with such It pushes away, according to counterclockwise, marked as the banana connector of " 16 " on the pin and panel of first, locking bed upper left corner hole location It is connected.Physical circuit is as shown in the sub-circuit figure in Fig. 3 marked as 104, and in the figure, " CHIP LOCK ", which is represented, has 16 The locking bed of pin, this 16 pins respectively with marked as " 1 ", " 2 " ..., the terminal of " 16 " is connected, and (these terminals represent addition Banana connector corresponding to device unit 104).74LS283 chip, which is inserted into locking bed just, to be realized chip pin and adds The electrical connection of corresponding banana connector on multiplier unit 104.

As shown in Fig. 2, having printed the 74LS283 chip signal of enlarged version in the middle position in 104 region of adder unit Figure and pin identify text, chipWithPin is addend input port, with letter " A1 ", " A2 ", " A3 " and " A4 " is identified.ChipWithPin is summand input terminal Mouthful, it is identified with alphabetical " B1 ", " B2 ", " B3 " and " B4 ".ChipWithPin is to ask And output port, it is identified with alphabetical " S1 ", " S2 ", " S3 " and " S4 ".ChipPin is carry input mouth,Pin is carry-out port, is indicated respectively with " CI " and " CO ".ChipPin is grounding ports, uses word Female " GND " is identified；ChipPin is power port, is identified with alphabetical " VCC ".Said chip pin mark and The banana connector in 104 region of panel levels device unit is one-to-one relationship, i.e.,With the banana marked as " 1 " Connector is corresponding,It is corresponding with the banana connector marked as " 2 " ...,With the banana connector marked as " 16 " It is corresponding, it is convenient for circuit connection in this way.The mode that UV printing can be used in said chip schematic diagram and pin mark is printed on On acrylic board (commission correlation UV printing businessman customization).By above-mentioned design, make the function of each pin of 74LS283 chip clear It is clear as it can be seen that facilitating teaching demonstration.

The main function of adder unit 104 is test 74LS283 chip, and student is made to be familiar with its peripheral pin function.

The logic level unit 105 is made of single-pole double-throw switch (SPDT), banana connector and two 5Pin exclusions.In this reality It applies in example, single-pole double-throw switch (SPDT) uses the toggle switch of model MTS102, and model switch can be bought on the market.Using The main reason for toggle switch is that it has nut above, convenient for being fixed on panel.Such as 105 institute of logic level unit in Fig. 2 Show, " SW1 "~" SW8 " represents 8 single-pole double-throw switch (SPDT)s.A row total 8 is opened in 105 region of logic level unit of panel front The circular hole that a diameter is 7 millimeters, the centre distance of the two neighboring circular hole of horizontal direction are 4 centimetres.Select a hole of the leftmost side Position, the handle of single-pole double-throw switch (SPDT) (toggle switch) is inserted in the hole from the back side of panel, will be switched in panel front nut It is fixed on panel.Physical circuit is as shown in the sub-circuit figure in Fig. 3 marked as 105, and wherein the resistance value of exclusion RP1 is 5.1K Ω.At the back side of panel, the input terminal of single-pole double-throw switch (SPDT) side is connected with the ground port of UPS unit 106, by single-pole double throw The input terminal of switch other side is connected with 2 pins of exclusion, and the common end (1 pin) of exclusion is defeated with the power supply of UPS unit 106 Exit port is connected, and the intermediate output of single-pole double-throw switch (SPDT) is connected with banana connector " O1 ".Using same method, by remaining 7 single-pole double-throw switch (SPDT) SW2~SW8 successively with exclusion, UPS unit 106 and corresponding banana connector be connected.

105 output end of logic level unit provides high level or low level for circuit, such as the son in Fig. 3 marked as 105 Shown in circuit diagram, when single-pole double-throw switch (SPDT) SW1 is allocated to upper end, output end is connected by exclusion with power supply, i.e., banana head is inserted at this time Seat O1 exports high level；When single-pole double-throw switch (SPDT) SW1 is allocated to lower end, output end is directly connected to the ground, i.e. banana connector at this time O1 exports low level.The level height of banana connector O1 output can also be verified by light emitting diode 102, specifically Ground, using banana head connecting line, the banana connector O1 of logic level unit 105, other end insertion luminous two are inserted into one end The banana connector L1 of pole pipe unit 102, observes whether Light-emitting diode LED 1 is lighted by stirring single-pole double-throw switch (SPDT), such as Fruit dot is bright, then illustrates the banana connector O1 output high level of logic level unit 105, otherwise export low level.It is verifying The logic function of 74LS283 chip and when building discrete component one-bit full addres, needs using logic level unit 105, tool Body can be found in the specific embodiment described below.

The UPS unit 106 is inserted by 5V power outlet, ups power module, 18650 lithium batteries, power switch and banana head Seat is constituted, and specific layout is as shown in the UPS unit 106 in Fig. 2.In the present embodiment, 5V power outlet be using with nut, The fine copper socket of model QZ7034-M9-2.1, opening diameter are 9 millimeters.Ups power module is having a size of 3.5 cm x 1.5 centimetres of micro-circuit board has 6 ports on the circuit board, right specifically as shown in the sub-circuit figure in Fig. 3 marked as 106 Answering device name is " UPS ", wherein be power input marked as " 1 " and " 2 " two ports, with the positive of 5V power outlet and Cathode is connected；The anode of 5V power outlet is connected with " 1 " port, and cathode is connected with " 2 " port；Marked as " 3 " and " 4 " two Port is cell input terminal, is connected respectively with the anode and cathode of 18650 lithium batteries；It is electricity marked as " 5 " and " 6 " two ports Source output terminal mouth, " 5 " port are the ground terminal of entire circuit system, the 5V voltage of " 6 " port outputting standard, maximum output current 1A, " 6 " port is connected by power switch with banana connector simultaneously, is powered for whole device.All devices of UPS unit 106 Part can be bought on the market, wherein 18650 lithium batteries are the battery cases by bottom with screw hole position to be fixed on face The front of plate.

There are two the major functions of UPS unit 106, one is (can be turned by USB in the case where there is external power supply input Wiring is electrically accessed computer or mobile power source in 5V power outlet), on the one hand which can be UPS unit 106 In 18650 lithium batteries charging, while also for entire experimental provision power.The second is UPS module is certainly when not having external power supply It is dynamic that the voltage of 18650 lithium batteries is converted into standard 5V voltage output and is powered for entire experimental provision.UPS unit 106 in this way For entire experimental provision provide uninterruptible power supply supply, have the advantages that it is flexible and convenient, be convenient in the case of no power supply into Row experimental implementation.

Next it introduces based on two embodiments of the invention, i.e. one-bit full addres circuit is built and 74LS283 chip Functional test.

Circuit according to Fig.5, in combination with the sub-circuit figure in Fig. 3 marked as 101,102,103,105 and 106, The specific experiment of one-bit full addres circuit is built on panel shown in Fig. 2, and steps are as follows:

Step 1, in conjunction with the sub-circuit figure in Fig. 5 and Fig. 3 marked as 101,103 and 105, on panel shown in Fig. 2, make With banana head connecting line by the banana head of banana connector " O1 " and XOR gate logic unit 101 in logic level unit 105 Socket " A2 " (carry input mouth of the port as full adder) is connected, i.e. the logic level of port " O1 " is linked into 74LS86 4 pins of chip；Using banana head connecting line by logic level unit 105 banana connector " O2 " and exclusive or gate logic list The banana connector " B1 " of member 101 is connected, i.e. the logic level of port " O2 " is linked into 2 pins of 74LS86 chip；Use perfume (or spice) Any of several broadleaf plants head connecting line is by the banana connector of banana connector " O3 " and XOR gate logic unit 101 in logic level unit 105 The banana connector " B1 " of " A1 " and NAND gate logic unit 103 is connected, i.e. the logic level of port " O3 " is linked into 1 pin of 74LS86 chip and 2 pins of CD4011 chip.

Step 2, in conjunction with the sub-circuit figure in Fig. 5 and Fig. 3 marked as 101 and 102, on panel shown in Fig. 2, perfume (or spice) is used The banana connector " Y1 " of XOR gate logic unit 101 is connected by any of several broadleaf plants head connecting line with " B2 ", i.e., first in 74LS86 chip The level of the output end (3 pin) of XOR gate is linked into the input terminal (5 pin) of second XOR gate in the chip.Use banana Head connecting line is by the banana connector in the banana connector " Y2 " and light emitting diode 102 of XOR gate logic unit 101 " L1 " is connected, i.e., the level of second exclusive or gate output terminal (6 pin) is linked into the sun of light emitting diode D1 in 74LS86 chip Pole, for testing the height of output level, instruction of the light emitting diode as carry-out level signal, i.e. D1 is lit Bright carry-out is high level, and otherwise carry-out is low level.

Step 3, in conjunction with the sub-circuit figure in Fig. 5 and Fig. 3 marked as 101,102,103 and 105, logic in step 1 Banana connector " O1 " in level-cell 105 is connected with the banana connector " A2 " of XOR gate logic unit 101, while banana Connector " O1 " will also be connected with the banana connector " A2 " of NAND gate logic unit 103, in NAND gate logic unit 103 The level of output end (4 pin) signal of second NAND gate of CD4011 chip is linked into the input terminal (8 of third NAND gate Pin), the logic level input of another input terminal (9 pin) of third NAND gate is derived from the first of CD4011 chip The output end (3 pin) of a NAND gate, the output end (10 pin) and the perfume (or spice) in light emitting diode 102 of third NAND gate Any of several broadleaf plants connector " L2 " is connected, i.e., the level of third NAND gate output end (10 pin) is linked into light-emitting diodes in CD4011 chip The anode of pipe D2, for testing the height of output level, instruction of the light emitting diode as summation outputs level signals.

In above-mentioned steps, it is related to the situation that level signal all the way needs to be linked into multiple input ports, such as logic electricity The output level of banana connector " O1 " in flat unit 105 needs to be linked into 4 pins and CD4011 chip of 74LS86 chip 5 pins.The jack for being 2 millimeters with internal diameter at the top of the plastic handle for the banana head connecting line that can be used connects banana head Wiring is inserted into the jack to realize cascade.

Three above step completes the one-bit full addres circuit based on 74LS86 chip and CD4011 chip and builds.It presses Power switch stirs single-pole double-throw switch (SPDT) SW1~SW3 in logic level unit 105, then observes light emitting diode The state of LED1 and LED2 in 102 realizes one-bit full addres logic function with this.

Next circuit according to Fig.6, in combination with the sub-circuit figure in Fig. 3 marked as 102,104,105 and 106, The specific experiment of 74LS283 chip logic functional test circuit is built on panel shown in Fig. 2, and steps are as follows:

Step 1, in conjunction with the sub-circuit figure in Fig. 6 and Fig. 3 marked as 104 and 105, on panel shown in Fig. 2, by logic 8 road output level ends in level-cell 105 are linked into the summation input terminal of 74LS283 as addend and summand signal level Mouthful.Specifically, using banana head connecting line by banana connector " O1 "~" O4 " in logic level unit 105 respectively with addition Banana connector in device unit 104 marked as " 6 ", " 3 ", " 14 ", " 12 " is connected, i.e., by the logic electricity of the port " O1 "~" O4 " It is flat to be linked into 74LS283 chip addend input port.

Step 2, in conjunction with the sub-circuit figure in Fig. 6 and Fig. 3 marked as 104 and 105, on panel shown in Fig. 2, perfume (or spice) is used Any of several broadleaf plants head connecting line by banana connector " O5 "~" O8 " in logic level unit 105 respectively with label in adder unit 104 It is connected for the banana connector of " 5 ", " 2 ", " 15 ", " 11 ", i.e., the logic level of the port " O5 "~" O8 " is linked into 74LS283 The summand input terminal of chip.

Step 3, in conjunction with the sub-circuit figure in Fig. 6 and Fig. 3 marked as 102 and 104, on panel shown in Fig. 2, with shining Diode (LED) shows summed result.Using banana head connecting line by adder unit 104 marked as " 4 ", " 1 ", " 13 " and The banana connector of " 10 " respectively with banana connector " L1 ", " L2 ", " L3 " and " L4 " phase in light emitting diode 102 Even, i.e. the level of 74LS283 chip summation output end (4,1,13 and 10 pin) is respectively connected to light emitting diode D1, D2, D3 With the anode of D4, for showing summed result.

Step 4, in conjunction with the sub-circuit figure in Fig. 6 and Fig. 3 marked as 104 and 106, on panel shown in Fig. 2, perfume (or spice) is used Any of several broadleaf plants head connecting line by adder unit 104 marked as the banana connector of " 8 " and " 16 " respectively and in UPS unit 106 " G1 " is connected with the port " V1 ", as 74LS283 power supply, and 8 of the grounding ports access 74LS283 in UPS unit 106 are drawn Foot, by 16 pins of the power port access 74LS283 in UPS unit 106.

Step 5, using banana head connecting line by adder unit 104 marked as " 7 " banana connector and UPS unit The port " G1 " in 106 is connected, i.e., carry input mouth level is zero, if the port is hanging, default input is high level, because , in carry of no low level to a high position, which must be grounded for this.Adder unit 104 is got the bid using banana head connecting line Number it is connected for the banana connector of " 9 " with port banana connector " L5 " in light emitting diode 102, i.e. light emitting diode Instruction of the D5 as carry-out level signal, i.e. D5, which is lit, illustrates that carry-out is high level, and otherwise carry-out is low Level.

Circuit of 74LS283 chip test circuit shown in Fig. 6 on panel of the present invention is completed by above step to build. The switch connection power supply for pressing UPS unit 106 stirs single-pole double-throw switch (SPDT) SW1~SW8 in logic level unit 105 to connect Enter different level, observe the state of LED1~LED5 in light emitting diode 102 on panel, is realized pair with this The test and validation of 74LS283 chip addition function.

It should be noted that above-described embodiment can be freely combined as needed.The above is only of the invention preferred Embodiment, it is noted that for those skilled in the art, in the premise for not departing from the principle of the invention Under, several improvements and modifications can also be made, these modifications and embellishments should also be considered as the scope of protection of the present invention.

Claims (6)

1. a kind of adder experimental teaching unit, including pedestal, panel and banana head connecting line, it is characterised in that: the panel Be integrated with XOR gate logic unit, light emitting diode, NAND gate logic unit, adder unit, logic level unit and UPS unit；

The XOR gate logic unit is made of 74LS86 chip, chip adapter panel and banana connector, and 74LS86 chip passes through Chip adapter panel is fixed on the panel, the power supply of 74LS86 chip and the port power output end with UPS unit respectively Mouth is connected with ground port, and " XOR logic " input and output side of 74LS86 chip is connected with banana connector；

The light emitting diode is made of light emitting diode, resistance and banana connector, and the cathode of light emitting diode passes through Resistance is connected with the ground port of UPS unit, and the anode of light emitting diode is connected with banana connector；

The NAND gate logic unit is made of CD4011 chip, chip adapter panel and banana connector, and CD4011 chip passes through Chip adapter panel is fixed on panel, the power supply of CD4011 chip and ground port respectively with the output port of power source of UPS unit and Ground port is connected, and " NAND Logic " input and output side of CD4011 chip is connected with banana connector；

The adder unit is made of 74LS283 chip, locking bed and banana connector, and 74LS283 chip passes through locking bed It is fixed on panel；

The logic level unit is made of single-pole double-throw switch (SPDT), banana connector and exclusion, single-pole double-throw switch (SPDT) side it is defeated Enter end to be connected with the ground port of UPS unit, the input terminal of other side passes through the output port of power source phase of exclusion and UPS unit Even, the intermediate output of single-pole double-throw switch (SPDT) is connected with banana connector；

The UPS unit is made of 5V power outlet, ups power module, lithium battery, power switch and banana connector, 5V electricity The anode and cathode of supply socket are connected with the power input port of ups power module, the anode and cathode and ups power of lithium battery The battery port of module is connected, and it is entire that the output head anode of ups power module, which is connected by power switch with banana connector, Experimental provision power supply, the negative pole of output end of ups power module are connected with banana connector, the ground connection as entire experimental provision End.

2. adder experimental teaching unit according to claim 1, which is characterized in that the pedestal is by single-layer acrylic The rectangular parallelepiped structure that plate is constituted, the panel are single-layer acrylic plate and are fixed on the pedestal by stock screw；It is described Pedestal and panel are 60 centimetres long, 45 centimetres wide.

3. adder experimental teaching unit according to claim 1, which is characterized in that the chip adapter panel is by screw hole Position, chip carrier socket, printed circuit cable and pad are constituted, and the pad is connected by conducting wire with the banana connector, the chip Pinboard is screwed on the panel.

4. adder experimental teaching unit according to claim 1, which is characterized in that the diameter of the light emitting diode is 1 centimetre, luminescent color is red.

5. adder experimental teaching unit according to claim 1, which is characterized in that the lithium battery is 18650 lithiums electricity Pond.

6. adder experimental teaching unit according to claim 1, which is characterized in that the banana head connecting line both ends are each There is a plug, the plug is made of plastic handle and metal lotus flower head, the diameter and the banana of the metal lotus flower head The diameter of bore of connector is 2 millimeters, the jack that the top of the plastic handle is 2 millimeters with internal diameter.