CN110262589B - TEC temperature control driving circuit and control strategy thereof - Google Patents
TEC temperature control driving circuit and control strategy thereof Download PDFInfo
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- G05D23/19—Control of temperature characterised by the use of electric means
- G05D23/20—Control of temperature characterised by the use of electric means with sensing elements having variation of electric or magnetic properties with change of temperature
- G05D23/24—Control of temperature characterised by the use of electric means with sensing elements having variation of electric or magnetic properties with change of temperature the sensing element having a resistance varying with temperature, e.g. a thermistor
Abstract
The invention discloses a TEC temperature control drive circuit, which is characterized by comprising a linear voltage regulator LDO, a current absorption circuit and a switch power supply SW circuit: the output end of the LDO is connected with the LDO end of the TEC to provide input voltage V-LDO; the output end of the switch power supply SW circuit is connected with the SW end of the TEC to provide input voltage V-SW; the current sink circuit: when the V-LDO is larger than the V-SW, the circuit is opened, and current flows into the TEC from the linear voltage regulator LDO; when V-LDO is less than V-SW, current flows out from TEC to the current absorption circuit. The invention designs a new LDO + SW type topological circuit structure, and combines the advantages of small LDO ripple and high SW efficiency. The LDO end is additionally provided with the current absorption circuit, so that the LDO end can output current and absorb current, and the TEC is driven to heat or refrigerate by using the same circuit.
Description
Technical Field
The invention belongs to the field of drive circuits, and particularly relates to a TEC temperature control drive circuit and a control strategy thereof.
Background
A TEC, i.e. a thermoelectric cooler, is an electronic component based on semiconductor material, as shown in fig. 1. By applying a low dc voltage across the thermoelectric cooler, heat flows from one end of the element to the other. At this time, the temperature of one end of the refrigerator is lowered while the temperature of the other end is simultaneously raised. It is noted that the direction of heat flow can be changed to deliver heat to the other end as long as the direction of current flow is changed. Therefore, two functions of cooling and heating can be simultaneously realized on one thermoelectric refrigerator. Thermoelectric refrigerators are commonly used in temperature control circuits, and different driving circuits and control strategies play a crucial role in temperature control effect.
The TEC can be directly powered by a direct current power supply during working, and the applicable voltage range is wide. The thermoelectric refrigerator is a low-impedance semiconductor device, which is equivalent to a resistor loaded on a power supply, and the resistance value has a certain temperature coefficient. If for simple temperature control purposes a standard thermostat or a variable output dc power supply can be used to adjust the input voltage to the thermoelectric device. Under the application condition of stable heat load, the manually regulated DC power supply can ensure that the temperature fluctuation does not exceed +/-1 ℃ within a range of several hours or longer. If the temperature needs to be accurately controlled, a closed-loop control system is generally used to automatically control the magnitude or frequency of the input current, and at this time, the accuracy of the temperature control can be kept within +/-0.1 ℃ or higher.
At present, a relatively common TEC driving circuit is an H-bridge driving circuit, as shown in fig. 2, PWM is used to control switches of four MOS transistors (Q1-Q4), and different voltages are formed at two ends of the TEC, so that TEC driving is realized, and switching of current directions can be realized by controlling the voltage at two ends of the TEC. The H-bridge driving circuit adopts a symmetrical structure, each half bridge can be regarded as a DC-DC power supply module, and the output voltage value of the H-bridge driving circuit is determined by the power supply voltage and the PWM duty ratio together.
The TEC drive circuit is improved by Chinese multiple patent applications:
CN106787735A this patent application is based on an improvement of an H-bridge driver circuit. CN102494433A this patent application utilizes DC-DC power supply chip to indirectly realize H-bridge control, and essentially still belongs to H-bridge control circuit. The H-bridge drive circuit has the following problems: 1. the used inductor has large volume, more devices and large occupied circuit area. 2. The H-bridge driving circuit is controlled by PWM, the output voltage ripple is large, the output precision is limited by PWM, and the temperature control effect with higher precision (<0.01 ℃) is not facilitated.
CN203422694U this patent application uses a single DC-DC to realize TEC driving, which can only heat or cool. CN102519167A this patent application uses a linear voltage regulation module to realize TEC driving, which can only heat or cool.
Disclosure of Invention
The invention provides a TEC temperature control drive circuit aiming at the problems in the background technology.
The technical scheme is as follows:
the invention firstly discloses a TEC temperature control drive circuit, which comprises a linear voltage regulator LDO, a current absorption circuit and a switch power supply SW circuit:
-the output terminal of the linear regulator LDO is connected to the LDO terminal of the TEC to provide the input voltage V-LDO;
-the output terminal of the switching power supply SW circuit is connected to the SW terminal of the TEC to provide the input voltage V-SW;
-the current sinking circuit is connected at the LDO side of the TEC: when the V-LDO is larger than the V-SW, the circuit is opened, and current flows into the TEC from the linear voltage regulator LDO; when V-LDO is less than V-SW, current flows out from TEC to the current absorption circuit.
The current absorption circuit comprises a second NMOS tube Q2 and a second operational amplifier U3, wherein the inverting input end of the second operational amplifier U3 is connected with an input voltage, the non-inverting input end of the second operational amplifier U3 is connected with a fixed voltage input, the output end of the second operational amplifier U3 is connected with the gate electrode of the second NMOS tube, the source electrode of the second NMOS tube Q2 is connected with the LDO end of the TEC, and the drain electrode of the second NMOS tube Q2 is grounded.
Preferably, the input terminal of the linear regulator LDO is connected to the input terminal of the current sinking circuit, and both receive the input signal of the same control voltage Vctr.
Preferably, the control voltage Vctr at the input ends of the linear regulator LDO and the current absorption circuit and the PWM signal at the input end of the switching power supply SW circuit are both generated by the main control chip SoC.
Preferably, the control voltage Vctr is connected to the input terminals of the linear regulator LDO and the current sinking circuit after passing through the low-pass filter circuit.
As a first circuit structure of the switch power supply SW circuit, the switch power supply SW circuit is a special switch power supply controller chip, an input end of the switch power supply controller chip receives a PWM signal, and an output end of the switch power supply controller chip is connected with a SW end of the TEC through an energy storage element to provide input voltage V-SW for the TEC.
The switching power supply SW circuit is a MOS tube driver + MOS tube structure, the input end of the MOS tube driver receives PWM signals, the output end of the MOS tube driver is respectively connected with the gate electrode of a third PMOS tube Q3 and the gate electrode of a fourth NMOS tube Q4, the source electrode of the third PMOS tube Q3 is connected with power supply voltage PVcc, the source electrode of the fourth NMOS tube Q4 is grounded, the drain electrode of the third PMOS tube Q3 and the drain electrode of the fourth NMOS tube Q4 are connected as output ends, and are connected with the SW end of the TEC after passing through an energy storage element to provide input voltage V-SW for the TEC.
Preferably, the third PMOS transistor Q3 and the fourth NMOS transistor Q4 are a group of MOS transistors, and the plurality of groups of MOS transistors are connected in parallel.
Preferably, the linear regulator LDO comprises a first operational amplifier U2 and a first PMOS transistor Q1, the control voltage Vctr is inputted as a reference voltage to the inverting input terminal of the first operational amplifier U2, the output terminal of the first operational amplifier U2 is connected to the gate of the first PMOS transistor Q1, the source of the first PMOS transistor Q1 is connected to the supply voltage PVcc, the drain of the first PMOS transistor Q1 is connected to the LDO terminal of the TEC, and the drain of the first PMOS transistor Q1 is the input voltage V-LDO of the TEC; the input voltage V-LDO of the TEC is divided by the second resistor R2 and the third resistor R3 and then is used as a sampling voltage to be fed back to the non-inverting input end of the first operational amplifier U2 to form closed-loop feedback.
The invention also discloses a control strategy of the TEC temperature control driving circuit, based on the TEC temperature control driving circuit, the control strategy is as follows:
when the TEC is a large load, the output voltage V-SW of the switch power supply SW circuit is adjusted to realize efficient temperature control;
when the TEC is a small load, the output voltage V-LDO of the linear voltage regulator LDO is adjusted to realize high-precision temperature control.
The invention has the advantages of
1) The circuit is small in volume
Compared with an H-bridge driving circuit, the TEC driving circuit only adopts half-bridge driving at the V-SW end and only uses a single inductor, so that the area of a PCB (printed circuit board) can be reduced, the system volume can be reduced, and the integration level can be improved.
2) Based on the circuit structure of the invention, the advantages of the LDO circuit and the SW circuit are fully utilized by matching control strategies, and the defects are avoided.
When a large load is carried out, the output voltage is regulated through the V-SW end, the advantage of high efficiency of the DCDC circuit is fully utilized, and high efficiency can be obtained.
When the load is small, the output of the V-LDO end is adjusted, the characteristics of good linearity and small ripple of the LDO circuit can be utilized, and when the heating state and the refrigerating state are switched, a better zero crossing point is provided, so that the transition is stable, and the temperature control with higher precision can be provided.
The output efficiency of the LDO circuit can be calculated by:
wherein IoFor outputting current, VoTo output a voltage, ViTo output a voltage, IqThe quiescent current for the operation of the MOS transistor is approximately equal to the ratio of the output voltage to the input voltage, when the output voltage drops greatly, the LDO terminal has low efficiency, and at this time, the power dissipation is calculated by the following formula:
PowerDissipation＝(Vi-Vo)Io
thereby causing more severe heat generation. The LDO is adjusted only under the condition of low load through a control strategy, and at the moment, although the efficiency is still lower, the output current I is output due to the small loadoSmall, the absolute value of the power dissipation is small, thus avoiding heating.
3) The TEC heating and the refrigeration can be realized simultaneously.
The ordinary LDO type drive only has current output capacity, and the current filling capacity is weak, and the current absorption circuit is added to the circuit, so that the LDO end can output current and absorb current, and the same circuit is used for driving the TEC to heat or refrigerate.
Drawings
FIG. 1 is a schematic view of TEC operation
FIG. 2 is a schematic diagram of an H-bridge driving circuit in the prior art
FIG. 3 is a schematic diagram of a TEC temperature control driving circuit
FIG. 4 is an alternative structure diagram of the LDO end tuning transistor of the present invention
FIG. 5 is a schematic diagram of the parallel connection of two sets of MOS transistors at SW terminal
FIG. 6 is a voltage waveform diagram of PID regulated output in an example
FIG. 7 is a partial enlarged view of FIG. 6
Detailed Description
The invention is further illustrated by the following examples, without limiting the scope of the invention:
with reference to fig. 3, a TEC temperature control driving circuit includes a main control chip SoC, a linear regulator LDO, a current absorption circuit, and a switching power supply SW circuit:
the main control chip SoC generates the control voltage Vctr at the input of the linear regulator LDO and the current sinking circuit, the PWM signal at the input of the switching power supply SW circuit, and the feedback value of the voltage of the detection thermistor.
An output end of the linear regulator LDO is connected to an LDO end of the TEC to provide an input voltage V-LDO, the linear regulator LDO includes a first operational amplifier U2 and a first PMOS transistor Q1 (a) (b) (C) (d) (e) of the linear regulator LDO may be any structure shown in fig. 4, in which a PMOS transistor is illustrated in an embodiment), a control voltage Vctr is input to an inverting input end of the first operational amplifier U2 after passing through a low-pass filter circuit composed of a first resistor R1 and a first capacitor C1, an output end of the first operational amplifier U2 is connected to a gate of the first PMOS transistor Q1, a source of the first PMOS transistor Q1 is connected to the supply voltage PVcc, a drain of the first PMOS transistor Q1 is connected to the LDO end of the TEC, and a drain voltage of the first PMOS transistor Q1 is the input voltage V-LDO of the TEC; the input voltage V-LDO of the TEC is divided by the second resistor R2 and the third resistor R3 and then is used as a sampling voltage to be fed back to the non-inverting input end of the first operational amplifier U2 to form closed-loop feedback.
An output end of the switching power supply SW circuit is connected with a SW end of the TEC to provide the input voltage V-SW, the switching power supply SW circuit is a MOS transistor driver + MOS transistor structure, an input end of the MOS transistor driver receives the PWM signal, an output end of the MOS transistor driver is respectively connected with a gate of a third PMOS transistor Q3 and a gate of a fourth NMOS transistor Q4, a source of the third PMOS transistor Q3 is connected with the supply voltage PVcc, a source of the fourth NMOS transistor Q4 is grounded, a drain of the third PMOS transistor Q3 and a drain of the fourth NMOS transistor Q4 are connected as an output end, the output end of the third PMOS transistor Q1 is connected with the SW end of the TEC to provide the input voltage V-SW for the TEC, and the SW end of the TEC is further grounded through a second capacitor C2. In a preferred embodiment, as shown in fig. 5, the third PMOS transistor Q3 and the fourth NMOS transistor Q4 are implemented as a group of MOS transistors, and the power can be increased by connecting multiple groups of MOS transistors in parallel. In other embodiments, a dedicated switching power controller chip (LM25019) may be used instead of the MOS transistor driver + MOS transistor structure.
The current absorption circuit is connected to the LDO end of the TEC, the current absorption circuit includes a second NMOS transistor Q2 and a second operational amplifier U3, a control voltage Vctr passes through a low pass filter circuit composed of a first resistor R1 and a first capacitor C1 and then is input to the inverting input end of the second operational amplifier U3, the non-inverting input end of the second operational amplifier U3 is connected to the fixed voltage PVCC/4 input, the output end of the second operational amplifier U3 is connected to the gate of the second NMOS transistor, the magnitude of the control voltage Vctr determines the on/off state of the second NMOS transistor Q2, the source of the second NMOS transistor Q2 is connected to the LDO end of the TEC, and the drain of the second NMOS transistor Q2 is grounded.
Compared with an H-bridge driving circuit, the TEC driving circuit only uses a single inductor, the area of a PCB can be reduced, the system size is reduced, and the integration level is improved.
When the circuit works, at the output end of the V-LDO, starting from the main control chip SoC, the DAC output control voltage Vctr in the main control chip SoC is used as a reference voltage (in other embodiments, the output of the control voltage Vctr can also be realized by a digital potentiometer), high-frequency components are filtered by a low-pass filter circuit consisting of a first resistor R1 and a first capacitor C1 and then input into the inverting input end of a first operational amplifier U2, the output end of the first operational amplifier U2 is connected with a first PMOS tube Q1, the drain voltage output of the first PMOS tube Q1 is determined by the high and low of the output voltage of the first operational amplifier U2, namely the V-LDO, the V-LDO is subjected to voltage division by a second resistor R2 and a third resistor R3 and then fed back to the non-inverting input end of the first operational amplifier U2, thereby forming closed-loop feedback until the feedback voltage of the non-inverting input end of the first operational amplifier U2 is equal to, at this time, the voltage output by the drain electrode of the first PMOS pipe Q1V-LDO maintains stable, the reference voltage output by the DAC in the main control chip SoC is changed, and the V-LDO is automatically modulated to be stable, namely the size of the V-LDO is controlled by the reference voltage output by the DAC in the main control chip SoC. At the output end of the V-SW, starting from the main control chip SoC, the main control chip SoC generates PWM to control the MOS transistor driver U4, the MOS transistor driver U4 drives the switches of the third PMOS transistor Q3 and the fourth NMOS transistor Q4 to generate the output voltage V-SW, the first inductor L1 and the second capacitor C2 are energy storage elements, and the duty ratio of the PWM can be changed to change the size of the V-SW.
Through the design on the circuit structure, increase second operational amplifier U3 and second NMOS pipe Q2, make LDO end can output current, again can absorb current to realize TEC's heating and refrigeration simultaneously through same circuit. When the TEC is heated: V-LDO is greater than V-SW, where Vctr is greater than PVcc/4, the second operational amplifier U3 outputs a low voltage, the second NMOS transistor Q2 is turned off, and current flows from V-LDO to V-SW as shown by the solid arrows in FIG. 3. When the TEC is used for refrigerating: V-LDO is less than V-SW, where Vctr is less than PVcc/4, the second operational amplifier U3 outputs a high voltage, the second NMOS transistor Q2 is turned on, and current flows from V-SW to V-LDO, as shown by the dashed arrow in FIG. 3.
And acquiring the temperature at the controlled point by using the NTC, feeding the temperature back to the main control chip SoC, and performing PID calculation by taking the temperature as input, wherein the reference voltage and the PWM duty ratio are determined by the PID calculation result, so that the actual output voltage value is determined to be output. The output voltage is related to PID as follows,
VLDO＝V1-A1×(PID/4096×A2-B1)
VSW＝VLDO+A3×(PID/4096×A2-B1)
wherein V1、A1、A2、A3、B1The PID is a control value calculated by a control algorithm and is determined by an actual circuit for adjusting parameters. Finally, the voltage applied to the TEC is
Vo＝VLDO-VSW
The output voltage waveform is shown in fig. 6-7 according to the selected parameters. As can be seen from FIG. 6, in most cases, the V-LDO is 0 or 5V, and the voltage across the TEC can be adjusted by adjusting V-SW. When the voltage required by TEC is small, the V-SW and V-LDO are adjusted to achieve the desired output, as shown in FIG. 7. Since the power loss of an LDO circuit is equal to the product of its output voltage drop and current, i.e.
PowerDissipation＝(Vi-Vo)Io
The following formula shows that: when the load of the TEC is small, the current I is outputoSmall, the absolute value of the power dissipation is small, so that heating can be avoided. Therefore, the control strategy of the TEC temperature control drive circuit is obtained as follows:
when the load is heavy, the output voltage is regulated by adjusting the V-SW end, the high-efficiency advantage of the DCDC circuit is fully utilized, and high efficiency can be obtained.
When the load is small, the V-LDO output is adjusted, the characteristics of good linearity and small ripple of the LDO circuit can be utilized, and when the heating and refrigerating states are switched, a better zero crossing point is provided, so that smooth transition is realized, and more precise temperature control can be provided.
In this embodiment, the large load is when the voltage difference between the two ends of the TEC is greater than 0.2V, and the small load is when the voltage difference is less than 0.2V. The threshold value can be adjusted according to the specific circuit.
Through the strategy, the V-LDO is adjusted only when the driving voltage required by the TEC is small, so that the power loss can be reduced, and the heat emission can be avoided. When the heating state and the cooling state are switched, the LDO participates in adjustment, so that the transition is smooth, and a better zero crossing point can be obtained.
The specific embodiments described herein are merely illustrative of the spirit of the invention. Various modifications or additions may be made to the described embodiments or alternatives may be employed by those skilled in the art without departing from the spirit or ambit of the invention as defined in the appended claims.
Claims (9)
1. A TEC temperature control drive circuit is characterized in that: it includes linear regulator LDO, current absorption circuit and switching power supply SW circuit:
-the output terminal of the linear regulator LDO is connected to the LDO terminal of the TEC to provide the input voltage V-LDO;
-the output terminal of the switching power supply SW circuit is connected to the SW terminal of the TEC to provide the input voltage V-SW;
-the current sinking circuit is connected at the LDO side of the TEC: when the V-LDO is larger than the V-SW, the circuit is opened, and current flows into the TEC from the linear voltage regulator LDO; when the V-LDO is less than the V-SW, the current is conducted, and the current flows out of the TEC to the current absorption circuit; the current absorption circuit comprises a second NMOS tube Q2 and a second operational amplifier U3, wherein the inverting input end of the second operational amplifier U3 is connected with input voltage, the non-inverting input end of the second operational amplifier U3 is connected with fixed voltage input, the output end of the second operational amplifier U3 is connected with the gate electrode of the second NMOS tube, the source electrode of the second NMOS tube Q2 is connected with the LDO end of the TEC, and the drain electrode of the second NMOS tube Q2 is grounded.
2. The TEC temperature controlled drive circuit of claim 1, wherein: the input end of the linear voltage regulator LDO is connected with the input end of the current absorption circuit, and the input end of the linear voltage regulator LDO and the input end of the current absorption circuit receive input signals of the same control voltage Vctr.
3. The TEC temperature controlled drive circuit of claim 2, wherein: the control voltage Vctr at the input ends of the LDO and the current absorption circuit and the PWM signal at the input end of the SW circuit are both generated by the main control chip SoC.
4. The TEC temperature controlled drive circuit of claim 2, wherein: and the control voltage Vctr is connected with the input ends of the linear voltage regulator LDO and the current absorption circuit after passing through the low-pass filter circuit.
5. The TEC temperature controlled drive circuit of claim 1, wherein: the switch power supply SW circuit is a special switch power supply controller chip, the input end of the switch power supply controller chip receives the PWM signal, and the output end of the switch power supply controller chip is connected with the SW end of the TEC through the energy storage element to provide input voltage V-SW for the TEC.
6. The TEC temperature controlled drive circuit of claim 1, wherein: the switching power supply SW circuit is a MOS tube driver and MOS tube structure, the input end of the MOS tube driver receives PWM signals, the output end of the MOS tube driver is respectively connected with a gate electrode of a third PMOS tube Q3 and a gate electrode of a fourth NMOS tube Q4, a source electrode of the third PMOS tube Q3 is connected with power supply voltage PVcc, a source electrode of the fourth NMOS tube Q4 is grounded, a drain electrode of the third PMOS tube Q3 and a drain electrode of the fourth NMOS tube Q4 are connected as output ends, and are connected with a SW end of the TEC after passing through an energy storage element to provide input voltage V-SW for the TEC.
7. The TEC temperature controlled drive circuit of claim 6, wherein: the third PMOS transistor Q3 and the fourth NMOS transistor Q4 are used as a group of MOS transistors, and the multiple groups of MOS transistors are connected in parallel.
8. The TEC temperature controlled drive circuit of claim 1, wherein: the linear voltage regulator LDO comprises a first operational amplifier U2 and a first PMOS tube Q1, wherein a control voltage Vctr is used as a reference voltage and input into the inverting input end of the first operational amplifier U2, the output end of the first operational amplifier U2 is connected with the gate electrode of the first PMOS tube Q1, the source electrode of the first PMOS tube Q1 is connected with a power supply voltage PVcc, the drain electrode of the first PMOS tube Q1 is connected with the LDO end of the TEC, and the drain electrode voltage of the first PMOS tube Q1 is the input voltage V-LDO of the TEC; the input voltage V-LDO of the TEC is divided by the second resistor R2 and the third resistor R3 and then is used as a sampling voltage to be fed back to the non-inverting input end of the first operational amplifier U2 to form closed-loop feedback.
9. A control strategy for a TEC temperature control driver circuit based on any one of claims 1 to 8, wherein:
when the TEC is a large load, the output voltage V-SW of the switch power supply SW circuit is adjusted to realize efficient temperature control;
when the TEC is a small load, the output voltage V-LDO of the linear voltage regulator LDO is adjusted to realize high-precision temperature control.
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| CN112162580A (en) * | 2020-09-23 | 2021-01-01 | 武汉光迅科技股份有限公司 | Temperature control circuit |
| CN115250007B (en) * | 2022-09-21 | 2023-01-24 | 北京金冠智能电气科技有限公司 | Operation and maintenance monitoring terminal for transformer substation |
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