CN110212765B - Power supply and power supply circuit thereof - Google Patents

Power supply and power supply circuit thereof Download PDF

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Publication number
CN110212765B
CN110212765B CN201810166572.5A CN201810166572A CN110212765B CN 110212765 B CN110212765 B CN 110212765B CN 201810166572 A CN201810166572 A CN 201810166572A CN 110212765 B CN110212765 B CN 110212765B
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voltage
current
capacitor
output
compensation
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CN110212765A (en
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吴克柔
王文情
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BYD Semiconductor Co Ltd
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BYD Semiconductor Co Ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/14Arrangements for reducing ripples from dc input or output
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33523Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention belongs to the technical field of power supplies, and provides a power supply and a power supply circuit thereof. In the invention, by adopting a compensation current generating module comprising a load identification current generating unit, a current-voltage converting unit, a multistage filtering unit, a voltage-current converting unit and a current mirror unit, the load identification current generating unit generates a load identification current according to an error amplification voltage output by a control chip, the current-voltage converting unit converts the load identification current into a load identification voltage, the multistage filtering unit performs filtering processing on the load identification voltage, the voltage-current converting unit converts the processed load identification voltage into a first current, the current mirror unit generates a compensation current according to the first current and then outputs the compensation current so that a voltage transformation module generates a compensation voltage according to the compensation current, and then the control chip controls the conduction frequency and time of a power tube according to a feedback voltage and the compensation voltage output by the voltage transformation module, therefore, the output voltage of the power supply circuit is stable and has high precision.

Description

Power supply and power supply circuit thereof
Technical Field
The invention belongs to the technical field of power supplies, and particularly relates to a power supply and a power supply circuit thereof.
Background
The importance of a power supply is self-evident as a device for supplying power to various electric devices. At present, a power supply circuit adopted in the prior art is mainly a typical flyback switching power supply application circuit diagram shown in fig. 1, and the working process is as follows: firstly, input alternating current is converted into a direct current signal after full-wave rectification of diodes D1-D4 and filtering of a capacitor C11.
Then, on one hand, the direct current signal charges the capacitor C12 through the starting resistor R11, and when the voltage on the capacitor C12 reaches the starting voltage of the control chip IC, the control chip IC starts to work; on the other hand, the direct current signal is converted into an alternating current signal by the switching transformer, the current switching change in the switching transformer is mainly realized by controlling the on and off of the power switch tube Q1 through the control chip IC, when the power switch tube Q1 is conducted, the direct current signal is transmitted to the primary winding of the transformer, when the power switch tube Q1 is disconnected, the voltage on the primary winding of the transformer is transmitted to the secondary winding, and therefore the secondary winding outputs voltage according to the transmitted energy to supply power to the electric equipment. The control chip IC samples the voltage of the output end by sampling the voltage of the auxiliary end of the primary side of the switch transformer, controls the current in the primary side of the transformer by controlling the switching frequency and the conduction time of the power switching tube Q1, and finally enables the voltage of the output end to be constant.
However, although the conventional power circuit can regulate the voltage of the output end, the regulation of the regulated voltage is mainly carried out for one variable of a Load (Load), and in practical application, along with the different specifications and lengths of the power output wires, the resistance on the output wires is very large, so that the output wires consume a certain voltage, when the power circuit is connected to the power utilization port of a mobile phone or other application equipment, the output voltage is low, and therefore, the voltage compensation is needed to improve the defect of the output voltage of the conventional power circuit, and the problem of unstable output voltage is easily brought by the conventional voltage compensation.
Disclosure of Invention
The invention aims to provide a power supply and a power supply circuit thereof, which aim to solve the problem of unstable voltage of an output end after the existing power supply circuit introduces line voltage compensation and improve the precision of output voltage.
The invention is realized in this way, a power circuit, connect with load, the said power circuit includes rectifier bridge, vary voltage module, power switch tube and control chip, the said rectifier bridge is connected with said vary voltage module, the said vary voltage module is connected with said power switch tube, said control chip and said load, the said control chip is connected with said power switch tube, the said power circuit also includes the compensating current generating module, the said compensating current generating module includes:
the load identification current generation unit is connected with the control chip and used for receiving the error amplification voltage output by the control chip and generating load identification current according to the error amplification voltage;
a current-voltage conversion unit connected to the load identification current generation unit, for converting the load identification current into a load identification voltage;
the multistage filtering unit is connected with the current-voltage conversion unit, receives a clock signal and is used for performing multistage filtering processing on the load identification voltage under the action of the clock signal;
the voltage-current conversion unit is connected with the multistage filtering unit, receives an enabling signal and is used for converting the load identification voltage after filtering into a first current when the enabling signal is invalid;
and the current mirror unit is connected with the voltage-current conversion unit, the control chip and the transformation module, and is used for generating a compensation current according to the first current and outputting the compensation current to the transformation module, so that the transformation module generates a compensation voltage according to the compensation current and outputs the compensation voltage to the control chip, and the control chip controls the conduction frequency and time of the power switching tube according to the feedback voltage and the compensation voltage output by the transformation module.
Another object of the present invention is to provide a power supply including the above power supply circuit.
In the present invention, by using a compensation current generation module including a load recognition current generation unit, a current-voltage conversion unit, a multi-stage filtering unit, a voltage-current conversion unit, and a current mirror unit, the load identification current generation unit generates load identification current according to the error amplification voltage output by the control chip, the current-voltage conversion unit converts the load identification current into load identification voltage, the multistage filtering unit performs multistage filtering processing on the load identification voltage, the voltage-current conversion unit converts the load identification voltage after filtering processing into first current, the current mirror unit generates compensation current according to the first current, and outputs the compensation current to the transformation module so that the transformation module generates a compensation voltage according to the compensation current, and then the control chip controls the conduction frequency and time of the power tube according to the feedback voltage and the compensation voltage output by the voltage transformation module. Because the error amplification voltage output by the control chip is obtained according to the output end voltage of the power circuit, the compensation current obtained according to the error amplification voltage can reflect the change of the load current, and further can compensate the voltage drop of the power output lead, so that the output end voltage of the power circuit is stable, meanwhile, the multistage filtering unit is adopted to carry out multistage filtering processing on the load identification voltage, the precision of the first current obtained according to the load identification voltage can be effectively improved, the precision of the compensation voltage is further improved, the problem that the output end voltage is unstable after the existing power circuit introduces line voltage compensation is solved, and the precision of the output voltage is improved.
Drawings
Fig. 1 is a schematic circuit diagram of a power supply circuit provided in the prior art;
fig. 2 is a schematic block diagram of a power circuit according to an embodiment of the present invention;
fig. 3 is a schematic block diagram of a control chip in a power circuit according to an embodiment of the present invention;
fig. 4 is a schematic circuit diagram of a compensation current generating module in a power circuit according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The following detailed description of implementations of the invention refers to the accompanying drawings in which:
fig. 2 shows a block structure of a power circuit provided in an embodiment of the present invention, and for convenience of description, only the parts related to the embodiment are shown, which are detailed as follows:
as shown in fig. 2, the power circuit 1 provided by the embodiment of the present invention is connected to a load (not shown in the figure), and includes a rectifier bridge 10, a transformer module 20, a power switch Q1, a control chip 30, and a compensation current generating module 40, and the compensation current generating module 40 includes a load identification current generating unit 401, a current-voltage converting unit 402, a multistage filtering unit 403, a voltage-current converting unit 404, and a current mirror unit 405.
The rectifier bridge 10 is connected to the transformer module 20, the transformer module 20 is connected to the power switch Q1, the control chip 30 and the load, the control chip 30 is connected to the power switch Q1, the load identification current generation unit 401 is connected to the control chip 30, the current-voltage conversion unit 402 is connected to the load identification current generation unit 401, the multistage filtering unit 403 is connected to the current-voltage conversion unit 402, the voltage-current conversion unit 404 is connected to the multistage filtering unit 403, and the current mirror unit 405 is connected to the voltage-current conversion unit 404, the control chip 30 and the transformer module 20.
Specifically, the rectifier bridge 10 receives the ac power, rectifies the ac power into dc power, and outputs the dc power to the transformer module 20.
The primary winding of the transformer module 20 stores energy according to the direct current when the power switch Q1 is turned on, and transfers the stored energy to the secondary winding when the power switch Q1 is turned off, and the secondary winding starts to demagnetize the transferred energy, that is, the secondary winding supplies the output voltage VOUT to the load according to the transferred energy to charge the load; it should be noted that, in the embodiment of the present invention, the voltage transformation module 20 refers to a structure including a transformer and a diode D6, a secondary diode D7, a capacitor C17, a resistor R6, a resistor R7, and a resistor 12, and a specific working process of the structure may refer to the prior art and is not described herein again; in addition, the power supply circuit provided by the embodiment of the present invention further includes a filtering module composed of an inductor L1, a capacitor C11, and a capacitor C12, and the filtering module mainly filters the direct current output by the rectifier bridge 10 to eliminate an interference signal in the direct current.
In addition, the feedback winding of the transformer module 20 outputs the secondary coil voltage according to the output voltage VOUT during the demagnetization of the secondary winding, so that the output voltage VOUT is fed back to the control chip 30 through the feedback winding, and when the secondary winding stops demagnetizing, the output voltage VOUT stops being fed back to the control chip 30; wherein the secondary winding voltage is proportional to the voltage on the secondary winding, the proportionality factor being the turns ratio of the feedback winding to the secondary winding, and the voltage on the secondary winding being approximately equal to the output voltage VOUT when the secondary winding is in a degaussing process.
The load identification current generation unit 401 receives the error amplification voltage VEA output by the control chip 30, and generates a load identification current IDC according to the error amplification voltage VEA; the current-voltage conversion unit 402 converts the load identification current IDC into a load identification voltage VDC; the multistage filtering unit 403 receives the clock signal CLK, and performs multistage filtering processing on the load identification voltage VDC under the action of the clock signal CLK; the voltage-current conversion unit 404 receives the enable signal ENR and converts the filtered load identification voltage VDC into a first current I1 when the enable signal ENR is inactive; the current mirror 405 generates a compensation current ICDC according to the first current I1, and outputs the compensation current ICDC to the transforming module 20, so that the transforming module 20 generates a compensation voltage VCDC according to the compensation current ICDC and outputs the compensation voltage VCDC to the control chip 30, so that the control chip 30 controls the on-frequency and the on-time of the power switch Q1 according to the feedback voltage VFB and the compensation voltage VCDC output by the transforming module 20 to control the output voltage VOUT to be constant.
Specifically, the control chip 30 works according to the voltage on the feedback winding of the transformer after passing through the diode D6, receives the sampling voltage VFB fed back by the feedback winding of the voltage transformation module 20, generates the compensation voltage VCDC by the voltage transformation module 20 according to the compensation current ICDC, and generates the compensation voltage VCDC according to the sampling voltage VFB and the compensation current ICDC to control the frequency and time of on and off of the power switching tube Q1, thereby implementing the constant-current and constant-voltage control of the power circuit.
Further, as shown in fig. 3, the control chip 30 includes: the device comprises a sample-hold module 301, a degaussing time sampling module 303, an error amplification module 302, a constant current and constant voltage control module 304, a logic control module 305 and an output drive module 306.
The sampling and holding module 301 is connected to the degaussing time sampling module 303 and the error amplifying module 302, the error amplifying module 302 receives a reference voltage Vref and is connected to the constant current and constant voltage control module 304, the constant current and constant voltage control module 304 is connected to the logic control module 305, and the logic control module 305 is connected to the output driving module 306.
Specifically, the sample-and-hold module 301 generates a sample-and-hold voltage VSH according to the sampling voltage VFB of the transformer module 20 and the compensation voltage VCDC, and outputs the sample-and-hold voltage VSH to the error amplification module 302; the error amplification module 302 generates an error amplification voltage VEA according to the sample hold voltage VSH and the reference voltage Vref; the demagnetization time sampling module 303 generates demagnetization time TDS according to the feedback voltage VFB; the constant-current constant-voltage control module 304 generates a switch control signal according to the error amplification voltage VEA and the demagnetization time TDS; the logic control module 305 generates a driving control signal PUL according to the switching control signal; the output driving module 306 generates the switch driving signal DRI according to the driving control signal PUL, so as to control the power switch Q1 to turn on and off according to the switch driving signal DRI.
In the embodiment of the present invention, since the compensation voltage VCDC output by the transforming module 20 is obtained according to the compensation current ICDC output by the compensation current generating module 40, and the compensation current ICDC is derived from the error amplified voltage VEA output from the control chip 30, the error amplifies the value of the voltage VEA related to the load, and from the relationship between the voltage and the current, the current associated with the load current Iout can be obtained from the error amplified voltage VEA, and therefore, the compensation current ICDC derived from this error amplification voltage VEA is also related to the load current Iout, the compensation current ICDC can compensate line loss voltage caused by load current Iout change, so that the power supply circuit provided by the embodiment of the invention can regulate the output voltage VOUT in a voltage stabilizing way according to two variables of the line loss voltage on a load and an output wire, and the stability of the output end voltage of the power supply circuit 1 is improved.
It should be noted that, in the embodiment of the present invention, the control chip 30 further includes a reference bias module 307, a start module 308, an output line voltage compensation module 309, a feed-forward compensation module 310, a frequency jitter module 311, and an overcurrent protection module 312. Since the structures of the reference bias module 307, the start module 308, the output line voltage compensation module 309, the feedforward compensation module 310, the frequency jittering module 311, and the overcurrent protection module 312, and the connection relationship between the structures and other modules in the control chip 30 are the same as those in the prior art, the specific working principle thereof can refer to the prior art, and thus, the details are not described herein.
Further, as a preferred embodiment of the present invention, as shown in fig. 4, the load identifying current generating unit 401 includes: a first operational amplifier OP1, a first switching element M1, a first resistor R1, and a first current mirror CM 1.
A first input terminal of the first operational amplifier OP1 is connected to the control chip 30 (not shown in the drawings, refer to fig. 3), a second input terminal of the first operational amplifier OP1 is connected to an input terminal of the first switching element M1 and a first terminal of the first resistor R1, an output terminal of the first operational amplifier OP1 is connected to a control terminal of the first switching element M1, a second terminal of the first resistor R1 is grounded, an output terminal of the first switching element M1 is connected to an input terminal of the first current mirror CM1, and an output terminal of the first current mirror CM1 is connected to the current-voltage conversion unit 402.
It should be noted that, in the embodiment of the present invention, the first switch element M1 may be implemented by an NMOS transistor, and a gate, a drain, and a source of the NMOS transistor are respectively a control terminal, an input terminal, and an output terminal of the first switch element M1; of course, it is understood by those skilled in the art that the first switching element M1 may also be implemented by using an NPN transistor, a PNP transistor, a PMOS transistor, etc., and is not limited herein.
In addition, the first current mirror CM1 may be implemented by a P-type current mirror or an N-type current mirror, which is not limited herein. When the first current mirror CM1 is implemented by using a P-type current mirror, the structure of the first current mirror CM1 is a current mirror formed by at least two PMOS transistors, and the structure is not limited herein; when the first current mirror CM1 is implemented by using an N-type current mirror, the structure of the first current mirror CM1 is a current mirror formed by at least two NMOS transistors, and the structure is not limited herein.
Further, as a preferred embodiment of the present invention, as shown in fig. 4, the current-voltage converting unit 402 includes: a second resistor R2 and a first capacitor C1.
A first end of the second resistor R2 is connected to the first end of the first capacitor C1, and is connected to the load identification current generation unit 401 and the multistage filtering unit 403, and a second end of the second resistor R2 is connected to the ground, and a second end of the first capacitor C1 is connected to the ground.
Further, as a preferred embodiment of the present invention, as shown in fig. 2, the multistage filtering unit 403 includes:
the first filtering subunit 403a is connected to the current-voltage conversion unit 402, and is configured to perform a first stage of filtering processing on the load identification voltage VDC.
The second filtering subunit 403b is connected to the first filtering subunit 403a, and receives the clock signal CLK, and is configured to perform a second stage of filtering processing on the load identification voltage VDC subjected to the first stage of filtering processing under the action of the clock signal CLK.
The third filtering subunit 403c is connected to the second filtering subunit 403b and the voltage-to-current converting unit 402, and is configured to perform third-stage filtering processing on the load identification voltage VDC subjected to the second-stage filtering processing.
Further, as a preferred embodiment of the present invention, as shown in fig. 4, the first filtering subunit 403a includes: a third resistor R3 and a second capacitor C2.
A first terminal of the third resistor R3 is connected to the current-voltage converting unit 402, a second terminal of the third resistor R3 is connected to the first terminal of the second capacitor C2 and to the second filtering subunit 403b, and a second terminal of the second capacitor C2 is connected to ground.
Further, as a preferred embodiment of the present invention, as shown in fig. 4, the second filtering subunit 403b includes: a second switching element M2, a third switching element M3, a fourth switching element M4, a fifth switching element M5, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, and a first inverter U1.
An input terminal of the second switching element M2 is connected to the first filter subunit 403a, an output terminal of the second switching element M2 is connected to a first terminal of the third capacitor C3 and an input terminal of the third switching element M3, an output terminal of the third switching element M3 is connected to an input terminal of the fourth switching element M4 and a first terminal of the fourth capacitor C4, an output terminal of the fourth switching element M4 is connected to an input terminal of the fifth switching element M5 and a first terminal of the fifth capacitor C5, an output terminal of the fifth switching element M5 is connected to a first terminal of the sixth capacitor C6 and the third filter subunit 403C, a control terminal of the second switching element M2 is connected to a control terminal of the fourth switching element M4 and an input terminal of the first inverter U1 for receiving the clock signal CLK, an output terminal of the first inverter U1 is connected to a control terminal of the third switching element M3 and a control terminal of the fifth switching element M5, and an output terminal of the third inverter U3 is connected to a second terminal of the fourth capacitor C4C 2, The second terminal of the fifth capacitor C5 and the second terminal of the sixth capacitor C6 are connected to ground.
In the embodiment of the present invention, the second switching element M2, the third switching element M3, the fourth switching element M4, and the fifth switching element M5 are all implemented by transmission gates, control ends of the transmission gates are control ends of the second switching element M2, the third switching element M3, the fourth switching element M4, and the fifth switching element M5, input ends of the transmission gates are input ends of the second switching element M2, the third switching element M3, the fourth switching element M4, and the fifth switching element M5, and output ends of the transmission gates are output ends of the second switching element M2, the third switching element M3, the fourth switching element M4, and the fifth switching element M5.
Further, as a preferred embodiment of the present invention, as shown in fig. 4, the third filtering subunit 403c includes: a fourth resistor R4 and a seventh capacitor C7.
A first end of the fourth resistor R4 is connected to the second filtering subunit 403b, a second end of the fourth resistor R4 is connected to a first end of the seventh capacitor C7 and the voltage-current converting unit 404, and a second end of the seventh capacitor C7 is grounded.
In the embodiment of the invention, the RC filter unit capacitors are added at the front stage and the rear stage of the switched capacitor filter unit, so that the influence of oscillation on the power circuit 1 can be effectively avoided, and the stability of the power circuit 1 is further improved.
Further, as a preferred embodiment of the present invention, as shown in fig. 4, the voltage-current conversion unit 404 includes: a second operational amplifier OP2, a sixth switching element M6, a seventh switching element M7, a fifth resistor R7, and a second current mirror CM 2.
A first input terminal of the second operational amplifier OP2 is connected to the output terminal of the multi-stage filter unit 403, a second input terminal of the second operational amplifier OP2 is connected to a first terminal of the fifth resistor R5 and an input terminal of the seventh switching element M7, an output terminal of the second operational amplifier OP2 is connected to a control terminal of the seventh switching element M7 and an input terminal of the sixth switching element M6, a control terminal of the sixth switching element M6 receives the enable signal ENR, an output terminal of the sixth switching element M6 and a second terminal of the fifth resistor R5 are connected to the ground in common, an output terminal of the seventh switching element M7 is connected to an input terminal of the second current mirror CM2, and an output terminal of the second current mirror CM2 is connected to the current mirror unit 405.
It should be noted that, in the embodiment of the present invention, the sixth switching element M6 and the seventh switching element M7 may be implemented by NMOS transistors, and the gate, the drain, and the source of the NMOS transistor are the control terminal, the input terminal, and the output terminal of the sixth switching element M6 and the seventh switching element M7, respectively; of course, it is understood by those skilled in the art that the sixth switching element M6 and the seventh switching element M7 may also be implemented by NPN transistors, PNP transistors, PMOS transistors, etc., and are not limited herein.
In addition, the second current mirror CM2 may be implemented by a P-type current mirror or an N-type current mirror, which is not limited herein. When the second current mirror CM2 is implemented by using a P-type current mirror, the structure of the second current mirror CM2 is a current mirror formed by at least two PMOS transistors, and the structure is not limited herein; when the second current mirror CM2 is implemented by using an N-type current mirror, the structure of the second current mirror CM2 is a current mirror formed by at least two NMOS transistors, and the structure is not limited herein.
Further, as a preferred embodiment of the present invention, as shown in fig. 4, the current mirror unit 405 includes a third current mirror CM3, an input terminal of the third current mirror CM3 is connected to the voltage-current conversion unit 404, and an output terminal of the third current mirror CM3 outputs the compensation current ICDC.
It should be noted that, in the embodiment of the present invention, the third current mirror CM3 may be implemented by using a P-type current mirror or an N-type current mirror, and is not limited herein. When the third current mirror CM3 is implemented by using a P-type current mirror, the structure of the third current mirror CM3 is a current mirror formed by at least two PMOS transistors, and the structure is not limited herein; when the third current mirror CM3 is implemented by an N-type current mirror, the structure of the third current mirror CM3 is a current mirror formed by at least two NMOS transistors, and the structure is not limited herein.
The following will specifically describe the operation principle of the power circuit 1 provided by the present invention by taking the circuits shown in fig. 2, fig. 3 and fig. 4 as examples, and the following details are described below:
first, it should be noted that, the working principle of the power supply circuit 1 provided in this embodiment may refer to the related description in fig. 2, and will not be described in detail here, that is, only the constant voltage control of the power supply circuit 1 provided in this embodiment of the present invention is described in detail here, specifically as follows:
as shown in fig. 2, assuming that the output voltage of the power supply circuit 1 is VOUT, and meanwhile, assuming that there is no voltage drop on the output conductor (i.e., the resistance Rcable of the output conductor is 0), the voltage drop on the diode D7 is Vd, and the turn ratio of the primary side auxiliary winding to the secondary winding of the transformer in the transformer module 20 is Nas, the sampled auxiliary winding voltage Vaux is:
Figure 34506DEST_PATH_IMAGE001
;(1)
wherein,
Figure 766839DEST_PATH_IMAGE002
for the voltage value of the auxiliary winding voltage Vaux,
Figure 678163DEST_PATH_IMAGE003
is the value of the turns ratio of the primary auxiliary winding to the secondary winding of the transformer in the transformation module 20,
Figure 662300DEST_PATH_IMAGE004
is the voltage value of the output voltage VOUT,
Figure 116415DEST_PATH_IMAGE005
is the voltage value of the voltage drop Vd across the diode D7.
Further, the auxiliary winding voltage Vaux of the transformer in the transformer module 20 is divided by the voltage dividing resistor R6 and the voltage dividing resistor R7, and then the divided feedback voltage VFB is output to the control chip 30, and the feedback voltage VFB may be represented by the following expression:
Figure 19649DEST_PATH_IMAGE006
;(2)
wherein,
Figure 559214DEST_PATH_IMAGE007
is the voltage value of the feedback voltage VFB,
Figure 206096DEST_PATH_IMAGE008
is a resistance value of the voltage dividing resistance R7,
Figure 514718DEST_PATH_IMAGE009
the resistance value of the voltage dividing resistor R6.
By changing the formula (2), the output voltage VOUT of the power circuit 1 can be obtained as follows:
Figure 854432DEST_PATH_IMAGE010
; (3)
since the resistance value of the voltage dividing resistor R7 is determined when the specification of the power supply circuit 1 is determined
Figure 615715DEST_PATH_IMAGE008
Resistance value of voltage dividing resistor R6
Figure 63358DEST_PATH_IMAGE009
The value of the turns ratio of the primary auxiliary winding to the secondary winding of the transformer in the transformation module 20
Figure 960907DEST_PATH_IMAGE003
And the voltage value of the voltage drop Vd across the diode D7
Figure 205944DEST_PATH_IMAGE005
Are determined, and therefore, as can be seen from equation (3), the feedback voltage VFB is the output voltageVOUT is a function of a variable, and the control loop (the loop formed by the control chip 30, the power switch Q1 and the transformer module 20) can control the output voltage VOUT to be constant by the feedback voltage VFB as VOUT varies with the load.
However, in practical applications, since the resistance Rcable of the power output wire is not negligible, i.e. the voltage drop across the resistance Rcable of the power output wire is not negligible, the above equations (1), (2) and (3) can be expressed by the following equations (4), (5) and (6), respectively:
Figure 720102DEST_PATH_IMAGE011
;(4)
Figure 708786DEST_PATH_IMAGE012
;(5)
Figure 726421DEST_PATH_IMAGE013
;(6)
wherein,
Figure 407938DEST_PATH_IMAGE014
is the resistance value of the resistor Rcable of the power output lead,
Figure 143813DEST_PATH_IMAGE015
is the current value of the output current Iout of the power supply circuit 1.
After the output lead is selected, the resistance value of the resistor Rcable is
Figure 936188DEST_PATH_IMAGE014
Is a definite value, and the output current Iout is a variable which changes with the load, therefore, the above equations (4), (5) and (6) have two variables of the output voltage VOUT and the output current Iout, but the control loop only performs voltage regulation on one variable of the output voltage VOUT and does not perform voltage regulation on the output current Iout, therefore, the control loop loses the regulation on the output voltage VOUTConstant control of the output voltage VOUT at the output of the power supply circuit 1.
In view of the above problem, the power supply circuit 1 according to the embodiment of the present invention generates a compensation current ICDC proportional to the output current Iout, generates a compensation voltage VCDC according to the compensation current ICDC, and further superimposes the compensation voltage VCDC and the feedback voltage VFB to cancel a voltage drop on an output wire through the compensation voltage VCDC, so as to recover a stable control function of a control loop and make the output voltage VOUT constant. This process will be specifically described below.
First, as can be seen from the above description and fig. 2, the output voltage VOUT of the power circuit 1 according to the embodiment of the present invention can be expressed by the following expression:
Figure 808329DEST_PATH_IMAGE016
;(7)
wherein,
Figure 660748DEST_PATH_IMAGE017
to compensate for the current value of the current ICDC,
Figure 883919DEST_PATH_IMAGE018
to compensate for the voltage value of the voltage VCDC.
According to the equations (6) and (7), if the voltage drop on the output line is to be eliminated, the voltage drop on the output line needs to be eliminated
Figure 214406DEST_PATH_IMAGE019
;(8)
The expression of the compensation current ICDC obtained by converting equation (8) is:
Figure 206633DEST_PATH_IMAGE020
;(9)
next, as shown in fig. 2, assuming Nps is the turns ratio of the primary winding to the secondary winding of the transformer in the transformer module 20, Ip is the current peak value in the primary winding, Isp is the current peak value in the secondary winding, Ls is the inductance of the secondary winding, Vs is the output voltage of the secondary winding, Dons is the duty ratio of the secondary current, Tons is the conduction time of the secondary diode D7, and f is the operating frequency of the power circuit 1, the relationship between the current peak value Ip and the current peak value Isp is as follows according to the transformer principle:
Figure 495531DEST_PATH_IMAGE021
;(10)
wherein,
Figure 674840DEST_PATH_IMAGE022
the value of the current peak value Isp is,
Figure 811948DEST_PATH_IMAGE023
is the value of the current peak value Ip,
Figure 924260DEST_PATH_IMAGE024
is the value of the turns ratio Nps of the primary winding to the secondary winding of the transformer in the transformation module 20.
And since the expression of the current Isp is:
Figure 852902DEST_PATH_IMAGE025
;(11)
wherein,
Figure 316244DEST_PATH_IMAGE026
is the voltage value of the output voltage Vs of the secondary winding,
Figure 722955DEST_PATH_IMAGE027
the inductance value of the inductance Ls of the secondary winding,
Figure 689774DEST_PATH_IMAGE028
is the value of the conduction time Tons of the secondary diode D7.
Then, according to equation (11), the on-time Tons of the secondary diode D7 is expressed as:
Figure 789317DEST_PATH_IMAGE029
;(12)
from the output of the power supply circuit 1, while incorporating the duty cycle
Figure 474376DEST_PATH_IMAGE030
It can be seen that the expression of the output current Iout is as follows:
Figure 950357DEST_PATH_IMAGE031
;(13)
wherein,
Figure 771682DEST_PATH_IMAGE032
is the value of the duty cycle Dons of the secondary current,
Figure 573285DEST_PATH_IMAGE033
being the value of the duty cycle T of the power supply circuit 1,
Figure 480061DEST_PATH_IMAGE034
is the value of the operating frequency f of the power supply circuit 1.
As can be seen from the combination of equation (9) and equation (13), the final expression of the compensation current ICDC of the power supply circuit 1 provided in the embodiment of the present invention is:
Figure 494154DEST_PATH_IMAGE035
;(14)
as can be seen from the formula (14), the compensation current ICDC of the power circuit 1 provided in the embodiment of the present invention is a current that varies with the operating frequency f and the on-time Tons of the power circuit 1, and the voltage drop of the output wire can be effectively compensated by the current, while the generation of the compensation current ICDC of the power circuit 1 provided in the embodiment of the present invention is reflected by the magnitude of the error amplification voltage VEA output by the identification control chip 30
Figure 435565DEST_PATH_IMAGE036
To obtain the compensation current ICDC.
The generation of this compensation current ICDC is described in detail below with reference to fig. 4, which is detailed below:
as shown in fig. 4, the error amplified voltage VEA outputted by the control chip 30 (not shown, please refer to fig. 3) passes through the first operational amplifier OP1, the first switching element M1, the first resistor R1 and the load identification current generating unit 401 of the first current mirror CM1, and then generates a load identification current IDC related to the load, where the load identification current IDC is expressed as:
Figure 876911DEST_PATH_IMAGE037
;(15)
wherein,
Figure 270983DEST_PATH_IMAGE038
the current value of the current IDC is identified for the load,
Figure 229712DEST_PATH_IMAGE039
to error amplify the voltage value of the voltage VEA,
Figure 905192DEST_PATH_IMAGE040
is the resistance value of the first resistor R1,
Figure 783018DEST_PATH_IMAGE041
is the ratio of the first current mirror CM 1.
It should be noted that, since the error amplified voltage VEA is a value obtained by comparing the feedback voltage VFB of the output voltage VOUT, which is mapped on the feedback pin of the control chip 30, with the reference voltage Vref, and the output voltage VOUT is divided by the load to obtain the output voltage Iout, the error amplified voltage VEA can generate a current varying with the output current Iout to compensate for the line loss caused by the variation of the output current Iout, that is, the load identification current generating unit 401 can generate a load identification current IDC according to the error amplified voltage VEA to reflect the line loss caused by the variation of the output current Iout
Figure 664386DEST_PATH_IMAGE036
A change in (c).
After the load identification current generation unit 401 generates the load identification current IDC, the load identification current IDC is converted into a load identification voltage VDC through the second resistor R2, and the load identification voltage VDC is output to the voltage-current conversion unit 404 after passing through the first stage RC filter circuit, the fourth stage switch filter circuit, and the second stage RC filter circuit.
The following is a detailed description of the working principle of the four-stage switch filter circuit:
as shown in fig. 4, when the clock signal CLK is at a high level, the second switching element M2 is turned on, the third switching element M3 is turned off, and the third capacitor C3 is connected to the one-stage filtered load identification voltage VDC, so that the expression of the charge on the third capacitor C3 is:
Figure 20281DEST_PATH_IMAGE042
;(16)
wherein,
Figure 670705DEST_PATH_IMAGE043
is the amount of charge of the charge on the third capacitor C3,
Figure 719433DEST_PATH_IMAGE044
is the capacitance value of the third capacitor C3,
Figure 88097DEST_PATH_IMAGE045
the voltage value of the voltage VDC is identified for the load.
When the CLK _ N is at a high level, the second switching element M2 is turned off, the third switching element M3 is turned on, the charge on the third capacitor C3 is transferred to the fourth capacitor C4, i.e., the third capacitor C3 discharges, and the charge charged by the third capacitor C3 is charged
Figure 388628DEST_PATH_IMAGE043
To the fourth capacitor C4.
As can be seen from the above description, the charge extracted from the load identifying voltage VDC is supplied to the fourth capacitor C4 every clock cycle (CLK + CLK _ N), so that the average current flowing between the second switching element M2 and the third switching element M3 is Iaw:
Figure 18193DEST_PATH_IMAGE046
; (17)
wherein,
Figure 113188DEST_PATH_IMAGE047
the current value of the average current Iaw flowing between the second switching element M2 and the third switching element M3,
Figure 93782DEST_PATH_IMAGE048
is the on-time of the clock signal CLK,
Figure 932425DEST_PATH_IMAGE049
is the on-time of the clock signal CLK _ N. As can be seen from equation (17), if
Figure 682075DEST_PATH_IMAGE050
Sufficiently small, that is, the time period is sufficiently small, the process of transferring the charge of the load identification voltage VDC on the third capacitor C3 to the fourth capacitor C4 is continuous, and therefore, an equivalent resistance Req may be defined between the second switching element M2 and the third switching element M3, and the expression of the equivalent resistance Req is:
Figure 682392DEST_PATH_IMAGE051
;(18)
wherein,
Figure 150283DEST_PATH_IMAGE052
is the resistance value of the equivalent resistance Req.
Combining equations (17) and (18) yields:
Figure 792617DEST_PATH_IMAGE053
;(19)
further, according to equation (19), the first equivalent time constant of the four-stage switch filter circuit is obtained:
Figure 399703DEST_PATH_IMAGE054
;(20)
wherein,
Figure 836501DEST_PATH_IMAGE055
is the capacitance value of the fourth capacitance C4,
Figure 526108DEST_PATH_IMAGE056
is the value of the first time constant.
Similarly, the first equivalent time constant of the four-stage switch filter circuit is:
Figure 440974DEST_PATH_IMAGE057
;(21)
wherein,
Figure 165217DEST_PATH_IMAGE058
is the capacitance value of the sixth capacitor C6,
Figure 772916DEST_PATH_IMAGE059
is the value of the fifth capacitance C5,
Figure 949819DEST_PATH_IMAGE060
is the value of the second time constant.
Because the time constant influencing the frequency response of the filter depends on the ratio of the time period to the capacitance, and in the modern process, the precision of the capacitance ratio can be controlled within 0.1 percent, therefore, only a proper clock frequency and a reasonable capacitance ratio are selected, a proper time constant can be obtained, and further the four-stage switch filter capacitor can effectively filter the load identification voltage VDC.
It should be noted that, in the embodiment of the present invention, by adding the first stage RC filter circuit and the second stage RC filter circuit before and after the four-stage switch filter circuit, the first stage RC filter circuit and the second stage RC filter circuit can filter the load identification voltage VDC and ensure that the load identification voltage VDC is filtered into an analog quantity, so as to reduce interference, further prevent the power circuit 1 from generating a problem of large ripple due to oscillation, and further ensure the stability of the output voltage VOUT.
Further, after the load identification voltage VDC after being subjected to the multi-stage filtering is input to the voltage-current conversion unit 404, the voltage-current conversion unit 404 composed of the second operational amplifier OP2, the sixth switching element M6, the seventh switching element M7, the fifth resistor R5, and the second current mirror CM2 converts the load identification voltage VDC into the first current I1 when the enable signal ENR is inactive, and the first current I1 generates the compensation current ICDC after passing through the third current mirror CM3, and the compensation current ICDC has an expression:
Figure 668376DEST_PATH_IMAGE061
;(22)
wherein,
Figure 247125DEST_PATH_IMAGE062
is the current value of the first circuit I1,
Figure 291305DEST_PATH_IMAGE063
is the resistance of the fifth resistor R5,
Figure 830870DEST_PATH_IMAGE064
the ratio of the second current mirror CM2,
Figure 477752DEST_PATH_IMAGE065
is the ratio of the third current mirror CM 3.
Since the first current I1 is obtained from the multi-stage filtered load identification voltage VDC which is obtained from the load identification current IDC, the first current I1 is substantially equal to the load identification current IDC, and thus the compensation current ICDC can be expressed as:
Figure 786374DEST_PATH_IMAGE066
;(23)
combining equation (23) with equation (15), the final expression of the compensation current ICDC is:
Figure 860509DEST_PATH_IMAGE067
;(24)
as can be seen from equation (24), the compensation current ICDC is related to the error amplification voltage VEA, and thus, the magnitude of the error amplification voltage VEA can be determined, an
Figure 621792DEST_PATH_IMAGE068
Figure 72365DEST_PATH_IMAGE040
Figure 235493DEST_PATH_IMAGE041
Figure 477600DEST_PATH_IMAGE063
Figure 991758DEST_PATH_IMAGE064
Figure 980442DEST_PATH_IMAGE065
The value of (2) is to obtain a compensation current ICDC related to load change, so that the voltage transformation module 20 generates a compensation voltage VCDC according to the compensation current ICDC and the divided voltages of the voltage dividing resistor R6 and the voltage dividing resistor R7, and the compensation voltage VCDC and the feedback voltage VFB are overlapped and then output to the control chip 30, so that the control chip 30 can control the on-frequency and the on-time of the power switching tube Q1 according to the compensation voltage VCDC and the feedback voltage VFB, and the compensation requirements of different line resistances of different power circuits 1 can be met by adjusting the sizes of the voltage dividing resistor R6 and the voltage dividing resistor R7. In this embodiment, the power supply circuit 1 according to the present invention amplifies power according to an errorThe voltage VEA generates a compensation current ICDC, and then generates a compensation voltage VCDC capable of compensating for a voltage drop on an output wire of the power supply according to the compensation current ICDC, so that the control chip 30 can control the conduction time and the conduction frequency of the power switching tube Q1 according to the compensation voltage VCDC and the feedback voltage VFB, and further stabilize the output voltage VOUT of the output terminal; in addition, the multistage filtering unit is adopted to carry out multistage filtering processing on the load identification voltage, the precision of the first current obtained according to the load identification voltage can be effectively improved, and the precision of the compensation voltage is further improved, so that the problem that the voltage of the output end is unstable after the existing power supply circuit introduces line voltage compensation is solved, and the precision of the output voltage is improved.
Further, the invention also provides a power supply, which comprises a power supply circuit. It should be noted that, since the power circuit of the power supply provided by the embodiment of the present invention is the same as the power circuit shown in fig. 2 to 4, the detailed description of the power circuit in the power supply provided by the embodiment of the present invention may refer to the foregoing detailed description about fig. 3 to 4, and is not repeated herein.
In the present invention, by using a compensation current generation module including a load recognition current generation unit, a current-voltage conversion unit, a multi-stage filtering unit, a voltage-current conversion unit, and a current mirror unit, the load identification current generation unit generates load identification current according to the error amplification voltage output by the control chip, the current-voltage conversion unit converts the load identification current into load identification voltage, the multistage filtering unit performs multistage filtering processing on the load identification voltage, the voltage-current conversion unit converts the load identification voltage after filtering processing into first current, the current mirror unit generates compensation current according to the first current, and outputs the compensation current to the transformation module so that the transformation module generates a compensation voltage according to the compensation current, and then the control chip controls the conduction frequency and time of the power tube according to the feedback voltage and the compensation voltage output by the voltage transformation module. Because the error amplification voltage output by the control chip is obtained according to the output end voltage of the power circuit, the compensation current obtained according to the error amplification voltage can reflect the change of the load current, and further can compensate the voltage drop of the power output lead, so that the output end voltage of the power circuit is stable, meanwhile, the multistage filtering unit is adopted to carry out multistage filtering processing on the load identification voltage, the precision of the first current obtained according to the load identification voltage can be effectively improved, the precision of the compensation voltage is further improved, the problem that the output end voltage is unstable after the existing power circuit introduces line voltage compensation is solved, and the precision of the output voltage is improved.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.

Claims (10)

1. The utility model provides a power supply circuit, is connected with the load, power supply circuit includes rectifier bridge, vary voltage module, power switch pipe and control chip, the rectifier bridge with vary voltage module connects, vary voltage module with power switch pipe control chip and the load is connected, control chip with power switch union coupling, the last output line voltage compensation module that is equipped with of control chip, its characterized in that, power supply circuit still includes the compensating current and produces the module, the compensating current produces the module and includes:
the load identification current generation unit is connected with the control chip and used for receiving the error amplification voltage output by the control chip and generating load identification current according to the error amplification voltage;
a current-voltage conversion unit connected to the load identification current generation unit, for converting the load identification current into a load identification voltage;
the multistage filtering unit is connected with the current-voltage conversion unit, receives a clock signal and is used for performing multistage filtering processing on the load identification voltage under the action of the clock signal;
the voltage-current conversion unit is connected with the multistage filtering unit, receives an enabling signal and is used for converting the load identification voltage after filtering into a first current when the enabling signal is invalid;
and the current mirror unit is connected with the voltage-current conversion unit, the control chip and the transformation module, and is used for generating a compensation current according to the first current and outputting the compensation current to the transformation module, so that the transformation module generates a compensation voltage according to the compensation current and outputs the compensation voltage to the control chip, and the control chip controls the conduction frequency and time of the power switching tube according to the feedback voltage and the compensation voltage output by the transformation module.
2. The power supply circuit according to claim 1, wherein the load identifying current generating unit comprises: the circuit comprises a first operational amplifier, a first switching element, a first resistor and a first current mirror;
the first input end of the first operational amplifier is connected with the control chip, the second input end of the first operational amplifier is connected with the input end of the first switch element and the first end of the first resistor, the output end of the first operational amplifier is connected with the control end of the first switch element, the second end of the first resistor is grounded, the output end of the first switch element is connected with the input end of the first current mirror, and the output end of the first current mirror is connected with the current-voltage conversion unit.
3. The power supply circuit according to claim 1, wherein the current-voltage conversion unit includes: a second resistor and a first capacitor;
the first end of the second resistor is connected with the first end of the first capacitor in common, and is connected with the load identification current generation unit and the multistage filtering unit, and the second end of the second resistor and the second end of the first capacitor are connected with the ground in common.
4. The power supply circuit according to any one of claims 1 to 3, wherein the multistage filtering unit includes:
the first filtering subunit is connected with the current-voltage conversion unit and is used for performing first-stage filtering processing on the load identification voltage;
the second filtering subunit is connected with the first filtering subunit, receives the clock signal and is used for performing second-stage filtering processing on the load identification voltage subjected to the first-stage filtering processing under the action of the clock signal;
and the third filtering subunit is connected with the second filtering subunit and the voltage-current conversion unit and is used for carrying out third-stage filtering processing on the load identification voltage subjected to the second-stage filtering processing.
5. The power supply circuit of claim 4, wherein the first filtering subunit comprises: a third resistor and a second capacitor;
the first end of the third resistor is connected with the current-voltage conversion unit, the second end of the third resistor is connected with the first end of the second capacitor in common and connected with the second filtering subunit, and the second end of the second capacitor is grounded.
6. The power supply circuit of claim 4, wherein the second filtering subunit comprises: a second switching element, a third switching element, a fourth switching element, a fifth switching element, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, and a first inverter;
the input end of the second switch element is connected with the first filter subunit, the output end of the second switch element is connected with the first end of the third capacitor and the input end of the third switch element, the output end of the third switch element is connected with the input end of the fourth switch element and the first end of the fourth capacitor, the output end of the fourth switch element is connected with the input end of the fifth switch element and the first end of the fifth capacitor, the output end of the fifth switch element is connected with the first end of the sixth capacitor and the third filter subunit, the control end of the second switch element is connected with the control end of the fourth switch element and the input end of the first phase inverter to receive the clock signal, and the output end of the first phase inverter is connected with the control end of the third switch element and the control end of the fifth switch element, the second end of the third capacitor is connected to the ground in common with the second end of the fourth capacitor, the second end of the fifth capacitor and the second end of the sixth capacitor.
7. The power supply circuit of claim 4, wherein the third filtering subunit comprises: a fourth resistor and a seventh capacitor;
a first end of the fourth resistor is connected to the second filtering subunit, a second end of the fourth resistor is connected to the first end of the seventh capacitor and the voltage-current conversion unit, and a second end of the seventh capacitor is grounded.
8. The power supply circuit according to claim 1, wherein the voltage-current conversion unit includes: a second operational amplifier, a sixth switching element, a seventh switching element, a fifth resistor, and a second current mirror;
the first input end of the second operational amplifier is connected with the output end of the multistage filtering unit, the second input end of the second operational amplifier is connected with the first end of the fifth resistor and the input end of the seventh switching element, the output end of the second operational amplifier is connected with the control end of the seventh switching element and the input end of the sixth switching element, the control end of the sixth switching element receives the enable signal, the output end of the sixth switching element is connected with the second end of the fifth resistor in common, the output end of the seventh switching element is connected with the input end of the second current mirror, and the output end of the second current mirror is connected with the current mirror unit.
9. The power supply circuit according to claim 1, wherein the current mirror unit comprises a third current mirror, an input terminal of the third current mirror is connected to the voltage-current conversion unit, and an output terminal of the third current mirror outputs the compensation current.
10. A power supply, characterized in that it comprises a power supply circuit according to any one of claims 1 to 9.
CN201810166572.5A 2018-02-28 2018-02-28 Power supply and power supply circuit thereof Active CN110212765B (en)

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