CN110191254B - Gain circuit based on ultra-high definition video signal processing - Google Patents

Gain circuit based on ultra-high definition video signal processing Download PDF

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Publication number
CN110191254B
CN110191254B CN201910411441.3A CN201910411441A CN110191254B CN 110191254 B CN110191254 B CN 110191254B CN 201910411441 A CN201910411441 A CN 201910411441A CN 110191254 B CN110191254 B CN 110191254B
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triode
resistor
transistor
current source
base
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CN110191254A (en
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潘继水
高晓杰
张强
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Dongguan Konka Electronics Co Ltd
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Dongguan Konka Electronics Co Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/14Picture signal circuitry for video frequency region
    • H04N5/148Video amplifiers

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)

Abstract

The gain circuit based on the ultra-high definition video signal processing comprises a first current source, a second current source, a third current source, a fourth current source, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a first resistor and a second resistor, wherein the current values of the first, second, third and fourth current sources are the same, so that the third transistor, the fifth transistor, the tenth transistor and the twelfth transistor are in mirror current source circuits, and the first transistor, the second transistor, the fourth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor and the eleventh transistor are all in emitter following states, and the voltage difference between the two ends of the first resistor R1 and the second resistor R2 is consistent with the voltage difference of an external signal. The invention changes the voltage type gain amplifying circuit into the current type gain amplifying circuit, so that the gain circuit can work under the working condition of high broadband and simultaneously can ensure the transmission rate.

Description

Gain circuit based on ultra-high definition video signal processing
Technical Field
The invention relates to the field of electric signal processing, in particular to a gain circuit based on ultra-high definition video signal processing.
Background
The various video signal processing and transmission systems all need an operational amplifier to realize functions such as buffer amplification or modulation processing of video signals, and particularly in the current processing of high-definition or ultra-high-definition video confidence, high bandwidth is generally required, and high signal transmission rate is required.
The traditional operational amplifier comprises an input part, a gain part and an output part, wherein the existing gain part circuit is usually a voltage type gain amplifying circuit, but the voltage type gain amplifying circuit has larger voltage signal amplitude change in the transmission process, is influenced by the parasitic capacitance of a transistor in a signal path, and is easy to reduce the signal change rate, so that the circuit cannot work under higher bandwidth.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides the voltage-current conversion circuit for the operational amplifier, and the voltage type gain amplification circuit is changed into the current type gain amplification circuit, so that the gain circuit can work under the working condition of high broadband and the transmission rate can be ensured.
In order to achieve the above object, the present invention adopts the following technical scheme.
The gain circuit based on ultra-high definition video signal processing comprises a first, a second, a third and a fourth current sources, a first, a second, a third, a fourth, a fifth, a sixth, a seventh, an eighth, a ninth, a tenth, an eleventh, a twelfth triode, a first and a second resistor, wherein one end of the first current source is externally connected with a power supply voltage, the other end is connected with an emitter of the first triode and a base of a fourth triode, one end of the second current source is externally connected with a negative voltage, the other end is connected with an emitter of the second triode and a base of the ninth triode, the base of the third triode is connected with a collector of the third triode and a base of the fifth triode, one end of the third current source is externally connected with a power supply voltage, the other end is connected with an emitter of the eighth triode and a base of the eighth triode, the collectors of the third triode and the fifth triode are respectively connected with a negative voltage, the bases of the thirteenth triode and the thirteenth triode are respectively connected with the emitter of the thirteenth triode and the thirteenth, the thirteenth triode is connected with the base of the thirteenth triode and the thirteenth triode, the thirteenth resistor is connected with the base of the thirteenth triode, the thirteenth triode is connected with the thirteenth resistor, the thirteenth resistor is connected with the base of the thirteenth triode, the thirteenth triode is connected with the base of the thirteenth triode, the thirteenth resistor, the base electrodes of the first triode, the second triode, the seventh triode and the eighth triode are externally connected with input signal voltages.
Further, the first, third, fifth, seventh, ninth and eleventh triodes are PNP triodes.
Further, the second, fourth, sixth, eighth, tenth and twelfth triodes are NPN triodes.
Further, the current values of the first, second, third and fourth current sources are the same.
Compared with the prior art, the invention has the beneficial effects that:
the voltage type gain amplifying circuit is changed into the current type gain amplifying circuit, so that the gain circuit can work under the working condition of high broadband, and meanwhile, the transmission rate can be ensured.
Drawings
Fig. 1 is a schematic circuit diagram of a gain circuit based on ultra-high definition video signal processing.
Detailed Description
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention can be easily understood by those skilled in the art from the description of the present specification. In addition, the definitions given in the present specification and the structures, proportions, sizes, directions and the like depicted in the drawings are for convenience of description, so that those skilled in the art will understand the present invention, and are not meant to limit the applicable limitations of the present invention, and thus have no technical essential significance. In addition, any structural modification, proportional change, size adjustment, etc. should fall within the scope of the technical disclosure as long as the effects of the present invention and the objects achieved are not affected.
As shown in figure 1, the gain circuit based on ultra-high definition video signal processing of the invention comprises a first current source I1, a second current source I2, a third current source I3, a fourth current source I4, a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a third transistor Q5, a fourth transistor Q6, a third transistor Q7, a fourth transistor Q8, a Q9, a Q10, a Q11, a Q12, a first resistor R1, a third resistor R2, a third transistor Q1, a fifth transistor Q3, a ninth transistor Q5, a Q7, a Q9, a Q11, a PNP transistor, a third transistor Q1, a fourth transistor Q2, a sixth transistor Q2, a twelve transistor Q6, a Q8, a Q10, a Q12, an NPN transistor, one end of which is externally connected with a power supply voltage VCC, the other end of the first current source I1 is connected with a base of the first transistor Q4, a Q9, a negative voltage of the third transistor Q2 is connected with the base of the third transistor Q3, a base of the third transistor Q4, a negative voltage of the third transistor Q3, a base of the third transistor Q4 is connected with the third transistor Q3, a base of the third transistor Q4, a negative voltage of the third transistor Q10 is connected with the base of the third transistor Q3, a base of the third transistor Q4, a base of the third transistor Q3 is connected with the third transistor Q3, and the base of the third transistor is connected with the base of the third transistor is a negative voltage of the third transistor is an N, the collector of the tenth triode Q10 and the twelfth triode Q12 are respectively connected with the collector of the ninth triode Q9 and the eleventh triode Q11, the bases of the tenth triode Q10 and the twelfth triode Q12 are connected, the collector of the thirteenth triode Q10 is communicated with the base, the first resistor R1 and the second resistor R2 are connected in series, one end of the first resistor R1 and one end of the second resistor R2 are connected with the emitter of the fourth triode Q4 and the emitter of the ninth triode Q9, the other end of the first resistor R1 and the other end of the second resistor R2 are connected with the emitter of the sixth triode Q6 and the emitter of the eleventh triode Q11, and the bases of the first triode Q1, the second triode Q2, the seventh triode Q7 and the eighth triode Q8 are externally connected with signal voltage DeltaV.
The working principle of the invention is that the externally connected signal voltage DeltaV is respectively input to the bases Q1, Q2, Q7 and Q8 of the first triode, the second triode, the seventh triode and the eighth triode, the current values of the first current source I1, the second current source I2, the third current source I3 and the fourth current source I4 are the same through design, so that the third triode Q3, the fifth triode Q5, the Q10 and the Q12 form a mirror current source circuit, the output currents of the third triode Q3 and the fifth triode Q5 are the same, the output currents of the tenth triode Q10 and the twelfth triode Q12 are the same, the first triode Q1, the second triode Q2, the fourth triode Q6, the sixth triode Q7, the eighth triode Q7, the ninth triode Q11 are all in emitter following states, the voltage difference between the two ends of the first resistor R1 and the second resistor R2 is consistent with the externally connected signal voltage difference, therefore, the current change between the first resistor and the two ends of the second resistor can be only the externally connected signal voltage DeltaV divided by the first resistor and the second resistor DeltaV=V 1, the differential value DeltaV is the second resistor R1, the current value is amplified by the intermediate current between the first resistor and the second resistor R1 and the differential value DeltaV=R 1, and the differential value DeltaV is the intermediate current is changed, and the gain is the intermediate between the two stages is increased, and the gain is increased. In addition, no voltage signal is amplified in the process of transmitting the signals of the lake, so that the bandwidth is wider, and the signal transmission speed is higher.
Other corresponding changes and modifications will occur to those skilled in the art from the disclosure herein, and it is intended that all such changes and modifications fall within the scope of the invention.

Claims (1)

1. The gain circuit based on the ultra-high definition video signal processing is characterized in that: comprises a first, a second, a third and a fourth current sources, a first, a second, a third, a fourth, a fifth, a sixth, a seventh, an eighth, a ninth, a tenth, an eleventh, a twelfth triode, a first and a second resistors, wherein one end of the first current source is externally connected with a power supply voltage, the other end is connected with an emitter of the first triode and a base of the fourth triode, one end of the second current source is externally connected with a power supply negative voltage, the other end is connected with an emitter of the second triode and a base of the ninth triode, the base of the third triode is connected with a collector of the third triode and a base of the fifth triode, one end of the third current source is externally connected with a power supply voltage, the other end is connected with an emitter of the seventh triode and a base of the sixth triode, one end of the fourth current source is externally connected with a power supply negative voltage, the other end is connected with an emitter of the eighth triode and a base of the eleventh triode, the emitters of the third triode and the fifth triode are externally connected with power supply voltage, the collectors of the third triode and the fifth triode are respectively connected with the collectors of the fourth triode and the sixth triode, the emitters of the thirteenth triode and the twelfth triode are externally connected with negative voltage, the collectors of the thirteenth triode and the twelfth triode are respectively connected with the collectors of the ninth triode and the eleventh triode, the bases of the thirteenth triode and the twelfth triode are connected, the collectors of the thirteenth triode are communicated with the base, the first resistor and the second resistor are connected in series, one end of the first resistor and one end of the second resistor are connected with the emitters of the fourth triode and the ninth triode, the other end of the first resistor and the second resistor are connected with the emitters of the sixth triode and the emitters of the eleventh triode, the bases of the first triode, the second triode, the seventh triode and the eighth triode are externally connected with input signal voltage, the first, third, fifth, seventh, ninth and eleventh triodes are PNP triodes, the second, fourth, sixth, eighth, tenth and twelfth triodes are NPN triodes, the current values of the first, second, third and fourth current sources are the same, the collector external power supply of the first triode is negative voltage, the collector external power supply of the second triode is negative voltage, the collector external power supply of the seventh triode is negative voltage, and the collector external power supply of the eighth triode is negative voltage.
CN201910411441.3A 2019-05-17 2019-05-17 Gain circuit based on ultra-high definition video signal processing Active CN110191254B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101394157A (en) * 2007-09-18 2009-03-25 三星电机株式会社 Variable gain amplifier having wide gain variation and wide bandwidth
JP5469222B1 (en) * 2012-09-27 2014-04-16 日本電信電話株式会社 Differential amplifier connection circuit and differential amplifier circuit
US8724355B1 (en) * 2011-03-11 2014-05-13 Anadigics, Inc. Multistage amplification and high dynamic range rectification circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100499858B1 (en) * 2002-12-10 2005-07-08 한국전자통신연구원 Variable gain amplifier

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101394157A (en) * 2007-09-18 2009-03-25 三星电机株式会社 Variable gain amplifier having wide gain variation and wide bandwidth
US8724355B1 (en) * 2011-03-11 2014-05-13 Anadigics, Inc. Multistage amplification and high dynamic range rectification circuit
JP5469222B1 (en) * 2012-09-27 2014-04-16 日本電信電話株式会社 Differential amplifier connection circuit and differential amplifier circuit

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