CN110187529A - Display panel processing method and display panel processing system - Google Patents
Display panel processing method and display panel processing system Download PDFInfo
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- CN110187529A CN110187529A CN201910428876.9A CN201910428876A CN110187529A CN 110187529 A CN110187529 A CN 110187529A CN 201910428876 A CN201910428876 A CN 201910428876A CN 110187529 A CN110187529 A CN 110187529A
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- display panel
- cabling
- input terminal
- orientation
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1306—Details
- G02F1/1309—Repairing; Testing
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0421—Structural details of the set of electrodes
- G09G2300/0426—Layout of electrodes and connections
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Nonlinear Science (AREA)
- Liquid Crystal (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The present invention provides a kind of display panel processing method and display panel processing system, the display panel processing method, for handling multiple display panels, each display panel includes array basal plate, array substrate is equipped with color membrane substrates public electrode cabling, this method comprises: successively obtaining the resistance value of color membrane substrates public electrode cabling in each array substrate, and judge whether the resistance value is less than predetermined resistance value;Such as less than predetermined resistance value then sets target display panel for the corresponding display panel of array substrate;To color membrane substrates public electrode cabling input high level signal, judge whether multiple display panels occur orientation exception;Orientation exception such as occurs, then disconnects cabling input terminal corresponding in target display panel.The program is by cabling input terminal corresponding in target display panel being disconnected, other display panels is avoided to be damaged when orientation exception occurring for multiple display panels.
Description
Technical field
The present invention relates to field of display technology, more particularly to a kind of display panel processing method and display panel processing system
System.
Background technique
Liquid crystal display panel generally comprises a colored filter (Color Filter, CF) substrate, array basal plate, and
The liquid crystal layer of configuration between.Liquid crystal display panel includes multiple systems such as array process, panel processing procedure and module processing procedure
Journey.After each processing procedure, liquid crystal display panel internal circuit can be detected, such as find the problem, then repaired.
Wherein, in panel processing procedure, CF-COM (color membrane substrates public electrode) cabling in liquid crystal display panel may
Short circuit occurs, it is abnormal to lead to panel liquid crystal orientation, and other panels around the panel is made to be damaged, LCD alignment also occurs
It is abnormal.
Therefore, it is necessary to the liquid crystal display panel that the short circuit of CF-COM cabling occurs is handled, to avoid it to other faces
The damage of plate.
Summary of the invention
The purpose of the present invention is to provide a kind of display panel processing method and display panel processing systems, improve display
The yield of panel.
The embodiment of the invention provides a kind of display panel processing methods, for handling multiple display panels, often
One display panel includes array basal plate, and the array substrate is equipped with color membrane substrates public electrode cabling, which comprises
The resistance value of color membrane substrates public electrode cabling in each array substrate is successively obtained, and judges the resistance value
Whether predetermined resistance value is less than;
Such as less than predetermined resistance value then sets the target display surface for the corresponding display panel of the array substrate
Plate;
To the color membrane substrates public electrode cabling input high level signal, judge whether the multiple display panel occurs
Orientation is abnormal;
Orientation exception such as occurs, then disconnects cabling input terminal corresponding in the target display panel.
In one embodiment, described as abnormal in orientation occurs, then by cabling input terminal corresponding in the target display panel
Break step, comprising: it is as abnormal in orientation occurs, whole cabling input terminals in the target display panel in array substrate are broken
It opens.
In one embodiment, described as abnormal in orientation occurs, then by cabling input terminal corresponding in the target display panel
Break step, comprising: orientation is abnormal as occurred, and the low level signal line input terminal in the target display panel is disconnected.
In one embodiment, described as abnormal in orientation occurs, then by cabling input terminal corresponding in the target display panel
Break step, comprising: orientation is abnormal as occurred, and the high level signal line input terminal in the target display panel is disconnected.
It is in one embodiment, described by cabling input terminal break step corresponding in the target display panel, comprising:
Determine the target cabling that short circuit occurs in the target display panel with the color membrane substrates public electrode cabling;
The input terminal of the target cabling is disconnected.
The embodiment of the invention also provides a kind of display panel processing systems comprising:
Multiple display panels, each display panel include array basal plate, and it is public that the array substrate is equipped with color membrane substrates
Common electrode cabling;
Display panel processing unit includes:
Detection module, for successively obtaining the resistance value of color membrane substrates public electrode cabling in each array substrate, and
Judge whether the resistance value is less than preset resistance;
Setup module, for setting institute for the corresponding display panel of the array substrate when being less than predetermined resistance value
State target display panel;
Judgment module, for judging the multiple aobvious to the color membrane substrates public electrode cabling input high level signal
Show whether panel occurs orientation exception;
Module is disconnected, for when orientation exception occurs, cabling input terminal corresponding in the target display panel to be disconnected.
In one embodiment, the disconnection module includes the first disconnection submodule, is used for when orientation exception occurs, by institute
Whole cabling input terminals in target display panel in array substrate are stated to disconnect.
In one embodiment, the disconnection module includes the second disconnection submodule, is used for institute when orientation exception occurs
The low level signal line input terminal stated in target display panel disconnects.
In one embodiment, the disconnection module includes that third disconnects submodule, is used for when orientation exception occurs, by institute
The high level signal line input terminal stated in target display panel disconnects.
In one embodiment, disconnecting module includes the 4th disconnection submodule, described in determining when orientation exception occurs
The target cabling of short circuit occurs in target display panel with the color membrane substrates public electrode cabling;By the defeated of the target cabling
Enter end to disconnect.
The display panel processing method and display panel processing system of the embodiment of the present invention, by being sent out in multiple display panels
When raw orientation exception, cabling input terminal corresponding in target display panel is disconnected, other display panels is avoided to be damaged.
For above content of the invention can be clearer and more comprehensible, preferred embodiment is cited below particularly, and cooperate institute's accompanying drawings, makees
Detailed description are as follows:
Detailed description of the invention
Fig. 1 is the flow diagram of display panel processing method provided in an embodiment of the present invention.
Fig. 2 is the schematic diagram of a scenario of display panel processing method provided in an embodiment of the present invention.
Fig. 3 is that whole cablings of display panel processing method provided in an embodiment of the present invention disconnect schematic diagram.
Fig. 4 is another schematic diagram of a scenario of display panel processing method provided in an embodiment of the present invention.
Fig. 5 is that the low level signal line of display panel processing method provided in an embodiment of the present invention disconnects schematic diagram.
Fig. 6 is that the high level signal line of display panel processing method provided in an embodiment of the present invention disconnects schematic diagram.
Fig. 7 is that schematic diagram is simulated in the electrostatic breakdown of display panel processing method provided in an embodiment of the present invention.
Specific embodiment
The explanation of following embodiment is to can be used to the particular implementation of implementation to illustrate the present invention with reference to additional schema
Example.The direction term that the present invention is previously mentioned, such as "upper", "lower", "front", "rear", "left", "right", "inner", "outside", " side "
Deng being only the direction with reference to annexed drawings.Therefore, the direction term used be to illustrate and understand the present invention, rather than to
The limitation present invention.
The similar unit of structure is to be given the same reference numerals in the figure.
Referenced herein " embodiment " is it is meant that a particular feature, structure, or characteristic described can wrap in conjunction with the embodiments
Containing at least one embodiment of the present invention.Each position in the description occur the phrase might not each mean it is identical
Embodiment, nor the independent or alternative embodiment with other embodiments mutual exclusion.Those skilled in the art explicitly and
Implicitly understand, embodiment described herein can be combined with other embodiments.
Fig. 1 is please referred to, Fig. 1 is the flow diagram of display panel processing method provided in an embodiment of the present invention.The display
Panel processing method is for handling multiple display panels.
As shown in Fig. 2, each display panel 1 includes array basal plate 11, a color membrane substrates 12, and it is clipped in therebetween
Liquid crystal layer 13.Wherein, array substrate 11 is equipped with a large amount of cablings, for example red pixel cabling, blue pixel cabling, green pixel are walked
Line, color membrane substrates public electrode cabling, array substrate public electrode cabling, LCD Controlling cabling and clock cabling etc..
Above-mentioned cabling all has respective input terminal, as shown in figure 3, specifically including the input terminal R of red pixel cabling, blue picture
The input terminal B of plain cabling, the input terminal G of green pixel cabling, color membrane substrates public electrode cabling input terminal CFcom, array base
Plate public electrode cabling input terminal Acom, LCD Controlling cabling input terminal LC1, LCD Controlling cabling input terminal LC2 and clock
A variety of input terminals such as cabling input terminal CK.
Step S101, successively obtains the resistance value of color membrane substrates public electrode cabling in each array substrate, and judges
Whether resistance value is less than predetermined resistance value.
In the processing procedure of display panel 1, by the way that above-mentioned input terminal input voltage, the liquid crystal in liquid crystal layer 13 can revolve
Turn to form pre-tilt angle, realizes LCD alignment.The voltage of different cabling inputs is different, in case of crosstalk, will cause LCD alignment
It is abnormal.
Wherein, if short circuit occurs for color membrane substrates public electrode cabling and other cablings, it will cause color membrane substrates common electrical
Electric voltage exception on the cabling of pole causes the display panel that orientation occurs abnormal.
Further, it in display panel 1-6 as shown in Figure 4, if orientation exception occurs for display panel 6, shows
The case where panel 6 does not work appearance point, the display panel 5 around display panel 6 can only see pixel profile, display panel
4 will appear slight dark line.The display panel of orientation exception occurs, surrounding display panel also will receive damage.
To sum up, before display panel processing procedure, it is necessary to carry out the short circuit of color membrane substrates public electrode cabling to array substrate
Detection.
It should be noted that if the color membrane substrates public electrode cabling generation in a display panel in array substrate is short
Road, resistance value can become smaller.It therefore, can be by successively examining in the array substrate detection process before display panel processing procedure
Survey whether color membrane substrates public electrode trace resistances value in each array substrate is less than predetermined resistance value, tentatively to judge the coloured silk
Whether ilm substrate public electrode cabling occurs short circuit.
Before and after predetermined resistance value can be according to multiple short-circuit test, the variation of color membrane substrates public electrode trace resistances value,
It is configured, is not specifically limited in the present embodiment.Since predetermined resistance value is not unique standard value, it can be considered that
Color membrane substrates public electrode cabling has the array substrate of small resistance value, has larger possibility hair in display panel processing procedure
Raw orientation is abnormal.
Step S102, such as less than predetermined resistance value then set target display surface for the corresponding display panel of array substrate
Plate.
Such as less than predetermined resistance value, then it is assumed that orientation exception may occur for the corresponding display panel of the array substrate, therefore
It is set to target display panel.If orientation exception, Ke Yiyou has occurred when the subsequent progress orientation to multiple display panels
First the target display panel is handled.
Step S103 judges whether multiple display panels are sent out to color membrane substrates public electrode cabling input high level signal
Raw orientation is abnormal.
As shown in Fig. 2, display panel 1 further includes the first metal layer 14, second metal layer 15 and third metal layer 16.Pass through
Above-mentioned metal layer is patterned, above-mentioned all kinds of cablings can be formed.Wherein, the first metal layer 14 and second metal layer 15 are set
It sets in array substrate, there is therebetween insulating layer 17.There is anisotropy between second metal layer 15 and third metal layer 16
Conducting resinl 18.Wherein, high level signal is transmitted positioned at the cabling of the first metal layer 14, the cabling positioned at second metal layer 15 transmits
Low level signal.Color membrane substrates public electrode cabling is formed on the first metal layer 14, i.e., color membrane substrates public electrode cabling is answered
Transmit high level signal.Third metal layer 16 is arranged on color membrane substrates 12.Wherein, third metal layer 16 includes first area
161 and second area 162.Cabling positioned at first area 161 is used for transmission high level signal, positioned at walking for second area 162
Line is used for transmission low level signal.
When breakage occurs for insulating layer 17, color membrane substrates public electrode cabling connects with the cabling being located in second metal layer 15
It connects, short circuit occurs.Then the high level signal of color membrane substrates public electrode cabling transmission will be conveyed to walking in second metal layer 15
Cabling on line, 16 second area 162 of third metal layer causes signal cross-talk, and it is abnormal that orientation occurs.
To sum up, after color membrane substrates public electrode cabling input high level signal, if breakage, three layers of gold occur for insulating layer 17
Crosstalk will occur for the signal belonged between layer, cause LCD alignment in liquid crystal layer 13 abnormal, i.e., corresponding display panel and its surrounding
Orientation exception can occur for display panel.
Step S104 such as occurs orientation exception, then disconnects cabling input terminal corresponding in target display panel.
Such as occur orientation exception, can quickly navigate to may occur the cabling short circuit of color membrane substrates public electrode target show
Show panel.Again by turning off processing to cabling input terminal corresponding in the target display panel, to avoid it to other displays
Panel damages.Specifically, carrying out laser to all film layers deposited at bad position in array substrate with high energy laser
Heating and gasifying removal.
In one embodiment, it can first determine in target display panel and short circuit occurs with color membrane substrates public electrode cabling
Target cabling.Then directly the input terminal of target cabling is disconnected.
In one embodiment, it can need to break to determine according to common color membrane substrates public electrode cabling short-circuit conditions
The signal wire opened.As shown in figure 5, the low level signal line Low input terminal in target display panel can be disconnected.Or such as Fig. 6
It is shown, the high level signal line high input terminal in target display panel can be disconnected.
For example, when Pad_M1_L signal wire generation on color membrane substrates public electrode wire CFCOM_M2_H and array substrate
It, can be with when short circuit occurs for Pad_M2_L signal wire in short circuit or color membrane substrates public electrode wire CFCOM_M1_H and array substrate
Low level signal line input terminal in target display panel is disconnected, it can be ensured that high level signal is unimpeded, and other display surfaces
Plate is not damaged evil.
It in one embodiment, as shown by the dotted line in fig. 3, can also be by the whole in target display panel in array substrate
Cabling input terminal disconnects.
Next, doing experimental verification to above-mentioned display panel processing method.As shown in fig. 7, to display panel 5 and display surface
Plate 8 is simulation electrostatic breakdown ESD respectively.Color membrane substrates public electrode all occurs for display panel 5 and display panel 8 after ESD
Cabling short circuit.Wherein, display panel 5 does not process, and display panel 8 is processed using above-mentioned method for disconnection process.Such as Fig. 4 institute
Show, the display panel 5 around display panel 6 can only see that pixel profile, display panel 4 will appear slight dark line.And
The all normal display of display panel 7,9,10 around display panel 8, is not affected by damage.That is, the display of the embodiment of the present invention
Panel processing method can effectively avoid other display panels from being damaged.
The display panel processing method and display panel processing system of the embodiment of the present invention, by being sent out in multiple display panels
When raw orientation exception, cabling input terminal corresponding in target display panel is disconnected, other display panels is avoided to be damaged.
In conclusion although the present invention has been disclosed above in the preferred embodiment, but above preferred embodiment is not to limit
The system present invention, those skilled in the art can make various changes and profit without departing from the spirit and scope of the present invention
Decorations, therefore protection scope of the present invention subjects to the scope of the claims.
Claims (10)
1. a kind of display panel processing method, for handling multiple display panels, each display panel includes an array
Substrate, the array substrate are equipped with color membrane substrates public electrode cabling, which is characterized in that the described method includes:
The resistance value of color membrane substrates public electrode cabling in each array substrate is successively obtained, and whether judges the resistance value
Less than predetermined resistance value;
Such as less than predetermined resistance value then sets the target display panel for the corresponding display panel of the array substrate;
To the color membrane substrates public electrode cabling input high level signal, judge whether the multiple display panel occurs orientation
It is abnormal;
Orientation exception such as occurs, then disconnects cabling input terminal corresponding in the target display panel.
2. display panel processing method according to claim 1, which is characterized in that it is described as abnormal in orientation occurs, then will
Corresponding cabling input terminal break step in the target display panel, comprising: it is as abnormal in orientation occurs, by the target display surface
Whole cabling input terminals in plate in array substrate disconnect.
3. display panel processing method according to claim 1, which is characterized in that it is described as abnormal in orientation occurs, then will
Corresponding cabling input terminal break step in the target display panel, comprising: it is as abnormal in orientation occurs, by the target display surface
Low level signal line input terminal in plate disconnects.
4. display panel processing method according to claim 1, which is characterized in that it is described as abnormal in orientation occurs, then will
Corresponding cabling input terminal break step in the target display panel, comprising: it is as abnormal in orientation occurs, by the target display surface
High level signal line input terminal in plate disconnects.
5. display panel processing method according to claim 1, which is characterized in that it is described will be in the target display panel
Corresponding cabling input terminal break step, comprising:
Determine the target cabling that short circuit occurs in the target display panel with the color membrane substrates public electrode cabling;
The input terminal of the target cabling is disconnected.
6. a kind of display panel processing system characterized by comprising
Multiple display panels, each display panel include array basal plate, and the array substrate is equipped with color membrane substrates common electrical
Pole cabling;
Display panel processing unit includes:
Detection module for successively obtaining the resistance value of color membrane substrates public electrode cabling in each array substrate, and judges
Whether the resistance value is less than preset resistance;
Setup module, for setting the mesh for the corresponding display panel of the array substrate when being less than predetermined resistance value
Mark display panel;
Judgment module, for judging the multiple display surface to the color membrane substrates public electrode cabling input high level signal
Whether plate occurs orientation exception;
Module is disconnected, for when orientation exception occurs, cabling input terminal corresponding in the target display panel to be disconnected.
7. display panel processing system according to claim 6, which is characterized in that the disconnection module includes the first disconnection
Submodule, for when orientation exception occurs, whole cabling input terminals in the target display panel in array substrate to be broken
It opens.
8. display panel processing system according to claim 6, which is characterized in that the disconnection module includes the second disconnection
Submodule, for disconnecting the low level signal line input terminal in the target display panel when orientation exception occurs.
9. display panel processing system according to claim 6, which is characterized in that the disconnection module includes that third disconnects
Submodule, for when orientation exception occurs, the high level signal line input terminal in the target display panel to be disconnected.
10. display panel processing system according to claim 6, which is characterized in that disconnecting module includes the 4th disconnection
Module is sent out for when orientation exception occurs, determining in the target display panel with the color membrane substrates public electrode cabling
The target cabling of raw short circuit;The input terminal of the target cabling is disconnected.
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CN201910428876.9A CN110187529A (en) | 2019-05-22 | 2019-05-22 | Display panel processing method and display panel processing system |
PCT/CN2019/108466 WO2020232944A1 (en) | 2019-05-22 | 2019-09-27 | Display panel processing method and display panel processing system |
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CN201910428876.9A CN110187529A (en) | 2019-05-22 | 2019-05-22 | Display panel processing method and display panel processing system |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020232944A1 (en) * | 2019-05-22 | 2020-11-26 | 深圳市华星光电半导体显示技术有限公司 | Display panel processing method and display panel processing system |
CN116559561A (en) * | 2023-05-08 | 2023-08-08 | 苏州英瑞传感技术有限公司 | State evaluation method, controller and monitoring system of experimental production verification equipment |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN118226323A (en) * | 2024-04-10 | 2024-06-21 | 禹创半导体(深圳)有限公司 | Panel wiring detection method, device, equipment and readable storage medium |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102221753A (en) * | 2011-06-06 | 2011-10-19 | 深圳市华星光电技术有限公司 | Method and device for detecting pixel array |
US20110310342A1 (en) * | 2010-06-16 | 2011-12-22 | Dong-Wook Kim | Mother panel of liquid crystal display and method of manufacturing liquid crystal display using the same |
CN102566130A (en) * | 2012-03-02 | 2012-07-11 | 深圳市华星光电技术有限公司 | Manufacturing method and device for liquid crystal panel |
CN103293771A (en) * | 2013-06-26 | 2013-09-11 | 深圳市华星光电技术有限公司 | Liquid crystal alignment detecting machine and method |
CN106054474A (en) * | 2016-05-27 | 2016-10-26 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and liquid crystal display panel circuit monitoring method |
CN108873406A (en) * | 2018-06-26 | 2018-11-23 | 深圳市华星光电半导体显示技术有限公司 | The production method of liquid crystal display panel and liquid crystal display panel |
CN109491115A (en) * | 2019-01-15 | 2019-03-19 | 深圳市华星光电技术有限公司 | Integrated coloured silk membranous type array substrate restorative procedure |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110187529A (en) * | 2019-05-22 | 2019-08-30 | 深圳市华星光电半导体显示技术有限公司 | Display panel processing method and display panel processing system |
-
2019
- 2019-05-22 CN CN201910428876.9A patent/CN110187529A/en active Pending
- 2019-09-27 WO PCT/CN2019/108466 patent/WO2020232944A1/en active Application Filing
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110310342A1 (en) * | 2010-06-16 | 2011-12-22 | Dong-Wook Kim | Mother panel of liquid crystal display and method of manufacturing liquid crystal display using the same |
CN102221753A (en) * | 2011-06-06 | 2011-10-19 | 深圳市华星光电技术有限公司 | Method and device for detecting pixel array |
CN102566130A (en) * | 2012-03-02 | 2012-07-11 | 深圳市华星光电技术有限公司 | Manufacturing method and device for liquid crystal panel |
CN103293771A (en) * | 2013-06-26 | 2013-09-11 | 深圳市华星光电技术有限公司 | Liquid crystal alignment detecting machine and method |
CN106054474A (en) * | 2016-05-27 | 2016-10-26 | 深圳市华星光电技术有限公司 | Liquid crystal display panel and liquid crystal display panel circuit monitoring method |
CN108873406A (en) * | 2018-06-26 | 2018-11-23 | 深圳市华星光电半导体显示技术有限公司 | The production method of liquid crystal display panel and liquid crystal display panel |
CN109491115A (en) * | 2019-01-15 | 2019-03-19 | 深圳市华星光电技术有限公司 | Integrated coloured silk membranous type array substrate restorative procedure |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020232944A1 (en) * | 2019-05-22 | 2020-11-26 | 深圳市华星光电半导体显示技术有限公司 | Display panel processing method and display panel processing system |
CN116559561A (en) * | 2023-05-08 | 2023-08-08 | 苏州英瑞传感技术有限公司 | State evaluation method, controller and monitoring system of experimental production verification equipment |
CN116559561B (en) * | 2023-05-08 | 2024-04-26 | 苏州英瑞传感技术有限公司 | State evaluation method, controller and monitoring system of experimental production verification equipment |
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