CN110176406B - Defect detection method of metal silicide and formation method of semiconductor structure - Google Patents

Defect detection method of metal silicide and formation method of semiconductor structure Download PDF

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CN110176406B
CN110176406B CN201910508368.1A CN201910508368A CN110176406B CN 110176406 B CN110176406 B CN 110176406B CN 201910508368 A CN201910508368 A CN 201910508368A CN 110176406 B CN110176406 B CN 110176406B
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metal silicide
substrate
material layer
dielectric
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CN110176406A (en
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胡航标
周伦潮
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Wuhan Xinxin Semiconductor Manufacturing Co Ltd
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Wuhan Xinxin Semiconductor Manufacturing Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/24—Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change

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Abstract

The invention provides a defect detection method of metal silicide and a forming method of a semiconductor structure, which comprises the steps of providing a substrate and a metal silicide layer covering part of the substrate, then forming a dielectric layer on the substrate, wherein the dielectric layer covers the substrate and the metal silicide layer and exposes the surface of the metal silicide layer so as to insulate the regions except the metal silicide layer, then bombarding the metal silicide layer by adopting electron beams, and obtaining the defect condition of the metal silicide layer according to the concentration distribution of secondary electrons escaping from the metal silicide layer, thereby quantitatively detecting the defects of the metal silicide layer and improving the defect detection precision, and the defect detection method of the metal silicide is carried out in the forming process of the semiconductor structure, can react out the defect condition of the metal silicide in real time and on line, and does not disturb the normal preparation process of a semiconductor device, the extra working procedure is not added, and the detection cost and time can be reduced.

Description

Defect detection method of metal silicide and formation method of semiconductor structure
Technical Field
The invention relates to the technical field of semiconductor preparation, in particular to a defect detection method of metal silicide and a forming method of a semiconductor structure.
Background
A metal silicide is a thermally stable metal compound that is formed by the reaction of a transition metal with silicon. Metal silicides have been widely used in semiconductor device processing due to their advantages of low resistivity and high thermal stability, particularly in current silicon processing. In particular, the metal silicide layer formed on the surfaces of the gate electrode and the source/drain regions may effectively reduce the resistivity (specific resistance) of the gate electrode and the contact resistance (contact resistance) of the source/drain.
However, due to factors such as the grain size of the transition metal or the oxide residue on the surface of the substrate, defects may be generated in the growth of the metal silicide, and such defects are not physical defects (defects generated due to process conditions, machine parameters, and the like), and the defects of the metal silicide cannot be effectively detected by the conventional defect detection equipment. The existing defect detection method of the metal silicide generally selects a plurality of detection points on the metal silicide, then takes a picture at a fixed point through a machine, and then observes whether the metal silicide generates defects or not from the picture, but the defect detection method can only qualitatively judge whether the metal silicide generates the defects or not, and can not quantitatively analyze the quantity and the position distribution of the defects, and because only the limited detection points are selected on the metal silicide, the existing defect detection method can not effectively reflect the defect condition on the surface of the whole metal silicide, thereby causing the defect detection of the metal silicide to be inaccurate.
Disclosure of Invention
The invention aims to provide a defect detection method of metal silicide and a forming method of a semiconductor structure, which aim to solve the problem of low defect detection precision of the existing metal silicide.
In order to achieve the above object, the present invention provides a method for detecting defects of metal silicide, comprising:
providing a substrate and a metal silicide layer covering a part of the substrate;
forming a dielectric layer on the substrate, wherein the dielectric layer covers the substrate and the metal silicide layer and exposes the surface of the metal silicide layer;
and bombarding the metal silicide layer by adopting an electron beam, and obtaining the defect condition of the metal silicide layer according to the concentration distribution of secondary electrons escaping from the metal silicide layer.
Optionally, the forming the dielectric layer on the substrate, where the dielectric layer exposes the surface of the metal silicide layer, includes:
forming a dielectric material layer on the substrate, wherein the dielectric material layer covers the substrate and the metal silicide layer;
and thinning the dielectric material layer until the surface of the metal silicide layer is exposed, wherein the residual dielectric material layer forms the dielectric layer.
Optionally, a plurality of source regions and a plurality of drain regions are formed in the substrate, the source regions and the drain regions are arranged at intervals, a gate structure is further formed on the substrate between the source region and the drain region, and the metal silicide layer covers the gate structure, the source region and the drain region.
Optionally, the material of the metal silicide layer includes one or more of titanium silicide, cobalt silicide, nickel silicide, or molybdenum silicide.
The invention also provides a method for forming the semiconductor structure, which comprises the following steps:
providing a substrate, wherein a metal silicide layer and a plurality of gate structures are formed on the substrate, and the metal silicide layer covers the tops of the gate structures;
forming a dielectric layer on the substrate, wherein the dielectric layer covers the substrate and the grid structure and exposes the surface of the metal silicide layer;
and bombarding the metal silicide layer by adopting an electron beam, and obtaining the defect condition of the metal silicide layer according to the concentration distribution of secondary electrons escaping from the metal silicide layer.
Optionally, before forming the dielectric layer on the substrate, the method for forming the semiconductor structure further includes:
sequentially forming an anti-reflection material layer and a protective material layer on the substrate, wherein the anti-reflection material layer and the protective material layer cover the substrate and the top surface and the side surface of the gate structure;
forming a dielectric material layer on the substrate, wherein the dielectric material layer covers the protective material layer;
and thinning the dielectric material layer, the protective material layer and the anti-reflection material layer until the surface of the metal silicide layer is exposed, wherein the residual dielectric material layer forms the dielectric layer, and the residual protective material layer and the residual anti-reflection material layer respectively form a protective layer and an anti-reflection layer.
Optionally, the anti-reflection layer includes silicon oxynitride, the protective layer includes silicon nitride, and the dielectric layer includes silicon oxide.
Optionally, the dielectric material layer is formed by high-density plasma chemical vapor deposition.
Optionally, source regions and drain regions arranged at intervals are further formed in the substrate on two sides of the gate structure, and the metal silicide layer further covers the source regions and the drain regions.
Optionally, before bombarding the metal silicide layer with an electron beam, the method for forming the semiconductor structure further includes:
and etching the dielectric layer to form a plurality of openings, wherein the bottom of each opening exposes the metal silicide layer on the source region and the drain region.
The main component of the defect of the metal silicide is oxide, the conductivity of the oxide is not good, and the metal silicide has good conductivity, that is, the conductivity of the part of the metal silicide where the defect is not generated is stronger than that of the defect, if the electron beam is used for bombarding the metal silicide, the part of the metal silicide where the defect is not generated can generate more secondary electrons due to the difference of the conductivity, so that the concentration distribution of the secondary electrons escaping from the metal silicide can qualitatively reflect whether the metal silicide generates the defect and the position distribution of the defect.
Based on this, in the method for detecting defects of metal silicide and the method for forming a semiconductor structure provided by the present invention, a substrate and a metal silicide layer covering a part of the substrate are provided, then a dielectric layer is formed on the substrate, then electron beams are adopted to bombard the metal silicide layer, and the defect condition of the metal silicide layer is obtained according to the concentration distribution of secondary electrons escaping from the metal silicide layer, because the dielectric layer covers the substrate and the metal silicide layer and exposes the surface of the metal silicide layer, the regions except the metal silicide layer are insulated, the secondary electrons escaping when electron beams are adopted for bombardment are few, a 'dark' background can be provided for the defect detection signal of the metal silicide layer, so that the concentration distribution of the secondary electrons escaping from the metal silicide layer can be visually observed, and the position and the number of the defects can be accurately obtained, the defect detection method of the metal silicide can be carried out in the formation process of the semiconductor structure, the defect condition of the metal silicide can be reflected on line in real time, the normal preparation process of a semiconductor device can not be disturbed, extra processes can not be added, the detection cost and time can be reduced, and the generation of large quantities of defective products can be avoided.
Drawings
FIG. 1 is a flowchart of a method for detecting defects in a metal silicide according to an embodiment of the present invention;
FIG. 2 is a flow chart of a method of forming a semiconductor structure according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a metal silicide layer and a plurality of gate structures formed on a substrate according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of an anti-reflective material layer, a protective material layer, and a dielectric material layer sequentially formed on a substrate according to an embodiment of the present invention;
FIG. 5 is a schematic structural diagram of a method for forming a reflective layer, a protective layer and a dielectric layer by polishing to thin an anti-reflective material layer, a protective material layer and a dielectric material layer according to an embodiment of the present invention;
FIG. 6 is a schematic structural diagram illustrating an opening formed in a dielectric layer according to an embodiment of the present invention;
wherein the reference numerals are:
10-a substrate; an S-source region; a D-drain region;
20-a gate structure; 21-a gate oxide layer; 22-floating gate polysilicon layer; 23-a gate dielectric layer; 24-a control gate polysilicon layer; 25-side walls;
30-a metal silicide layer;
40-a layer of antireflective material; 41-an anti-reflection layer;
50-a layer of protective material; 51-a protective layer;
60-a layer of dielectric material; 61-a dielectric layer;
70-opening.
Detailed Description
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
As shown in fig. 1, the present embodiment provides a method for detecting defects of a metal silicide, including:
s11: providing a substrate and a metal silicide layer covering a part of the substrate;
s21: forming a dielectric layer on the substrate, wherein the dielectric layer covers the substrate and the metal silicide layer and exposes the surface of the metal silicide layer;
s31: and bombarding the metal silicide layer by adopting an electron beam, and obtaining the defect condition of the metal silicide layer according to the concentration distribution of secondary electrons escaping from the metal silicide layer.
Specifically, the method for detecting defects of metal silicide provided in this embodiment may be applied to a method for forming a semiconductor structure, such as a semiconductor structure generated in a process of forming a memory device, as shown in fig. 2, where the method for forming a semiconductor structure includes:
s21: providing a substrate, wherein a metal silicide layer and a plurality of gate structures are formed on the substrate, and the metal silicide layer covers the tops of the gate structures;
s22: forming a dielectric layer on the substrate, wherein the dielectric layer covers the substrate and the grid structure and exposes the surface of the metal silicide layer;
s23: and bombarding the metal silicide layer by adopting an electron beam, and obtaining the defect condition of the metal silicide layer according to the concentration distribution of secondary electrons escaping from the metal silicide layer.
Specifically, referring to fig. 3 to 6, which are schematic cross-sectional views of a device structure formed by the method for forming a semiconductor structure, the method for detecting a defect of a metal silicide and the method for forming a semiconductor structure provided in the present embodiment will be described in detail with reference to fig. 3 to 6.
First, referring to fig. 3, a substrate 10 is provided, where the substrate 10 may be a silicon substrate, a germanium-silicon substrate, a gallium arsenide substrate, or a silicon-on-insulator substrate, and the like, a plurality of source regions S and a plurality of drain regions D are formed in the substrate 10, the source regions S and the drain regions D are arranged at intervals, and a trench isolation structure (not shown) for isolating an active region is also formed in the substrate 10, and the invention is not limited thereto. A plurality of discrete gate structures 20 are formed on the substrate 10, each of the gate structures 20 is located on the substrate 10 between the source region S and the drain region D, in this embodiment, the gate structure 20 includes a gate oxide layer 21, a floating gate polysilicon layer 22, a gate dielectric layer 23, a control gate polysilicon layer 24 and a sidewall 25, the gate oxide layer 21, the floating gate polysilicon layer 22, the gate dielectric layer 23 and the control gate polysilicon layer 24 are sequentially overlapped to form a stacked body, the sidewall 25 is located on a sidewall of the stacked body, optionally, the gate dielectric layer 23 is located between the floating gate polysilicon layer 22 and the control gate polysilicon layer 24, optionally, the gate dielectric layer 23 may be silicon oxide, which has a small thickness (less than 100nm) and is usually an ONO structure (stacked body of silicon oxide-silicon nitride-silicon oxide), which plays a role of isolating the floating gate polysilicon layer 22 from the control gate polysilicon layer 24, the sidewall 25 is used to protect the floating gate polysilicon layer 22 and the control gate polysilicon layer 24, so as to prevent external dark current intrusion or other intrusions.
A metal silicide layer 30 is formed on the top of the gate structure 20 (on the surface of the control gate polysilicon layer 24) and on the source region S and the drain region D, that is, the metal silicide layer 30 covers the top of the gate structure 20 and the surfaces of the source region S and the drain region D, in this embodiment, the material of the metal silicide layer 30 is cobalt silicide (CoSi)2) In other embodiments, the material of the metal silicide layer 30 may also be titanium silicide (TiSi)2) Nickel silicide (NiSi)2) Molybdenum silicide (MoSi)2) Platinum silicide (PtSi)2) Tantalum silicide (TaSi)2) Tungsten silicide (WSi)2) And the like. In this embodiment, the steps of forming the metal silicide layer 30 are: firstly depositing a metal cobalt layer and a titanium nitride (TiN) layer covering the metal cobalt layer on the whole substrate 10, and then carrying out high-temperature annealing treatment (550-700 ℃) to enable the metal cobalt layer to react with silicon in the substrate 10 so as to generate Co on the contact surface of the metal cobalt layer and the substrate 102Si, removing the titanium nitride layer and the cobalt layer which does not participate in the reaction, and finally performing high-temperature annealing treatment again to enable Co to be processed2Conversion of Si to CoSi2Thereby forming the metalA silicide layer 30. Since the other regions of the surface of the substrate 10 except the source region S and the drain region D are covered with silicon oxide and the sidewalls 25 are not reactive with the cobalt metal layer, the metal silicide layer 30 is formed to cover only the source region S, the drain region D and the control gate polysilicon layer 24.
Further, as shown in fig. 4, an anti-reflection material layer 40 and a protection material layer 50 are sequentially deposited on the substrate 10, the anti-reflection material layer 40 and the protection material layer 50 cover the top surface and the side surface of the substrate 1 and the gate structure 20, that is, the anti-reflection material layer 40 and the protection material layer 50 cover the whole substrate 10 and the gate structure 20 (naturally, the metal silicide layer 30 is also covered), and then a dielectric material layer 60 is formed on the substrate 10, and the dielectric material layer 60 covers the protection material layer 50. In this embodiment, the anti-reflective material layer 40 is made of silicon oxynitride, the protective material layer 50 is made of silicon nitride, and the dielectric material layer 60 is made of silicon oxide. The anti-reflective material layer 40 and the protective material layer 50 can be formed by conventional chemical vapor deposition, physical vapor deposition or atomic layer deposition, but the dielectric material layer 60 is formed by a high-density plasma chemical vapor deposition process, so that the formed dielectric material layer 60 is relatively dense and has better stability.
Referring to fig. 5, the dielectric material layer 60, the protective material layer 50 and the anti-reflective material layer 51 are thinned by grinding until the surface of the metal silicide layer 30 is exposed, the remaining dielectric material layer 60 forms the dielectric layer 61, the remaining protective material layer 50 and the remaining anti-reflective material layer 40 respectively form a protective layer 51 and an anti-reflective layer 41, the protective layer 51 and the anti-reflective layer 41 are used for protecting the gate structure 20 in the subsequent process, and the dielectric layer 61 is used for dielectric isolation. In this way, the metal silicide layer 30 on the gate structure 20 is exposed.
Next, as shown in fig. 6, the dielectric layer 61, the protective layer 51 and the anti-reflection layer 41 are etched to form a plurality of openings 70, one opening 70 corresponding to one of the source region S or the drain region D, so that the metal silicide layer 30 on the source region S and the drain region D is exposed at the bottom of the opening 70, and thus the metal silicide layer 30 on the source region S and the drain region D is exposed. It can be understood that, at this time, all regions except the metal silicide layer 30 are covered by the dielectric layer 61, that is, all regions except the metal silicide layer 30 are in an insulated state, when the metal silicide layer 30 and the regions except the metal silicide layer 30 are bombarded by electron beams, the concentration of secondary electrons excited by the regions except the metal silicide layer 30 is far less than that excited by the metal silicide layer 30, and signals scanned by an electron beam scanning process show a difference between "bright" and "dark", that is, the higher the concentration of secondary electrons, the brighter the signal; conversely, the lower the secondary electron concentration, the "darker" the signal. In this way, although all the regions other than the metal silicide layer 30 are insulated, ideally, the signal corresponding to the regions other than the metal silicide layer 30 is "dark" and the signal corresponding to the metal silicide layer 30 is "bright", if there is a defect in the metal silicide layer 30, the region where the "bright" signal should appear is displayed as "dark", and the position distribution and the number of defects in the metal silicide layer 30 can be obtained by observing the "dark" signal in the "bright" signal. In this embodiment, the dielectric layer 61 provides a "dark" background for the defect detection of the metal silicide layer 30, which is beneficial to enhancing the contrast of the defect detection.
Further, referring to fig. 6, after exposing the metal silicide layer 30, the defect detection may be performed on the metal silicide layer 30. Specifically, the electron beam is used to bombard the metal silicide layer 30, since the conductivity of the defect-free portion of the metal silicide layer 30 is stronger than the conductivity of the defect-free portion, if the electron beam is used to bombard the metal silicide layer 30, due to the difference in conductivity, more secondary electrons can be generated at the defect-free portion of the metal silicide layer 30, in this embodiment, the electron beam scanning process is used to scan the metal silicide layer 30 to obtain the concentration distribution of the secondary electrons escaping from the metal silicide layer 30, and the defect condition of the metal silicide layer 30 can be determined according to the concentration distribution of the secondary electrons escaping from the metal silicide layer 30. For example, after the electron beam scanning is performed on the metal silicide layer 30 on the source region S, if the concentration of the secondary electrons escaping from the whole metal silicide layer 30 is uniform, it indicates that the metal silicide layer 30 on the source region S grows better and no defect is generated; if the concentration of the secondary electrons suddenly changes (suddenly decreases) at several positions on the entire metal silicide layer 30, it indicates that the metal silicide layer 30 at the position has a defect, so that the defect condition of the metal silicide layer 30 can be accurately and quantitatively detected.
It can be understood that the defect detection method for metal silicide provided in this embodiment is performed during the formation of the semiconductor structure, and in the normal formation process of the semiconductor structure, in order to form a conductive plug in the subsequent process to lead out the gate structure 20, the source region S, and the drain region D, the protective layer 51, the anti-reflection layer 41, and the dielectric layer 61 also need to be formed.
In this embodiment, the semiconductor structure formed by the method for forming the semiconductor structure may be formed before normal mass production of semiconductor devices, for example: the semiconductor structure is a semiconductor structure generated in the process of forming a memory device, before the memory device is produced in large batch, the semiconductor structure can be formed by adopting the forming method of the semiconductor structure, then the defect detection is carried out on the metal silicide layer of the semiconductor structure, after the defect detection is carried out on the metal silicide layer, if the defect on the metal silicide layer is in the control requirement, the process and the parameter for forming the metal silicide layer in the process of producing the memory device are qualified, and at the moment, the memory device can be produced in large batch; on the contrary, if the defects on the metal silicide layer are not in the control requirement, it is indicated that the process and parameters for forming the metal silicide layer are unqualified in the process of producing the memory device, the machine or parameters need to be debugged again, after the machine or parameters are debugged again, the method for forming the semiconductor structure is executed again until the defects on the metal silicide layer are in the control requirement, the memory device can be produced in large scale, and thus the generation of large-scale defective products can be avoided.
Further, the semiconductor structure provided in this embodiment is a semiconductor structure that may be generated in a production process of a memory device, but it should be understood that the method for detecting defects of metal silicide provided in this embodiment may also be applied to other semiconductor devices, and as long as a metal silicide layer is formed on the semiconductor device and defect detection of metal silicide needs to be performed, defect detection may be performed by using the method for detecting defects of metal silicide provided in this embodiment, which is not illustrated here.
In addition, because the method for forming a semiconductor structure provided in this embodiment does not disturb the normal manufacturing process of the original semiconductor device while reacting the defect condition of the metal silicide in real time and on-line, if necessary, the formed semiconductor structure may be collected, and the next process flow (for example, the process of continuing to execute the conductive plug) may be performed to manufacture the semiconductor structure into a complete semiconductor device. Alternatively, in order to avoid increasing the process cost, the formed semiconductor structure may be directly discarded and not used, which is equivalent to that the semiconductor structure is only used for testing and is not subsequently used for forming a complete semiconductor device.
In summary, in the method for detecting defects of metal silicide and the method for forming a semiconductor structure provided by the embodiments of the present invention, a substrate and a metal silicide layer covering a portion of the substrate are provided, a dielectric layer is formed on the substrate, an electron beam is used to bombard the metal silicide layer, and a defect condition of the metal silicide layer is obtained according to a concentration distribution of secondary electrons escaping from the metal silicide layer, because the dielectric layer covers the substrate and the metal silicide layer and exposes a surface of the metal silicide layer, so that regions other than the metal silicide layer are insulated, the secondary electrons escaping during electron beam bombardment are few, a "dark" background can be provided for a defect detection signal of the metal silicide layer, and thus the concentration distribution of the secondary electrons escaping from the metal silicide layer can be visually observed, the method can be carried out in the formation process of the semiconductor structure, can reflect the defect condition of the metal silicide in real time and on line, can not disturb the normal preparation process of the semiconductor device, can not increase extra processes, can reduce the detection cost and time, and can avoid the generation of large-batch defective products.
The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any way. It will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (9)

1. A defect detection method of metal silicide is characterized by comprising the following steps:
providing a substrate and a metal silicide layer covering a part of the substrate;
forming a dielectric layer on the substrate, wherein the dielectric layer covers the substrate and the metal silicide layer and exposes the surface of the metal silicide layer;
bombarding the metal silicide layer by adopting an electron beam, and obtaining the defect condition of the metal silicide layer according to the concentration distribution of secondary electrons escaping from the metal silicide layer;
before forming the dielectric layer on the substrate, the method for detecting the defects of the metal silicide further comprises the following steps:
sequentially forming an anti-reflection material layer and a protective material layer on the substrate, wherein the anti-reflection material layer and the protective material layer cover the top surface and the side surface of the substrate and the grid structure;
forming a dielectric material layer on the substrate, wherein the dielectric material layer covers the protective material layer;
and thinning the dielectric material layer, the protective material layer and the anti-reflection material layer until the surface of the metal silicide layer is exposed, wherein the residual dielectric material layer forms the dielectric layer, and the residual protective material layer and the residual anti-reflection material layer respectively form a protective layer and an anti-reflection layer.
2. The method of detecting defects in metal silicide as claimed in claim 1, wherein forming the dielectric layer on the substrate, the step of exposing the surface of the metal silicide layer by the dielectric layer comprises:
forming a dielectric material layer on the substrate, wherein the dielectric material layer covers the substrate and the metal silicide layer;
and thinning the dielectric material layer until the surface of the metal silicide layer is exposed, wherein the residual dielectric material layer forms the dielectric layer.
3. The method for detecting defects of metal silicide as claimed in claim 1, wherein a plurality of source regions and a plurality of drain regions are formed in the substrate, the source regions and the drain regions are arranged at intervals, a gate structure is further formed on the substrate between the source regions and the drain regions, and the metal silicide layer covers the gate structure, the source regions and the drain regions.
4. The method for detecting defects in metal silicide of any of claims 1-3, wherein the material of the metal silicide layer comprises one or more of titanium silicide, cobalt silicide, nickel silicide, or molybdenum silicide.
5. A method of forming a semiconductor structure, comprising:
providing a substrate, wherein a metal silicide layer and a plurality of gate structures are formed on the substrate, and the metal silicide layer covers the tops of the gate structures;
forming a dielectric layer on the substrate, wherein the dielectric layer covers the substrate and the grid structure and exposes the surface of the metal silicide layer;
bombarding the metal silicide layer by adopting an electron beam, and obtaining the defect condition of the metal silicide layer according to the concentration distribution of secondary electrons escaping from the metal silicide layer;
before forming the dielectric layer on the substrate, the method for forming the semiconductor structure further includes:
sequentially forming an anti-reflection material layer and a protective material layer on the substrate, wherein the anti-reflection material layer and the protective material layer cover the substrate and the top surface and the side surface of the gate structure;
forming a dielectric material layer on the substrate, wherein the dielectric material layer covers the protective material layer;
and thinning the dielectric material layer, the protective material layer and the anti-reflection material layer until the surface of the metal silicide layer is exposed, wherein the residual dielectric material layer forms the dielectric layer, and the residual protective material layer and the residual anti-reflection material layer respectively form a protective layer and an anti-reflection layer.
6. The method for forming a semiconductor structure according to claim 5, wherein a material of the anti-reflection layer comprises silicon oxynitride, a material of the protective layer comprises silicon nitride, and a material of the dielectric layer comprises silicon oxide.
7. The method of forming a semiconductor structure of claim 5, wherein the dielectric material layer is formed using high density plasma chemical vapor deposition.
8. The method for forming a semiconductor structure according to claim 5, wherein source regions and drain regions are formed in the substrate on two sides of the gate structure, and the metal silicide layer further covers the source regions and the drain regions.
9. The method of forming a semiconductor structure of claim 8, wherein prior to bombarding said metal silicide layer with an electron beam, said method of forming a semiconductor structure further comprises:
and etching the dielectric layer to form a plurality of openings, wherein the bottom of each opening exposes the metal silicide layer on the source region and the drain region.
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