CN110165892A - A kind of mixing capacitor and inductor step-down conversion circuit and implementation method - Google Patents
A kind of mixing capacitor and inductor step-down conversion circuit and implementation method Download PDFInfo
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- CN110165892A CN110165892A CN201910513514.XA CN201910513514A CN110165892A CN 110165892 A CN110165892 A CN 110165892A CN 201910513514 A CN201910513514 A CN 201910513514A CN 110165892 A CN110165892 A CN 110165892A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses a kind of mixing capacitor and inductor step-down conversion circuits, including inductance L1, L2, resistance value is the metal-oxide-semiconductor Q2a of R, Q2b, cathode is connected to metal-oxide-semiconductor Q2b drain electrode, capacitance is the capacitor CFLY2 of C/2, cathode is connected to metal-oxide-semiconductor Q2a drain electrode, capacitance is the capacitor CFLY1 of C/2, source electrode is connect with capacitor CFLY2 cathode, drain the metal-oxide-semiconductor Q3a connecting with capacitor CFLY1 anode, source electrode is connect with capacitor CFLY1 cathode, drain the metal-oxide-semiconductor Q3b connecting with capacitor CFLY2 anode, the metal-oxide-semiconductor Q1a that source electrode is connect with capacitor CFLY1 anode, the metal-oxide-semiconductor Q1b that source electrode is connect with capacitor CFLY2 anode, the metal-oxide-semiconductor Q1a, Q1b, Q3a, the resistance value of Q3b is 2 The drain electrode of R, described metal-oxide-semiconductor Q1a, Q1b are voltage input end VIN, and the tie point of described inductance L1, L2 are voltage output end VOUT.The present invention is not under the premise of increasing the area of metal-oxide-semiconductor and series capacitance SCAP capacitance in circuit, a kind of new topological structure is obtained by developing, it realizes metal-oxide-semiconductor Q2a and metal-oxide-semiconductor Q2b load-sharing electric current, mitigates the current stresses of metal-oxide-semiconductor Q2a, while reducing the conduction loss of circuit.
Description
Technical field
The present invention relates to the POL power supply fields on communication base station mainboard, specifically, being to be related to a kind of mixing capacitor
Inductance step-down conversion circuit and implementation method.
Background technique
There is a large amount of load point (Point of load, POL) converter in communication power supply mainboard, this kind of POL carries
DC bus-bar voltage (representative value 12V) is converted into what the various voltage class such as 0.9V/1.2V/1.8V were powered to different chips
Effect.Requirement of the rear class chip for power supply at present develops progressively towards low-voltage/high current direction, this is to traditional frame
The POL converter of structure proposes great challenge.
A kind of existing series capacitance reduction voltage circuit is as shown in Figure 1, metal-oxide-semiconductor Q1a, Q2a that inductance L1 and resistance value are R form A
Metal-oxide-semiconductor Q1b, Q2b that phase buck converter, inductance L2 and resistance value are R form B phase buck converter, in inductance L1 and metal-oxide-semiconductor
The capacitor SCAP that capacitance is C is connected between Q1a, the drain electrode of metal-oxide-semiconductor Q1a is voltage input end VIN, inductance L1 and inductance L2
Tie point is voltage output end VOUT.
The course of work of series capacitance reduction voltage circuit leads metal-oxide-semiconductor as shown in Fig. 2, loading different voltage on metal-oxide-semiconductor
Logical or shutdown, realizes the charge or discharge of capacitor SCAP, and the waveform of formation is as shown in Figure 3.During the work time, two-phase buck becomes
The work of parallel operation crisscross parallel, the electric current that each inductance flows through are load current IoHalf, the voltage of series capacitance SCAP is defeated
Enter the half of voltage VIN, the Vds voltage of each metal-oxide-semiconductor can be reduced to VIN/2, reduces switching loss;But it is put in capacitor SCAP
In the process of electricity, i.e. Phase3 in Fig. 2, whole load current can all flow through metal-oxide-semiconductor Q2a, cause the conducting of metal-oxide-semiconductor Q2a
It is lost larger, influences the efficiency of series capacitance reduction voltage circuit.
Summary of the invention
The purpose of the present invention is to provide a kind of mixing capacitor and inductor step-down conversion circuit and implementation methods, solve existing electricity
The problem of during capacitor SCAP discharges, the conduction loss of metal-oxide-semiconductor Q2a is larger on road, influences circuit efficiency.
To achieve the above object, The technical solution adopted by the invention is as follows:
A kind of mixing capacitor and inductor step-down conversion circuit, including inductance L1, L2, resistance value is metal-oxide-semiconductor Q2a, Q2b of R, described
The tie point of inductance L1, L2 are voltage output end VOUT, further include the electricity that cathode is connected to metal-oxide-semiconductor Q2b drain electrode, capacitance is C/2
Hold CFLY2, the capacitor CFLY1 that cathode is connected to metal-oxide-semiconductor Q2a drain electrode, capacitance is C/2, source electrode connect with capacitor CFLY2 cathode,
Drain the metal-oxide-semiconductor Q3a connecting with capacitor CFLY1 anode, and source electrode connect with capacitor CFLY1 cathode, drains and capacitor CFLY2 anode
The metal-oxide-semiconductor Q3b of connection, the metal-oxide-semiconductor Q1a that source electrode is connect with capacitor CFLY1 anode, the MOS that source electrode is connect with capacitor CFLY2 anode
The resistance value of pipe Q1b, described metal-oxide-semiconductor Q1a, Q1b, Q3a, Q3b are 2R, are loaded with independent control level signal on each metal-oxide-semiconductor;
The drain electrode of described metal-oxide-semiconductor Q1a, Q1b are voltage input end VIN, and the cathode and metal-oxide-semiconductor Q2a of the capacitor CFLY1 leaks
The tie point of pole is SW1, and the tie point of cathode and metal-oxide-semiconductor the Q2b drain electrode of the capacitor CFLY2 is SW2.
Further, the capacitor of pressure stabilization function has been respectively connected on the voltage input end VIN, voltage output end VOUT.
Based on a kind of above-mentioned mixing capacitor and inductor step-down conversion circuit, the present invention also provides the realization sides of the circuit
Method includes the following steps:
(1) after circuit is started to work, enabling load current is Io, then the electric current for flowing through inductance L1 and L2 is Io/2;
(2) high level is loaded on metal-oxide-semiconductor Q1a, Q3b, Q2b to turn it on, load on metal-oxide-semiconductor Q1b, Q3a, Q2a low
Level turns it off, and persistently providing current average is Io/ 4 electric current is capacitor CFLY1 charging, meanwhile, capacitor CFLY2 continues
Discharging current average value is Io/ 4 electric current, the electric current flow through metal-oxide-semiconductor Q3b and import SW1, and the electric current for then flowing through metal-oxide-semiconductor Q2b is
3*Io/ 4, the electric current for flowing through metal-oxide-semiconductor Q2a is zero;
(3) time duration be D*T after, load high level on metal-oxide-semiconductor Q2a, Q2b, metal-oxide-semiconductor Q1a, Q1b, Q3a,
Low level is loaded on Q3b, the current average for then flowing through metal-oxide-semiconductor Q2a, Q2b is Io/2;
Wherein, T is cycle time, and D is the duty ratio of high level in the period;
(4) after time duration is (0.5-D) * T, high level is loaded on metal-oxide-semiconductor Q1b, Q3a, Q2a, in metal-oxide-semiconductor
Low level is loaded on Q1a, Q3b, Q2b, persistently providing current average is Io/ 4 electric current is capacitor CFLY2 charging, meanwhile, electricity
Holding CFLY1 persistently to release current average is Io/ 4 electric current, the electric current flow through metal-oxide-semiconductor Q3a and import SW2, then flow through metal-oxide-semiconductor
The electric current of Q2a is 3*Io/ 4, the electric current for flowing through metal-oxide-semiconductor Q2b is zero;
(5) after time duration is D*T, high level is loaded on metal-oxide-semiconductor Q2a, Q2b, low electricity is loaded on metal-oxide-semiconductor
Flat, the current average for then flowing through metal-oxide-semiconductor Q2a, Q2b is Io/2;
(6) after time duration is (0.5-D) * T, step (2)-(5) are repeated, in capacitor CFLY1, CFLY2 charge and discharge
During, current stresses are dispersed on metal-oxide-semiconductor Q2a and Q2b, the conduction loss of metal-oxide-semiconductor is reduced, to reach raising transformation
The purpose of circuit efficiency.
Compared with prior art, the invention has the following advantages:
The present invention is not under the premise of increasing in circuit the area of metal-oxide-semiconductor and series capacitance SCAP capacitance, in existing string
It is developed on the basis of connection capacity voltage dropping circuit by topological structure, obtains a kind of new topological structure, realize metal-oxide-semiconductor Q2a and MOS
Pipe Q2b load-sharing electric current mitigates the current stresses of metal-oxide-semiconductor Q2a, is proved by calculated result, relative to available circuit, this hair
Bright total conduction loss reducesAchieve the purpose that reduce circuit conduction loss.
Detailed description of the invention
Fig. 1 is the circuit diagram of existing series capacitance reduction voltage circuit.
Fig. 2 is the process chart of existing series capacitance reduction voltage circuit.
Fig. 3 is the working waveform figure of existing series capacitance reduction voltage circuit.
Fig. 4 is the conducting power consumption calculation figure of existing series capacitance reduction voltage circuit.
Fig. 5 is circuit diagram of the invention.
Fig. 6 is process chart of the invention.
Fig. 7 is working waveform figure of the invention.
Fig. 8 is conducting power consumption calculation figure of the invention.
Specific embodiment
The invention will be further described with embodiment for explanation with reference to the accompanying drawing, and mode of the invention includes but not only limits
In following embodiment.
Embodiment
Fig. 1 is the circuit diagram of existing series capacitance reduction voltage circuit, guarantee not increase in circuit the area of metal-oxide-semiconductor and
It under the premise of series capacitance SCAP capacitance, is developed by topological structure, obtains a kind of new topological structure, new topological structure is such as
Shown in Fig. 5, metal-oxide-semiconductor Q2a and metal-oxide-semiconductor Q2b load-sharing electric current may be implemented, mitigate the current stresses of metal-oxide-semiconductor Q2a, while
It can reduce the total conduction loss of translation circuit.
Assuming that the conducting resistance of each metal-oxide-semiconductor is R, the capacitance of series capacitance SCAP is C.
The evolution process of topological structure is as follows:
1. the metal-oxide-semiconductor Q1a in Fig. 1 is split into metal-oxide-semiconductor (i.e. the metal-oxide-semiconductor Q1a and metal-oxide-semiconductor in Fig. 5 that two resistance are 2R
Q1b);
2. the metal-oxide-semiconductor Q1b in Fig. 1 is split into metal-oxide-semiconductor (i.e. the metal-oxide-semiconductor Q3a and metal-oxide-semiconductor in Fig. 5 that two resistance are 2R
Q3b);
3. by the series capacitance SCAP in Fig. 1 be divided to capacitor that two capacitances are C/2 (i.e. capacitor CFLY1 in Fig. 5 and
Capacitor CFLY2);
4. the metal-oxide-semiconductor Q2a and metal-oxide-semiconductor Q2b in metal-oxide-semiconductor Q2a and metal-oxide-semiconductor Q2b still corresponding diagram 5 in Fig. 1.
Obtained new topological structure is as shown in figure 5, a kind of mixing capacitor and inductor decompression transformation electricity i.e. disclosed by the invention
Road, the circuit include inductance L1, L2, and metal-oxide-semiconductor Q2a, Q2b that resistance value is R, the tie point of described inductance L1, L2 are voltage output
VOUT is held, further includes the capacitor CFLY2 that cathode is connected to metal-oxide-semiconductor Q2b drain electrode, capacitance is C/2, cathode is connected to metal-oxide-semiconductor Q2a leakage
Pole, the capacitor CFLY1 that capacitance is C/2, source electrode is connect with capacitor CFLY2 cathode, drain the MOS connecting with capacitor CFLY1 anode
Pipe Q3a, source electrode is connect with capacitor CFLY1 cathode, drain the metal-oxide-semiconductor Q3b connecting with capacitor CFLY2 anode, source electrode and capacitor
The metal-oxide-semiconductor Q1a of CFLY1 anode connection, metal-oxide-semiconductor Q1b, the metal-oxide-semiconductor Q1a, Q1b that source electrode is connect with capacitor CFLY2 anode,
The resistance value of Q3a, Q3b are 2R, are loaded with independent control level signal on each metal-oxide-semiconductor;The drain electrode of described metal-oxide-semiconductor Q1a, Q1b
Tie point for voltage input end VIN, cathode and metal-oxide-semiconductor the Q2a drain electrode of the capacitor CFLY1 is SW1, the capacitor CFLY2
Cathode and metal-oxide-semiconductor Q2b drain electrode tie point be SW2.
Further, the capacitor of pressure stabilization function has been respectively connected on the voltage input end VIN, voltage output end VOUT.
Based on foregoing circuit, the present invention also provides the implementation method of the circuit, the course of work as shown in fig. 6, including such as
Lower step:
(1) after circuit is started to work, enabling load current is IO, then the electric current for flowing through inductance L1 and L2 is Io/2;
(2) high level is loaded on metal-oxide-semiconductor Q1a, Q3b, Q2b to turn it on, load on metal-oxide-semiconductor Q1b, Q3a, Q2a low
Level turns it off, and persistently providing current average is Io/ 4 electric current is capacitor CFLY1 charging, meanwhile, capacitor CFLY2 continues
Discharging current average value is Io/ 4 electric current, the electric current flow through metal-oxide-semiconductor Q3b and import SW1, and the electric current for then flowing through metal-oxide-semiconductor Q2b is
3*Io/ 4, the electric current for flowing through metal-oxide-semiconductor Q2a is zero;
(3) time duration be D*T after, load high level on metal-oxide-semiconductor Q2a, Q2b, metal-oxide-semiconductor Q1a, Q1b, Q3a,
Low level is loaded on Q3b, the current average for then flowing through metal-oxide-semiconductor Q2a, Q2b is Io/2;
Wherein, T is cycle time, and D is the duty ratio of high level in the period;
(4) after time duration is (0.5-D) * T, high level is loaded on metal-oxide-semiconductor Q1b, Q3a, Q2a, in metal-oxide-semiconductor
Low level is loaded on Q1a, Q3b, Q2b, persistently providing current average is Io/ 4 electric current is capacitor CFLY2 charging, meanwhile, electricity
Holding CFLY1 persistently to release current average is Io/ 4 electric current, the electric current flow through metal-oxide-semiconductor Q3a and import SW2, then flow through metal-oxide-semiconductor
The electric current of Q2a is 3*Io/ 4, the electric current for flowing through metal-oxide-semiconductor Q2b is zero;
(5) after time duration is D*T, high level is loaded on metal-oxide-semiconductor Q2a, Q2b, low electricity is loaded on metal-oxide-semiconductor
Flat, the current average for then flowing through metal-oxide-semiconductor Q2a, Q2b is Io/2;
(6) after time duration is (0.5-D) * T, step (2)-(5) are repeated, in capacitor CFLY1, CFLY2 charge and discharge
During, current stresses are dispersed on metal-oxide-semiconductor Q2a and Q2b, the conduction loss of metal-oxide-semiconductor is reduced, to reach raising transformation
The purpose of circuit efficiency.
Waveform that the present invention generates during the work time, will be existing as shown in fig. 7, during capacitor charging, electric discharge
Series capacitance reduction voltage circuit in the current stresses that are born in phase3 of metal-oxide-semiconductor Q2a be dispersed in metal-oxide-semiconductor of the invention
In Q2a and metal-oxide-semiconductor Q2b, the current stresses of metal-oxide-semiconductor Q2a in the present invention are alleviated.
Fig. 4 is the conducting power consumption calculation figure of existing series capacitance reduction voltage circuit, at one of available circuit work
In period, the conduction loss of whole metal-oxide-semiconductors isIn fig. 8, pass through the conduction loss of metal-oxide-semiconductor in counting circuit
It is found that the present invention, within a duty cycle, the conduction loss of whole metal-oxide-semiconductors is
For available circuit, the present invention is in the area and series capacitance for not increasing metal-oxide-semiconductor in circuit
It under the premise of SCAP capacitance, is developed by topological structure, obtains a kind of new topological structure, and total conduction loss reducesTo improve the efficiency of translation circuit.
Above-described embodiment is only one of the preferred embodiment of the present invention, should not be taken to limit protection model of the invention
It encloses, as long as that in body design thought of the invention and mentally makes has no the change of essential meaning or polishing, is solved
The technical issues of it is still consistent with the present invention, should all be included within protection scope of the present invention.
Claims (3)
1. a kind of mixing capacitor and inductor step-down conversion circuit, including inductance L1, L2, resistance value is metal-oxide-semiconductor Q2a, Q2b of R, the electricity
The tie point for feeling L1, L2 is voltage output end VOUT, which is characterized in that further includes that cathode is connected to metal-oxide-semiconductor Q2b drain electrode, capacitance
For the capacitor CFLY2 of C/2, cathode is connected to the capacitor CFLY1 that metal-oxide-semiconductor Q2a drains, capacitance is C/2, source electrode and capacitor CFLY2
Cathode connection, the metal-oxide-semiconductor Q3a that connect with capacitor CFLY1 anode of drain electrode, source electrode connect with capacitor CFLY1 cathode, drains and capacitor
The metal-oxide-semiconductor Q3b of CFLY2 anode connection, the metal-oxide-semiconductor Q1a that source electrode is connect with capacitor CFLY1 anode, source electrode and capacitor CFLY2 anode
The resistance value of the metal-oxide-semiconductor Q1b, described metal-oxide-semiconductor Q1a, Q1b, Q3a, Q3b of connection are 2R, are loaded with independent control on each metal-oxide-semiconductor
Level signal;
The drain electrode of described metal-oxide-semiconductor Q1a, Q1b are voltage input end VIN, cathode and metal-oxide-semiconductor the Q2a drain electrode of the capacitor CFLY1
Tie point is SW1, and the tie point of cathode and metal-oxide-semiconductor the Q2b drain electrode of the capacitor CFLY2 is SW2.
2. a kind of mixing capacitor and inductor step-down conversion circuit according to claim 1, which is characterized in that the voltage input
The capacitor of pressure stabilization function has been respectively connected on end VIN, voltage output end VOUT.
3. such as a kind of described in any item implementation methods for mixing capacitor and inductor step-down conversion circuit of claim 1~2, feature
It is, includes the following steps:
(1) after circuit is started to work, enabling load current is Io, then the electric current for flowing through inductance L1 and L2 is Io/2;
(2) high level is loaded on metal-oxide-semiconductor Q1a, Q3b, Q2b to turn it on, load low level on metal-oxide-semiconductor Q1b, Q3a, Q2a
It turns it off, persistently providing current average is Io/ 4 electric current is capacitor CFLY1 charging, meanwhile, capacitor CFLY2 is persistently released
Current average is Io/ 4 electric current, the electric current flow through metal-oxide-semiconductor Q3b and import SW1, and the electric current for then flowing through metal-oxide-semiconductor Q2b is 3*Io/
4, the electric current for flowing through metal-oxide-semiconductor Q2a is zero;
(3) after time duration is D*T, high level is loaded on metal-oxide-semiconductor Q2a, Q2b, in metal-oxide-semiconductor Q1a, Q1b, Q3a, Q3b
Upper load low level, the current average for then flowing through metal-oxide-semiconductor Q2a, Q2b is Io/2;
Wherein, T is cycle time, and D is the duty ratio of high level in the period;
(4) time duration be (0.5-D) * T after, load high level on metal-oxide-semiconductor Q1b, Q3a, Q2a, metal-oxide-semiconductor Q1a,
Low level is loaded on Q3b, Q2b, persistently providing current average is Io/ 4 electric current is capacitor CFLY2 charging, meanwhile, capacitor
It is I that CFLY1, which persistently releases current average,o/ 4 electric current, the electric current flow through metal-oxide-semiconductor Q3a and import SW2, then flow through metal-oxide-semiconductor
The electric current of Q2a is 3*Io/ 4, the electric current for flowing through metal-oxide-semiconductor Q2b is zero;
(5) after time duration is D*T, high level is loaded on metal-oxide-semiconductor Q2a, Q2b, low level is loaded on metal-oxide-semiconductor, this
When to flow through the current average of metal-oxide-semiconductor Q2a, Q2b be Io/2;
(6) after time duration is (0.5-D) * T, step (2)-(5) are repeated, in the mistake of capacitor CFLY1, CFLY2 charge and discharge
Current stresses are dispersed on metal-oxide-semiconductor Q2a and Q2b, reduce the conduction loss of metal-oxide-semiconductor by Cheng Zhong, to reach raising translation circuit
The purpose of efficiency.
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CN110556900A (en) * | 2019-10-21 | 2019-12-10 | 上海南芯半导体科技有限公司 | Hybrid capacitor inductor charger framework and charging mode switching control mode thereof |
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CN110556900A (en) * | 2019-10-21 | 2019-12-10 | 上海南芯半导体科技有限公司 | Hybrid capacitor inductor charger framework and charging mode switching control mode thereof |
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CN113507208B (en) * | 2021-06-30 | 2022-07-22 | 中国科学技术大学 | Multiphase series capacitor DC-DC converter and control method |
US20230188034A1 (en) * | 2021-12-09 | 2023-06-15 | Dialog Semiconductor (Uk) Limited | Hybrid Multi-Phase Power Converter with Phase Shedding |
US11967901B2 (en) * | 2021-12-09 | 2024-04-23 | Renesas Design (UK) Limited | Hybrid multi-phase power converter with phase shedding |
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