CN110164355A - Control signal output circuit and method, array substrate, display device - Google Patents
Control signal output circuit and method, array substrate, display device Download PDFInfo
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- CN110164355A CN110164355A CN201910486803.5A CN201910486803A CN110164355A CN 110164355 A CN110164355 A CN 110164355A CN 201910486803 A CN201910486803 A CN 201910486803A CN 110164355 A CN110164355 A CN 110164355A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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Abstract
The present invention provides a kind of control signal output circuit and method, array substrate, display device, belong to field of display technology, control signal output circuit of the invention includes: timing unit, for according to scanning sequence is preset, respectively first grid driving circuit and second grid driving circuit to provide clock signal；Wherein, clock signal includes: first control signal and second control signal；Judging unit, the clock signal for being provided according to timing unit judge which one in first grid driving circuit and second grid circuit will work, and export judging result；Selecting unit, the judging result for being exported according to judging unit, first control signal or second control signal are exported.
Description
Technical field
The invention belongs to field of display technology, and in particular to a kind of control signal output circuit and method, array substrate, aobvious
Showing device.
Background technique
With the continuous development of display technology, screen is increasingly popularized comprehensively, however, screen top needs to install camera shooting
The non-display devices such as head, earpiece and face recognition sensor, need to occupy the region on screen top, can't accomplish at present really
Comprehensive screen.In view of this, mode popular at present is that notch is arranged in the position on screen top, above-mentioned non-for installing
Display device.Influence in order to avoid notch to display picture, in the specific figure of the substantially fixed display in screen top viewing area
Mark picture, such as clock, application icon, electricity and operator's informaiton etc..These iconic pictures fixed are not needed with routine
60 hertz frequencies refresh, however in practical applications, screen top display area and normal viewing area are generally treated as one piece
Screen refreshes in real time.
At least there are the following problems in the prior art for inventor's discovery: screen top display area and normal viewing area are worked as
At one piece of screen, being refreshed in real time with 60 conventional hertz frequencies, the treating capacity caused in the driving chip unit time is excessive,
So that power consumption increases, the single line of data voltage write time is too short in monolith screen, and it is abnormal to easily cause screen display.
Summary of the invention
The present invention is directed at least solve one of the technical problems existing in the prior art, a kind of control signal output electricity is provided
Road and method, array substrate, display device.
Solving technical solution used by present invention problem is a kind of control signal output circuit, for being the first grid
Pole driving circuit exports first control signal, and exports second control signal for second grid driving circuit；Wherein, described
The pixel quantity in pixel column that one gate driving circuit is connected is less than the pixel that the second grid driving circuit is connected
Pixel quantity in row；The control signal output circuit includes:
Timing unit, for according to default scanning sequence, the respectively described first grid driving circuit and the second gate
Pole driving circuit provides clock signal；Wherein, the clock signal includes: first control signal and second control signal；
Judging unit, the clock signal for being provided according to the timing unit judge the first grid driving
Which one in circuit and second grid circuit will work, and export judging result；
Selecting unit, the judging result for being exported according to the judging unit, by the first control signal or
The second control signal is exported.
Optionally, the selecting unit includes: the first transistor and second transistor；The first transistor and described
The switching characteristic of two-transistor is opposite；Wherein,
First pole of the first transistor connects the timing unit, and the second pole connects the first grid driving electricity
Road, control electrode connect the judging unit；
First pole of second transistor connects the timing unit, and the second pole connects the second grid driving circuit, control
Pole processed connects the judging unit.
Optionally, the first control signal and the second control signal include: frame open signal；Alternatively,
The first control signal and the second control signal include: clock control signal.
Optionally, the output frequency of the first control signal is less than the output frequency of the second control signal.
Solving technical solution used by present invention problem is a kind of array substrate, which includes as above-mentioned
The control signal output circuit of offer.
Optionally, array substrate further include: first grid driving circuit and second grid driving circuit, the two is and institute
State selecting unit connection.
Optionally, which has the first viewing area and the second viewing area；It is characterized in that, the array substrate packet
Include grid line and data line arranged in a crossed manner；Wherein, the grid line in first viewing area and first grid driving electricity
The output end on road connects；Grid line in second viewing area is connect with the output end of the second grid driving circuit；
The data line runs through first viewing area and second viewing area.
Optionally, the image refreshing frequency of first viewing area is lower than the image refreshing frequency of second viewing area.
Solving technical solution used by present invention problem is a kind of display device, which includes as above-mentioned
The array substrate of offer.
Solving technical solution used by present invention problem is a kind of control signal output method, for being the first grid
Pole driving circuit exports first control signal, and exports second control signal for second grid driving circuit；Wherein, described
The pixel quantity in pixel column that one gate driving circuit is connected is less than the pixel that the second grid driving circuit is connected
Pixel quantity in row；The control signal output method includes:
According to default scanning sequence, the respectively described first grid driving circuit and the second grid driving circuit are provided
Clock signal；Wherein, the clock signal includes: first control signal and second control signal；
According to the clock signal, judge which one in the first grid driving circuit and second grid circuit will
It works, and exports judging result；
According to the judging result, the first control signal or the second control signal are exported.
Detailed description of the invention
Fig. 1 is a kind of schematic diagram of control signal output circuit provided in an embodiment of the present invention；
Fig. 2 is a kind of structural schematic diagram of selecting unit unit provided in an embodiment of the present invention；
Fig. 3 is a kind of structural schematic diagram of array substrate provided in an embodiment of the present invention；
Fig. 4 is a kind of flow chart for controlling signal output method provided in an embodiment of the present invention；
Fig. 5 is a kind of preset scanning sequence figure provided in an embodiment of the present invention.
Description of symbols:
10- control signal output circuit, 101- timing unit, 102- judging unit, 103- selecting unit, the 201- first grid
Pole driving circuit, 202- second grid driving circuit, 1031- the first transistor, 1032- second transistor, 301- first are shown
Area, the second viewing area 302-, 401- grid line and 402- data line.
Specific embodiment
Technical solution in order to enable those skilled in the art to better understand the present invention, with reference to the accompanying drawing and specific embodiment party
Present invention is further described in detail for formula.
Currently in order to realize the display effect shielded comprehensively, different aobvious of two row pixel quantities is generally comprised in display terminal
Show region, can be referred to as below in an example are as follows: the first viewing area and the second viewing area.First viewing area is substantially fixed
Show specific picture, such as clock, application icon, electricity and operator's informaiton etc..Second viewing area is normal viewing area,
It can show the picture that user needs.Since jagged, the first viewing area and the second viewing area is arranged in the first viewing area
Row pixel quantity be different.In practical application, generally the first viewing area and the second viewing area are come as one piece of screen real
When refresh, it is single in monolith screen so that power consumption increases in this way, be easy to cause the treating capacity in the driving chip unit time excessive
The row data voltage write time is too short, and it is abnormal to easily cause screen display.In view of the problems of the existing technology, the present invention is implemented
Example provides a kind of control signal output circuit and method, array substrate, display device.First grid in the array substrate drives
Dynamic circuit is connect with the grid line of the first viewing area, and second grid driving circuit is connect with the grid line of the second viewing area.Control letter
The control signal that number output circuit provides can be frame open signal, or clock signal.Certainly, the control signal of output
Or other signals of driving first grid driving circuit and second grid driving circuit, it below in an example will be with
Frame open signal is illustrated.
Embodiment one
The embodiment of the invention provides a kind of control signal output circuit, which is first grid drive
Dynamic circuit output first control signal, and second control signal is exported for second grid driving circuit；Wherein, first grid drives
The pixel number in pixel column that the pixel quantity in pixel column that dynamic circuit is connected is connected less than second grid driving circuit
Amount.Fig. 1 is a kind of schematic diagram of control signal output circuit provided in an embodiment of the present invention, as shown in Figure 1, the control signal is defeated
Circuit 10 includes: timing unit 101, judging unit 102 and selecting unit 103 out.
Timing unit 101 is used for according to scanning sequence is preset, and respectively first grid driving circuit 201 and second grid drives
Dynamic circuit 202 provides clock signal；Wherein, clock signal includes: first control signal and second control signal.Judging unit
102 clock signal for being provided according to timing unit 101 judges first grid driving circuit 201 and second grid circuit 202
In any one will work, and export judging result.Selecting unit 103 according to what judging unit 102 exported for sentencing
Break as a result, first control signal or second control signal are exported.
It should be noted that the clock signal that timing unit 101 provides can be first control signal and the second control letter
Number, or other are for may determine which one of first grid driving circuit 201 and second grid driving circuit 202 will
The signal of start-up operation, will not enumerate herein.
In control signal output circuit provided in an embodiment of the present invention, since timing unit 101 can drive for first grid
Dynamic circuit 201 and second grid driving circuit 202 export different clock signals.Judging unit 102 can be believed according to the timing
Number, judge where one will start to work for first grid driving circuit 201 and second grid driving circuit 202.When judging
When first grid driving circuit 201 will start to work, selecting unit 103 exports first control signal and drives electricity to first grid
Road 201, corresponds to, and the picture of the first viewing area in display terminal starts to be refreshed.When judge second grid driving electricity
When road 202 will start to work, selecting unit 103 exports second control signal and gives second grid driving circuit, corresponds to display
The picture of the second viewing area in terminal starts to be refreshed.In this way, first grid driving circuit 201 and second gate can be made
Pole driving circuit 202 individually enters different control signals, guarantees that the first viewing area and the second viewing area in display terminal are shown
The picture shown is refreshed with different frequency, thus screen top show anchor icon picture the first viewing area image can with compared with
Low frequency is refreshed, to reduce the treating capacity of the unit time of driving chip to reduce energy consumption, and is guaranteed single in screen
The write time of row data voltage improves display effect.
The control signal output circuit provided based on the above embodiment exports electricity to the control signal below in conjunction with attached drawing
Road is further elaborated.
Embodiment two
Fig. 2 is a kind of structural schematic diagram of selecting unit provided in an embodiment of the present invention, as shown in Fig. 2, the selecting unit
103 include: the first transistor 1031 and second transistor 1032；The switch of the first transistor 1031 and second transistor 1032 is special
Property is opposite；Wherein, the first pole of the first transistor 1031 connects timing unit 101, and the second pole connects first grid driving circuit
201, control electrode connection judgment unit 102；First pole of second transistor 1032 connects timing unit 101, the second pole connection the
Two gate driving circuits 202, control electrode connection judgment unit 102.
It should be noted that the switching characteristic of the first transistor 1031 and second transistor 1032 is on the contrary, of the invention real
It applies in example with the first transistor 1031 as P-type transistor, second transistor 1032 is to be illustrated for N-type transistor.By
In the first transistor 1031 operation level be low level, the control of the first transistor 1031 extremely low level signal when, first
It is connected between the first pole and the second pole of transistor 1031, first control signal is input to the second pole from the first pole, and then defeated
Out to first grid driving circuit 201.Since the operation level of second transistor 1032 is high level, second transistor 1032
Control extremely high level signal when, be connected between the first pole and the second pole of second transistor 1032, by second control signal from
First pole is input to the second pole, and then exports to second grid driving circuit 202.Selecting unit provided in an embodiment of the present invention
103 can determine output high level or low level according to judging result, to control the conducting of the first transistor 1031 or the
Two-transistor 1032 is connected, and then realizes independent control to first grid circuit 201 and second grid circuit 202, guarantees the
The pixel that the pixel and second grid circuit 202 that one grid circuit 201 is connected are connected is refreshed with different frequencies, because
This screen top shows that the first viewing area image of anchor icon picture can be refreshed with lower frequency, to reduce driving
The treating capacity of the unit time of chip guarantees the write time of single line of data voltage in screen to reduce energy consumption, improves aobvious
Show effect.
It is understood that the structure of selecting unit 103 shown in Fig. 2 is only a kind of example, mentioned in the embodiment of the present invention
In the selecting unit 103 of confession, judging result can use low and high level signal to determine first grid circuit 201 or second gate
Polar circuit 202 will start to work, can also be by exporting indication signal, to indicate first grid driving circuit 201 or the
Two gate driving circuits will start to work.Therefore, selection structure 103 provided in an embodiment of the present invention can also be using others
The circuit structure that selection function may be implemented is realized, will not enumerate herein.
Optionally, first control signal and second control signal include: frame open signal；Alternatively, first control signal
It include: clock control signal with second control signal.
It should be noted that frame open signal or clock control signal are according to preset timing, it is single in some cycles
Solely input first grid driving circuit 201 or second grid driving circuit 202, to realize to first grid driving circuit 201
With the independent control of second grid driving circuit 202, guarantee pixel and second grid circuit that first grid circuit 201 is connected
202 pixels connected are refreshed with different frequencies, therefore screen top shows that the display area of anchor icon picture can
To be refreshed with lower frequency, to reduce the treating capacity of the unit time of driving chip to reduce energy consumption, and guarantee to shield
The write time of single line of data voltage in curtain, improve display effect.
Optionally, the output frequency of first control signal is less than the output frequency of second control signal.
It should be noted that in the pixel column connected by the first grid driving circuit of first control signal input
The pixel quantity in pixel column that pixel quantity is connected less than the second grid driving circuit of second control signal input, therefore
First control signal need not be exported with second control signal with same nominal frequencies, can be with lower rate-adaptive pacemaker
One control signal, exports second control signal with nominal frequencies.It is corresponding, with lower frequency to display anchor icon picture
The first viewing area image refreshed, thereby saving energy consumption, improve display effect.
Embodiment three
Based on the same inventive concept, the embodiment of the invention provides a kind of array substrate, which includes as above-mentioned
The control signal output circuit that embodiment provides.Fig. 3 is a kind of structural schematic diagram of array substrate provided in an embodiment of the present invention,
As shown in figure 3, the array substrate is in addition to including control signal output circuit 10 provided by the above embodiment, further includes: the first grid
Pole driving circuit 201 and second grid driving circuit 202, also, first grid driving circuit 201 and second grid driving circuit
202 connect with selecting unit 103.The array substrate has the first viewing area 301 and the second viewing area 302；Also, the array
Substrate includes grid line 401 and data line 402 arranged in a crossed manner；Wherein, the grid line 401 and first in the first viewing area 301
The output end of gate driving circuit 201 connects；Grid line 401 and second grid driving circuit 202 in the second viewing area 302
Output end connection；Data line 402 runs through the first viewing area 301 and the second viewing area 302.
Array substrate provided in an embodiment of the present invention, by control signal output circuit 10, according to default timing, output the
One control signal and second control signal, control first grid driving circuit 201 and second grid driving circuit 202 respectively, can
To realize the first viewing area 301 of display anchor icon picture and normally the second viewing area 302 for showing individually controls, also,
First viewing area 301 and the second viewing area 302, so as to reduce wiring, can reduce technique hardly possible with shared data line 402
Degree saves cost of manufacture.
Optionally, the image refreshing frequency of the first viewing area 301 is lower than the image refreshing frequency of the second viewing area 302.
Array substrate provided in an embodiment of the present invention, due to control signal output circuit 10 can according to preset timing,
Clock signal is provided for first grid circuit 201 and second grid circuit 202, and to first grid circuit 201 and second grid
Which one of circuit 202 will carry out work and judge that corresponding output first control signal or second control signal may be implemented
Independent control to first grid circuit 201 and second grid circuit 202 guarantees the pixel that is connected of first grid circuit and the
The pixel that two grid circuits are connected is refreshed with different frequencies, and therefore, screen top shows the of anchor icon picture
The second viewing area 302 that one viewing area 301 can more normally be shown is refreshed with lower frequency, to reduce driving chip
The treating capacity of unit time guarantees the write time of single line of data voltage in screen to reduce energy consumption, improves display effect.
Example IV
Based on the same inventive concept, the embodiment of the invention provides a kind of display device, which includes as above-mentioned
The array substrate that embodiment provides.It is understood that display device provided in an embodiment of the present invention can be smart phone,
It can be laptop etc..Display device provided in an embodiment of the present invention and control signal provided by the above embodiment output electricity
The realization principle on road is similar, and details are not described herein.
Embodiment five
Based on the same inventive concept, the embodiment of the invention provides a kind of control signal output method, the control signal is defeated
Method can be applied to control signal output circuit provided by the above embodiment out, for for first grid driving circuit output the
One control signal, and second control signal is exported for second grid driving circuit；Wherein, first grid driving circuit is connected
Pixel column in the pixel column that is connected less than second grid driving circuit of pixel quantity in pixel quantity.Fig. 4 is this hair
The flow chart for a kind of control signal output method that bright embodiment provides, as shown in figure 4, the control signal output method includes:
S401, according to default scanning sequence, when respectively first grid driving circuit and second grid driving circuit provide
Sequential signal；Wherein, clock signal includes: first control signal and second control signal.
S402 judges which one in first grid driving circuit and second grid circuit will be into according to clock signal
Row work, and export judging result.
S403 exports first control signal or second control signal according to judging result.
It should be noted that above-mentioned clock signal includes but is not limited to first control signal and second control signal,
Or other are for may determine which one of first grid driving circuit and second grid driving circuit will start to work
Signal, will not enumerate herein.
In a specific example, Fig. 5 is a kind of preset scanning sequence figure provided in an embodiment of the present invention, timing list
Member can provide clock signal according to default scanning sequence figure as shown in Figure 5, and first control signal and second control signal is defeated
Enter first grid driving circuit and second grid driving circuit, and then opens the scanning letter of the first viewing area and the second viewing area
Number.Specifically, judging unit can judge that second grid drives according to the clock signal that timing unit exports within two periods
Dynamic circuit will start to work.Selecting unit exports second control signal to second according to a high level signal of input
Gate driving circuit, the control signal include frame open signal and clock control signal.At this point, within the two periods, second
The picture of second viewing area of gate driving circuit connection is refreshed, the first viewing area of first grid driving circuit connection
Picture is in normal luminous state.In a cycle later, the timing that judging unit can be exported according to timing unit is believed
Number judge that first grid driving circuit will start to work.Selecting unit is according to a low level signal of input, by first
Control signal is exported to first grid driving circuit, which includes frame open signal and clock control signal.At this point,
In this cycle, the picture of the first viewing area of first grid driving circuit connection is refreshed, second grid driving circuit
The picture of second viewing area of connection is in normal luminous state.
With the pixel of the first viewing area for 200 rows, for screen resolution is 2880*1440, through the embodiment of the present invention
The control signal output method of offer, the every frame of data processing amount reduce 200*1000*2 bit, and charging time of every row can be with
Increase to 6.2 μ s by 5.7 microseconds (μ s).It can be seen that the picture refreshing of the second viewing area twice by above-mentioned specific example
Later, the picture of the first viewing area just carries out refreshing primary, and therefore, the picture refreshing frequency of the first viewing area is lower than the second display
The picture refreshing frequency in area to reduce the treating capacity of the unit time of driving chip to reduce energy consumption, and guarantees screen
The write time of middle single line of data voltage improves display effect.
It is understood that the principle that embodiment of above is intended to be merely illustrative of the present and the exemplary implementation that uses
Mode, however the present invention is not limited thereto.For those skilled in the art, essence of the invention is not being departed from
In the case where mind and essence, various changes and modifications can be made therein, these variations and modifications are also considered as protection scope of the present invention.
Claims (10)
1. a kind of control signal output circuit is used to export first control signal for first grid driving circuit, and is second
Gate driving circuit exports second control signal；Wherein, the pixel in pixel column that the first grid driving circuit is connected
The pixel quantity in pixel column that quantity is connected less than the second grid driving circuit；It is characterized in that, the control letter
Number output circuit includes:
Timing unit, for according to scanning sequence is preset, the respectively described first grid driving circuit and the second grid to be driven
Dynamic circuit provides clock signal；Wherein, the clock signal includes: first control signal and second control signal；
Judging unit, the clock signal for being provided according to the timing unit, judges the first grid driving circuit
It will work with any one in second grid circuit, and export judging result；
Selecting unit, the judging result for being exported according to the judging unit, by the first control signal or described
Second control signal is exported.
2. control signal output circuit according to claim 1, which is characterized in that the selecting unit includes: the first crystalline substance
Body pipe and second transistor；The switching characteristic of the first transistor and the second transistor is opposite；Wherein,
First pole of the first transistor connects the timing unit, and the second pole connects the first grid driving circuit, control
Pole processed connects the judging unit；
First pole of the second transistor connects the timing unit, and the second pole connects the second grid driving circuit, control
Pole processed connects the judging unit.
3. control signal output circuit according to claim 1, which is characterized in that
The first control signal and the second control signal include: frame open signal；Alternatively,
The first control signal and the second control signal include: clock control signal.
4. control signal output circuit according to claim 3, which is characterized in that the output frequency of the first control signal
Rate is less than the output frequency of the second control signal.
5. a kind of array substrate characterized by comprising the described in any item control signal output circuits of claim 1-4.
6. array substrate according to claim 5, which is characterized in that further include: first grid driving circuit and second gate
Pole driving circuit, the two are connect with the selecting unit.
7. array substrate according to claim 6 has the first viewing area and the second viewing area；It is characterized in that, described
Array substrate includes grid line and data line arranged in a crossed manner；Wherein, the grid line in first viewing area and described first
The output end of gate driving circuit connects；Grid line in second viewing area is defeated with the second grid driving circuit
Outlet connection；The data line runs through first viewing area and second viewing area.
8. array substrate according to claim 7, which is characterized in that the image refreshing frequency of first viewing area is lower than
The image refreshing frequency of second viewing area.
9. a kind of display device, which is characterized in that including such as described in any item array substrates of claim 5-8.
10. a kind of control signal output method is used to export first control signal for first grid driving circuit, and is second
Gate driving circuit exports second control signal；Wherein, the pixel in pixel column that the first grid driving circuit is connected
The pixel quantity in pixel column that quantity is connected less than the second grid driving circuit；It is characterized in that, the control letter
Number output method includes:
According to default scanning sequence, the respectively described first grid driving circuit and the second grid driving circuit provide timing
Signal；Wherein, the clock signal includes: first control signal and second control signal；
According to the clock signal, judge which one in the first grid driving circuit and second grid circuit will carry out
Work, and export judging result；
According to the judging result, the first control signal or the second control signal are exported.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114550651A (en) * | 2022-04-27 | 2022-05-27 | 惠科股份有限公司 | Gate drive circuit, drive method of gate drive circuit and display panel |
| CN114677954A (en) * | 2022-03-04 | 2022-06-28 | 富满微电子集团股份有限公司 | Signal selection circuit and LED drive chip |
| CN114677954B (en) * | 2022-03-04 | 2024-05-31 | 富满微电子集团股份有限公司 | Signal selection circuit and LED driving chip |
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