CN110149105A - RC oscillator and its overshoot method of adjustment - Google Patents
RC oscillator and its overshoot method of adjustment Download PDFInfo
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- CN110149105A CN110149105A CN201910341508.0A CN201910341508A CN110149105A CN 110149105 A CN110149105 A CN 110149105A CN 201910341508 A CN201910341508 A CN 201910341508A CN 110149105 A CN110149105 A CN 110149105A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/01—Details
- H03K3/011—Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature
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Abstract
The invention discloses a kind of RC oscillator and its overshoot methods of adjustment, are related to integrated circuit fields.The RC oscillator includes the first phase inverter, the second phase inverter, third phase inverter and the 4th phase inverter and first capacitor, the output end of first phase inverter is connected to the input terminal of the second phase inverter, the output end of second phase inverter is connected to the input terminal of third phase inverter, the input terminal of 4th phase inverter is connected to the output end of third phase inverter and the input terminal of the first phase inverter, and first capacitor both ends are connected to the first phase inverter and the second phase inverter；RC oscillator further includes first resistor and second resistance, output end, the other end of input terminal and the 4th phase inverter that one end of first resistor is connected to the first phase inverter are connected to the input terminal of second resistance and the second phase inverter, and one end of second resistance is connected to the input terminal of first resistor and the second phase inverter, the other end is connected to first capacitor.The present invention ensure that the safety of chip by dividing to the second inverter input voltage.
Description
Technical field
The present invention relates to technical field of integrated circuits, more particularly to a kind of RC oscillator and its overshoot method of adjustment.
Background technique
Oscillator occupies an important position in each class of electronic devices as clock source, how to generate stable clock, is
Problem in the urgent need to address.
Fig. 1 is the basic structure of oscillator in the prior art, by 4 phase inverters, 1 buffer, 1 resistance and 1 electricity
Hold composition, the structure due to circuit is simple, frequency stabilization and be widely used.The input terminal of phase inverter V1 is connected to node Va simultaneously
As the input node of RC oscillator, the output end Vb of phase inverter V1 is connected to capacitor, and the other end Vc of capacitor is connected to resistance
One end, the node Vc and input node as phase inverter V2, the output node Vd of phase inverter V2 are connected to the defeated of phase inverter V3
Enter end, the output end vo of phase inverter V3 is connected to the input terminal of phase inverter V4, and using Vo as the output of RC oscillator, by slow
Rush device output clock.The output end of phase inverter V4 is connected to the other end Va of resistance, and the input as phase inverter V1.The RC
The period of oscillator, KSWFor the overturning point of associated inverter,, K is taken under normal circumstancesSW=0.5, obtain cycle T=(RC) ln9 ≈ 2.2RC of RC.
For the working principle of the oscillator as shown in Fig. 2, abscissa is the time, ordinate is voltage, it is assumed that at the beginning of powering on, t=
When 0, input node Va=0 of phase inverter V1, then the voltage of node Vb is high level VDD (supply voltage), the voltage of node Vc
For high level VDD；As t=0 ~ T1, node Vc discharges to capacitor by resistance R, to make the reduction of node Vc voltage, works as t
When=T1, node Vc voltage drops to, reached the overturning point of phase inverter V2, phase inverter V2 is flipped, node Vd
Become high level, while phase inverter V3 is flipped, node Vo becomes low level 0, and and then phase inverter V4 is also flipped, section
Point Va becomes high level VDD, and phase inverter V1 is flipped, and node Vb becomes 0.And Vc ≈ at this time, due to capacitor two
The pressure drop at end cannot be mutated, so when the voltage of node Vb is reduced to 0 by VDD, node Vc byBecome.In t=T1 ~ T2, node Va is charged by node Vc of the resistance R to capacitor, as t=T2, node Vc electricity
Pressure is increased to, phase inverter V2 is flipped, and node Va becomes low level 0, then node Vb becomes high level VDD, together
The reason of sample, since the pressure drop at capacitor both ends cannot be mutated, so when node Vb is upgraded to VDD by 0, node Vc by
Become.In t=T2 ~ T3, node Vc discharges to capacitor by resistance R, and as t=T3, the voltage of node Vc is reduced to, phase inverter V2 is flipped, and so circulation is gone down, node Vo is by buffer clock output to load circuit.
In conclusion existing RC oscillator is in one cycle, node Vc voltage fromIt arrives,
So the gate source voltage V of the transistor in phase inverter V2GS> VDD, there are breakdown risks for gate oxide, so as to cause chip
Failure.
Summary of the invention
The main purpose of the present invention is to provide a kind of RC oscillator and its overshoot methods of adjustment, it is intended to improve chip peace
Entirely.
To achieve the above object, the present invention provides a kind of RC oscillator, and the RC oscillator includes the first phase inverter, second
The output end of phase inverter, third phase inverter and the 4th phase inverter and first capacitor, first phase inverter is connected to described second
The input terminal of phase inverter, the output end of second phase inverter are connected to the input terminal of the third phase inverter, and the described 4th is anti-
The input terminal of phase device is connected to the output end of the third phase inverter and the input terminal of first phase inverter, the first capacitor
Both ends are connected to first phase inverter and second phase inverter；
The RC oscillator further includes first resistor and second resistance, and one end of the first resistor is connected to first reverse phase
Output end, the other end of the input terminal of device and the 4th phase inverter are connected to the second resistance and second phase inverter
Input terminal, one end of the second resistance is connected to the input terminal of the first resistor and second phase inverter, the other end connects
It is connected to the first capacitor.
Preferably, the resistance value of the first resistor is twice of the second resistance.
Preferably, the RC oscillator further includes buffer, and the input terminal of the buffer is connected to the third reverse phase
The output end of device, the buffer output end export clock signal to load circuit.
Preferably, the input terminal of first phase inverter and output end are connected to first node and second node, institute
It states first capacitor one end and is connected to the second node, the other end and the second resistance is connected to by third node, described
Two inverter inputs and output end are connected to fourth node and the 5th node, and the 5th node is also attached to described
The input terminal of three phase inverters, the output end of the third phase inverter and the input terminal of the buffer are connected to the 6th node.
Preferably, first phase inverter, second phase inverter, the third phase inverter and the 4th phase inverter are equal
Using high speed phase inverter.
Preferably, the first resistor and the second resistance are the polysilicon resistance using positive and negative complementary temperature coefficient.
The present invention also provides a kind of overshoot methods of adjustment of RC oscillator, comprising the following steps:
When first node voltage is equal to 0, second node voltage is high level, and third node passes through the first resistor and described
Second resistance discharges to the first capacitor, reduces the third node and fourth node voltage, so that described second
Overturning when phase inverter reaches overturning point voltage；The voltage of 5th node becomes high level, turns over so that the third phase inverter reaches
It is overturn when turning point voltage；6th node voltage becomes low level, so that overturning when the 4th phase inverter reaches overturning point voltage,
First node voltage becomes high level, so that overturning when first phase inverter reaches overturning point voltage；First node voltage becomes
Height make first phase inverter reach overturning point voltage be flipped, second node voltage becomes 0, and the 6th node passes through institute
Buffer is stated by clock output；Wherein the resistance value of the first resistor is twice of the second resistance；
At this point, being connected to the calculation formula of the fourth node voltage of second inverter input are as follows:
,
Wherein R1 is the resistance value of the first resistor, and R2 is the resistance value of second resistance, VVAFor first node voltage, VVA=VDD, VVC
For the third node voltage,, VVDFor the fourth node voltage, due to R1=2R2, then。
Preferably, the first node fills the first capacitor by the first resistor and the second resistance
Electricity, so that the fourth node voltage increases the overturning point voltage for reaching second phase inverter, second phase inverter occurs
Overturning, the first node becomes low level, the second node becomes high level, at this point, being connected to second phase inverter
The calculation formula of the fourth node voltage of input terminal are as follows:
, wherein, VVA=0, then VVD=VDD。
Preferably, third node discharges to the first capacitor by the first resistor and the second resistance,
The fourth node voltage is reduced to, it is flipped with reaching the second phase inverter overturning point voltage.
Technical solution of the present invention divides the second inverter input voltage by first resistor and second resistance, makes
The value for obtaining the second inverter input voltage is limited under supply voltage, so that the transistor in the second phase inverter
Gate source voltage is less than or equal to supply voltage, and gate oxide ensure that the safety of chip there is no the risk of breakdown.
Detailed description of the invention
Fig. 1 is the basic structure schematic diagram of oscillator in the prior art；
Fig. 2 is the operation principle schematic diagram of oscillator in the prior art；
Fig. 3 is the structural schematic diagram of RC oscillator of the present invention；
Fig. 4 is the operation principle schematic diagram of RC oscillator of the present invention.
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific embodiment
It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, it is not intended to limit the present invention.
The following further describes the present invention with reference to the drawings.
A kind of RC oscillator, as shown in figure 3, the RC oscillator include the first phase inverter INV1, the second phase inverter INV2,
The output end of third phase inverter INV3 and the 4th phase inverter INV4 and first capacitor C1, the first phase inverter INV1 are connected to institute
The input terminal of the second phase inverter INV2 is stated, the output end of the second phase inverter INV2 is connected to the third phase inverter INV3's
Input terminal, the input terminal of the 4th phase inverter INV4 are connected to the output end and described first of the third phase inverter INV3 instead
The input terminal of phase device INV1, the both ends the first capacitor C1 are connected to the first phase inverter INV1 and second reverse phase
Device INV2；
The RC oscillator further includes first resistor R1 and second resistance R2, and one end of the first resistor R1 is connected to described
Output end, the other end of the input terminal of one phase inverter INV1 and the 4th phase inverter INV4 be connected to the second resistance R2 and
The input terminal of the second phase inverter INV2, one end of the second resistance R2 are connected to the first resistor R1 and described second
Input terminal, the other end of phase inverter INV2 is connected to the first capacitor C1.
Technical solution of the present invention by first resistor R1 and second resistance R2 to the second phase inverter INV2 input terminal voltage into
Row partial pressure, so that the value of the second phase inverter INV2 input terminal voltage is limited under supply voltage, so that the second reverse phase
The gate source voltage of transistor in device INV2 is less than or equal to supply voltage, and gate oxide ensure that core there is no the risk of breakdown
The safety of piece.
Preferably, the resistance value of the first resistor R1 is twice of the second resistance R2.In practical applications, meeting
VVDUnder conditions of≤VDD, the resistance value ratio of first resistor R1 and second resistance R2 can be other ratios.
Preferably, the RC oscillator further includes buffer, and the input terminal of the buffer is connected to the third reverse phase
The output end of device INV3, the buffer output end export clock signal to load circuit.
Preferably, the input terminal of the first phase inverter INV1 and output end are connected to first node VA and the second section
The one end point VB, the first capacitor C1 is connected to the second node VB, the other end and is connected to described by third node VC
Two resistance R2, the second phase inverter INV2 input terminal and output end are connected to fourth node VD and the 5th node VE, institute
State the input terminal that the 5th node VE is also attached to the third phase inverter INV3, the output end of the third phase inverter INV3 and institute
The input terminal for stating buffer is connected to the 6th node VO.
In a particular embodiment, first phase inverter, second phase inverter, the third phase inverter and the described 4th
Phase inverter is all made of high speed phase inverter.High speed phase inverter transmission speed is fast, delay is small.
In a particular embodiment, the first resistor and the second resistance are the polycrystalline using positive and negative complementary temperature coefficient
Silicon resistor.
The present invention also provides a kind of overshoot methods of adjustment of RC oscillator, comprising the following steps:
As shown in figure 4, abscissa is the time, ordinate is voltage, it is assumed that powers on beginning, as t=0, first node VA voltage etc.
When 0, second node VB voltage is high level, and as t=0 ~ T1, third node VC passes through the first resistor R1 and described the
Two resistance R2 discharge to the first capacitor C1, reduce the third node VC and fourth node VD voltage, so that institute
State overturning when the second phase inverter INV2 reaches overturning point voltage；The voltage of 5th node VE becomes high level, so that the third
Overturning when phase inverter INV3 reaches overturning point voltage；6th node VO voltage becomes low level, so that the 4th phase inverter
Overturning when INV4 reaches overturning point voltage, first node VA voltage becomes high level, so that the first phase inverter INV1 reaches
It is overturn when overturning point voltage；First node VA voltage get higher make the first phase inverter INV1 reach overturning point voltage turn over
Turn, second node VB voltage becomes 0, and the 6th node VO is by the buffer by clock output；Wherein first electricity
The resistance value for hindering R1 is twice of the second resistance R2；
At this point, being connected to the calculation formula of the fourth node VD voltage of the second phase inverter INV2 input terminal are as follows:
,
Wherein R1 is the resistance value of the first resistor, and R2 is the resistance value of second resistance, VVAFor first node VA voltage, VVA=VDD,
VVCFor the third node VC voltage,, VVDFor the fourth node VD voltage, due to R1=2R2, then。
As shown in figure 4, the first node VA passes through the first resistor R1 and the second resistance as t=T1 ~ T2
R2 charges to the first capacitor C1, so that fourth node VD voltage raising reaches the second phase inverter INV2's
Overturning point voltage, the second phase inverter INV2 are flipped, and the first node VA becomes low level, the second node VB
Become high level, at this point, being connected to the calculation formula of the fourth node VD voltage of the second phase inverter INV2 input terminal
Are as follows:
, wherein, VVA=0, then VVD=VDD。
As shown in figure 4, third node VC passes through R2 pairs of the first resistor R1 and the second resistance as t=T2 ~ T3
The first capacitor C1 discharges, and the fourth node VD voltage is reduced to, to reach the second phase inverter INV2
Overturning point voltage is flipped.
As shown in figure 4, pass through RC oscillator operation process it is found that RC oscillator of the invention in one cycle, the 4th
The voltage of node VD fromTo VDD, i.e. the gate source voltage V of transistor in the second phase inverter INV2GS≤ VDD, grid oxygen
Changing layer, there is no the risks of breakdown, so chip is safe.
It should be understood that the above is only a preferred embodiment of the present invention, the scope of the patents of the invention cannot be therefore limited,
It is all to utilize equivalent structure or equivalent flow shift made by description of the invention and accompanying drawing content, it is applied directly or indirectly in
Other related technical areas are included within the scope of the present invention.
Claims (9)
1. a kind of RC oscillator, which is characterized in that the RC oscillator includes the first phase inverter, the second phase inverter, third reverse phase
Device and the 4th phase inverter and first capacitor, the output end of first phase inverter are connected to the input terminal of second phase inverter,
The output end of second phase inverter is connected to the input terminal of the third phase inverter, the input terminal connection of the 4th phase inverter
In the output end of the third phase inverter and the input terminal of first phase inverter, the first capacitor both ends are connected to institute
State the first phase inverter and second phase inverter；
The RC oscillator further includes first resistor and second resistance, and one end of the first resistor is connected to first reverse phase
Output end, the other end of the input terminal of device and the 4th phase inverter are connected to the second resistance and second phase inverter
Input terminal, one end of the second resistance is connected to the input terminal of the first resistor and second phase inverter, the other end connects
It is connected to the first capacitor.
2. RC oscillator according to claim 1, which is characterized in that the resistance value of the first resistor is the second resistance
Twice.
3. RC oscillator according to claim 1, which is characterized in that the RC oscillator further includes buffer, described slow
The input terminal for rushing device is connected to the output end of the third phase inverter, and the buffer output end exports clock signal to loading electricity
Road.
4. RC oscillator according to claim 3, which is characterized in that the input terminal and output end of first phase inverter point
It is not connected to first node and second node, described first capacitor one end is connected to the second node, the other end passes through third
Node is connected to the second resistance, and second inverter input and output end are connected to fourth node and Section five
Point, the 5th node are also attached to the input terminal of the third phase inverter, the output end of the third phase inverter and described slow
The input terminal for rushing device is connected to the 6th node.
5. RC oscillator according to claim 1, which is characterized in that first phase inverter, second phase inverter, institute
It states third phase inverter and the 4th phase inverter is all made of high speed phase inverter.
6. RC oscillator according to claim 1, which is characterized in that the first resistor and the second resistance are to use
The polysilicon resistance of positive and negative complementary temperature coefficient.
7. the overshoot method of adjustment of RC oscillator according to claim 6, which comprises the following steps:
When first node voltage is equal to 0, second node voltage is high level, and third node passes through the first resistor and described
Second resistance discharges to the first capacitor, reduces the third node and fourth node voltage, so that described second
Overturning when phase inverter reaches overturning point voltage；The voltage of 5th node becomes high level, turns over so that the third phase inverter reaches
It is overturn when turning point voltage；6th node voltage becomes low level, so that overturning when the 4th phase inverter reaches overturning point voltage,
First node voltage becomes high level, so that overturning when first phase inverter reaches overturning point voltage；First node voltage becomes
Height make first phase inverter reach overturning point voltage be flipped, second node voltage becomes 0, and the 6th node passes through institute
Buffer is stated by clock output；Wherein the resistance value of the first resistor is twice of the second resistance；
At this point, being connected to the calculation formula of the fourth node voltage of second inverter input are as follows:
,
Wherein R1 is the resistance value of the first resistor, and R2 is the resistance value of second resistance, VVAFor first node voltage, VVA=VDD,
VVCFor the third node voltage,, VVDFor the fourth node voltage, due to R1=2R2, then。
8. the overshoot method of adjustment of RC oscillator according to claim 7, which is characterized in that the first node passes through institute
It states first resistor and the second resistance charges to the first capacitor, so that fourth node voltage raising reaches institute
The overturning point voltage of the second phase inverter is stated, second phase inverter is flipped, and the first node becomes low level, described
Two nodes become high level, at this point, being connected to the calculation formula of the fourth node voltage of second inverter input
Are as follows:
, wherein, VVA=0, then VVD=VDD。
9. the overshoot method of adjustment of RC oscillator according to claim 8, which is characterized in that third node passes through described the
One resistance and the second resistance discharge to the first capacitor, and the fourth node voltage is reduced to, to reach
The second phase inverter overturning point voltage is flipped.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN110514990A (en) * | 2019-08-23 | 2019-11-29 | 福州瑞芯微电子股份有限公司 | The method and apparatus of analogue-key detection |
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