CN110149096A - A kind of low-noise amplifier of high linearity - Google Patents
A kind of low-noise amplifier of high linearity Download PDFInfo
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- CN110149096A CN110149096A CN201910526423.XA CN201910526423A CN110149096A CN 110149096 A CN110149096 A CN 110149096A CN 201910526423 A CN201910526423 A CN 201910526423A CN 110149096 A CN110149096 A CN 110149096A
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- nmos transistor
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- 239000003990 capacitor Substances 0.000 claims abstract description 40
- 230000000694 effects Effects 0.000 claims description 11
- 230000003321 amplification Effects 0.000 claims description 6
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 6
- 230000005611 electricity Effects 0.000 claims description 4
- 238000002955 isolation Methods 0.000 claims description 2
- 230000003071 parasitic effect Effects 0.000 claims description 2
- 239000013078 crystal Substances 0.000 claims 2
- 238000013461 design Methods 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 5
- 238000004891 communication Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 241001347978 Major minor Species 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
Abstract
The invention discloses a kind of amplifier circuit in low noise of high linearity, it is related to RF CMOS integrated circuit fields, including main amplifier circuit, auxiliary amplifier circuit and cascode circuit, wherein, main amplifier circuit includes the first NMOS transistor, first capacitor, first resistor, first inductance, first bias voltage and the first grounding point, auxiliary amplifier circuit includes PMOS transistor, third capacitor, 4th capacitor, third inductance, 4th inductance and the second grounding point, cascode circuit includes the second NMOS transistor, second capacitor, 5th capacitor, second resistance, 3rd resistor, second inductance, second bias voltage, third bias voltage, third grounding point, supply voltage, the cascode circuit connects the main amplifier circuit and described by conducting wire Auxiliary amplifier circuit, the main amplifier circuit connect the auxiliary amplifier circuit by conducting wire.The linearity of low-noise amplifier is improved under conditions of low-power consumption low biasing.
Description
Technical field
The present invention relates to field of wireless communications systems more particularly to a kind of low-noise amplifiers of high linearity.
Background technique
Low-noise amplifier refers to the first order amplifier that reception of wireless signals end is used as in RF IC
The amplifying circuit with low-noise factor.Low-noise amplifier is essential circuit list in wireless communication system transceiver
Member is widely used in the various wireless communication systems such as mobile communication, wireless network and GPS and receives in terminal.Low noise amplification
First order amplifier of the device as receiving end, influence of its performance to performances such as noise, the linearities of entire receiver is undoubtedly
It is the largest.
One most important index of low-noise amplifier is noise coefficient.Its noise coefficient illustrates that circuit believes amplification
The contribution of noise in number, influence of the smaller circuit of noise coefficient to output signal-noise ratio is smaller when identical signal inputs, defeated
Signal quality is higher out.Existing frequently-used source degeneracy structure is matched by reasonable parameter designing and input and output, is attained by
One preferably gain and noise coefficient.
Low-noise amplifier is power consumption there are one very important index, and measurement standard is not input letter in circuit
The size of quiescent current in the case where number.Usually in practical applications, in order to improve current utilization efficiency power consumption be limited item
Gain and noiseproof feature are improved under part as far as possible, low-noise amplifier amplifier tube would generally be designed to the work of the low biasing of large scale
State, but it is low biasing but also operating point nearby amplifier tube mutual conductance appearance significantly change, cause small signal input when it is non-
Linear problem.
Mutual conductance refers in transistor under certain quiescent point, i.e., certain grid bias, the small signal of grid source electrode
The gain for the small-signal current that voltage input generates at drain-source end.And the mutual conductance of transistor is changed with quiescent point, i.e.,
The variation of gate-source voltage will lead to the variation of transistor transconductance.Therefore under the slightly larger signal function of amplitude, bias point can be with electricity
The variation of corrugating and occur varying widely the variation so as to cause transconductance value, lead to nonlinear problem.
With advances in technology and the needs of application, in some wireless communication systems also increasingly to the requirement of the linearity
The linearity performance of height, low-noise amplifier is also more and more important.PMOS tube superimposing technique complementary with the multitube of NMOS tube is common
In, to improve the linearity, utilizing PMOS tube and NMOS tube mutual conductance and its single order, two to the compensation of amplifier tube mutual conductance and transconductance derivatives
The characteristic of order derivative curve, by adjusting biasing or BULK voltage moving curve wave crest or trough to specific position, to reach pair
The effect of curve specific position compensation.But this technology is mostly to make amplifier tube bias in high value, i.e., amplifier tube mutual conductance it is larger and
In flatter position, the compensation to the Second derivative curves of mutual conductance is focused on.Its circuit is realized and is mostly gone here and there using PMOS and NMOS
The reverse phase type enlarged structure of connection is to compensate, and multiple and different bias series structure parallel connections compensate again.This structure band
Carry out many problems, for example reverse phase type amplifier often works in high power consumption state, and high-gain but output impedance are low etc..And for low
The amplifier tube of biasing, this compensation way produce little effect, often due to PMOS small-signal gain will be lower than among this structure
NMOS is not achieved the effect of compensation, makes instead non-linear so the mutual conductance variation opposite with the main amplifier tube of N-type is not achieved
It is stronger.
Therefore, those skilled in the art is dedicated to developing a kind of low-noise amplifier of high linearity, can be in low function
It consumes under conditions of low biasing and compensates, improve the linearity.
Summary of the invention
In view of the above drawbacks of the prior art, technical problem to be solved by the invention is to provide a kind of structure is simple,
Facilitate design, it is easy to accomplish the low-noise amplifier of the low biasing high linearity of the low-power consumption being easily achieved.
To achieve the above object, the present invention provides a kind of amplifier circuit in low noise of high linearity, which is characterized in that
Including main amplifier circuit, auxiliary amplifier circuit and cascode circuit, wherein the main amplifier circuit includes first
NMOS transistor, first capacitor, first resistor, the first inductance, the first bias voltage and the first grounding point, the booster amplifier
Circuit includes PMOS transistor, third capacitor, the 4th capacitor, third inductance, the 4th inductance and the second grounding point, described
Cascode circuit includes the second NMOS transistor, the second capacitor, the 5th capacitor, second resistance, 3rd resistor, the second inductance, the
Two bias voltages, third bias voltage, third grounding point, supply voltage, the cascode circuit connect the master by conducting wire
Amplifier circuit and the auxiliary amplifier circuit, the main amplifier circuit connect the booster amplifier electricity by conducting wire
Road.
Further, the main amplifier circuit provides one by first NMOS transistor in low bias state
A mutual conductance with positive derivative, and undertake main enlarging function；
The auxiliary amplifier circuit provides the mutual conductance with negative derivative by the PMOS transistor, and undertakes pair
The effect of the main amplifier circuit compensation；
The cascode circuit is by being that the master is put with second NMOS transistor of the 3rd resistor common gate
Big device circuit and the auxiliary amplifier circuit provide low-resistance load and provide high impedance output, and inhibit Muller effect.
Further, the source electrode of first NMOS transistor connects first inductance, forms the amplifier of source degeneracy
Structure provides main transadmittance gain；
The drain electrode of first NMOS transistor is connected by the third capacitor with the source electrode of the PMOS transistor,
Output end is superimposed as the electric current of the main amplifier circuit and the auxiliary amplifier circuit.
Further, the third inductance and the 4th inductance provide DC channel for the PMOS transistor, described
Third capacitor provides isolation direct current and act on and provide lower exchange of resistance with the 4th capacitor for the PMOS transistor to be led to
Road makes the auxiliary amplifier circuit and the main amplifier circuit while realizing DC current parallel output, and can be real
The same-phase parallel output of existing alternating current.
Further, the auxiliary amplifier circuit is by the mutual conductance with positive derivative of the main amplifier circuit in threshold value
Interior compensation is a constant value, improves the linearity in the case where low-power.
Further, the cascode circuit further includes radiofrequency signal input interface and radiofrequency signal output interface.
Further, it is the master that the source electrode of second NMOS transistor, which connects the drain electrode of first NMOS transistor,
Amplifying circuit provides DC current；
The source electrode of second NMOS transistor connects the 4th inductance and provides direct current for the auxiliary amplifier circuit
Electric current；
Second NMOS transistor passes through the 5th capacitor AC earth.
Further, main amplifier circuit institute in parallel under the premise of first NMOS transistor plays amplification
State auxiliary amplifying circuit.
Further, described 4th inductance one end connects the PMOS transistor and the 4th capacitor, other end connection
The drain electrode of first NMOS transistor and the source electrode of second NMOS transistor.
Further, the 4th inductance is as between the auxiliary amplifier circuit and second NMOS transistor
Matching inductance, eliminating the parasitic capacitance bring at the second NMOS transistor source node influences.
Technical effect:
1. circuit structure is simple, major-minor amplifier two parts circuit can separately design adjusting parameter and be independent of each other, and improve
The design freedom of circuit and flexibility.
2. circuit main body continues to use source degeneracy cascode structure, and the main amplifier tube of the low offset operation of large scale, it ensure that
The performance of low noise and high-gain under low-power consumption.
3. mutual conductance changes opposite feature when deviateing quiescent point with NMOS transistor using PMOS under low biasing, will put
The a certain range of mutual conductance compensation near quiescent point of big circuit is a relative constant value, improves the linearity.
It is described further below with reference to technical effect of the attached drawing to design of the invention, specific structure and generation, with
It is fully understood from the purpose of the present invention, feature and effect.
Detailed description of the invention
Fig. 1 is the circuit structure diagram of a preferred embodiment of the invention；
Fig. 2 be a preferred embodiment of the invention main amplifier circuit and booster amplifier respectively transconductance curve and
Total transconductance curve figure after mutually compensating；
Fig. 3 is the transconductance derivatives curve graph of a preferred embodiment of the invention.
Wherein, the first NMOS transistor of 1-, the second NMOS transistor of 2-, 3-PMOS transistor, 4- first capacitor, 5- second
Capacitor, 6- third capacitor, the 4th capacitor of 7-, the 5th capacitor of 8-, 9- first resistor, 10- second resistance, 11- 3rd resistor, 12-
First inductance, the second inductance of 13-, 14- third inductance, the 4th inductance of 15-, the first bias voltage of 16-, the second bias voltage of 17-,
18- third bias voltage, 19- supply voltage, 20- radiofrequency signal input interface, 21- radiofrequency signal output interface, 22- first connect
Place, the second grounding point of 23-, 24- third grounding point.
Specific embodiment
Multiple preferred embodiments of the invention are introduced below with reference to Figure of description, keep its technology contents more clear and just
In understanding.The present invention can be emerged from by many various forms of embodiments, and protection scope of the present invention not only limits
The embodiment that Yu Wenzhong is mentioned.
In the accompanying drawings, the identical component of structure is indicated with same numbers label, everywhere the similar component of structure or function with
Like numeral label indicates.The size and thickness of each component shown in the drawings are to be arbitrarily shown, and there is no limit by the present invention
The size and thickness of each component.Apparent in order to make to illustrate, some places suitably exaggerate the thickness of component in attached drawing.
As shown in Figure 1, the amplifier circuit in low noise of high linearity of the invention, including it is main amplifier circuit part, auxiliary
Help the other parts such as amplifier circuit parts and cascode pipe.Wherein main amplifier circuit includes the first NMOS transistor (MN1)
1, first capacitor (C1) 4, the 12, first bias voltage of the 9, first inductance of first resistor (R1) (L1) (Vbias1) 16 and the first ground connection
Point 22, auxiliary amplifier circuit includes PMOS transistor (MP1) 3, the 6, the 4th capacitor (C4) 7 of third capacitor (C3), third inductance
(L3) the 14, the 4th inductance (L4) 15 and the second grounding point (22), cascode circuit include the second NMOS transistor (MN2) 2, the
The 5, the 5th capacitor (C5) 8 of two capacitors (C2), second resistance (R2) 10, the 11, second inductance of 3rd resistor (R3) (L2) 13, second are inclined
Set voltage (Vbias2) 17, third bias voltage (Vbias3) 18, third grounding point 24, supply voltage (VDD) 19, radiofrequency signal
Input interface (Rfin) 20 and radiofrequency signal output interface (Rfout) 21.
Large-sized first NMOS transistor 1 for working in lower overdrive voltage state plays main amplification function
Can, source electrode connects the first inductance 12 and constitutes source degeneracy structure, is main amplifier circuit.PMOS transistor 3 and third inductance 14,
4th inductance 15 constitutes the DC channel of booster amplifier, and, PMOS transistor in parallel with main amplifier tube the first NMOS transistor 1
3 quiescent currents are lower, and gain is smaller, only play the role of as main amplifying circuit compensation, the termination PMOS transistor of third capacitor 6 one
3 drain electrodes, the drain electrode of the first NMOS transistor 1 of another termination export auxiliary amplifier circuit output electric current and main amplifier circuit
Electric current merging compensates.
Signal is inputted from the first NMOS transistor 1 with 3 grid of PMOS transistor, and the mutual conductance of two transistors is with bias voltage
The curve of variation is as shown in Figure 2, it can be seen that they have opposite variation tendency, and in compensation range mutual conductance variable quantity compared with
Greatly.Signal from the transistor drain output of two amplifying circuits, is superimposed, from Fig. 2 respectively by bulky capacitor third capacitor 6
In it is clearer observe compensation section in, mutual conductance variable quantity is smaller after compensation, reaches a metastable value.
Main amplifier circuit is disconnected from each other with auxiliary amplifier circuit, is almost independent of each other, and increases circuit design oneself
By spending, the method for circuit design and compensation is as follows:
The constraint conditions such as gain, noise coefficient, power consumption first as required design the low of a source degeneracy cascode structure
Noise amplifier.Then circuit connection auxiliary amplifier circuit as shown in Figure 1, third capacitor 6, the 4th capacitor 7, third inductance
14, the 4th inductance 15 should take the larger value, since PMOS transistor 3 does not need to provide large gain, so its DC current is designed as
Smaller value, 1/10th of 1 D. C. value of about the first NMOS transistor, it is lower suitable by giving PMOS transistor 3
Overdrive voltage and size are realized.Pass through the first NMOS transistor of emulation 1 and PMOS transistor 3 and compensated transconductance derivatives
Curve can more intuitively observe the effect of compensation, as shown in figure 3, three curves are respectively the transconductance derivatives for compensating front and back, figure
See in 3 the transconductance derivatives of the first NMOS transistor 1 near the quiescent point of design be greater than zero and extreme value it is larger, and
PMOS transistor 3 is then negative, then by mobile 3 transconductance derivatives curve of PMOS transistor and change shape, it can be by certain model
Total transconductance derivatives in enclosing are compensated to the value close to zero.And the bias voltage of pair pmos transistor 3 is finely adjusted and can move
Its homologous thread is superimposed in compensation range as shown in Figure 3 to suitable position to compensation is overlapped in the range of design requirement
Compensated derivative curve extreme value is relatively small.Then the input and output matching of circuit is completed.So far, the circuit of the present embodiment
Design is completed with compensation.
The preferred embodiment of the present invention has been described in detail above.It should be appreciated that the ordinary skill of this field is without wound
The property made labour, which according to the present invention can conceive, makes many modifications and variations.Therefore, all technician in the art
Pass through the available technology of logical analysis, reasoning, or a limited experiment on the basis of existing technology under this invention's idea
Scheme, all should be within the scope of protection determined by the claims.
Claims (10)
1. a kind of amplifier circuit in low noise of high linearity, which is characterized in that including main amplifier circuit, booster amplifier electricity
Road and cascode circuit, wherein the main amplifier circuit include the first NMOS transistor, first capacitor, first resistor,
First inductance, the first bias voltage and the first grounding point, the auxiliary amplifier circuit include PMOS transistor, third capacitor,
4th capacitor, third inductance, the 4th inductance and the second grounding point, the cascode circuit include the second NMOS transistor, second
Capacitor, the 5th capacitor, second resistance, 3rd resistor, the second inductance, the second bias voltage, third bias voltage, third ground connection
Point, supply voltage, the cascode circuit connect the main amplifier circuit and the auxiliary amplifier circuit by conducting wire,
The main amplifier circuit connects the auxiliary amplifier circuit by conducting wire.
2. the amplifier circuit in low noise of high linearity as described in claim 1, which is characterized in that the main amplifier circuit
The mutual conductance with positive derivative is provided by first NMOS transistor in low bias state, and undertakes main put
Big function；
The auxiliary amplifier circuit provides the mutual conductance with negative derivative by the PMOS transistor, and undertakes to described
The effect of main amplifier circuit compensation；
The cascode circuit is by being the main amplifier with second NMOS transistor of the 3rd resistor common gate
Circuit and the auxiliary amplifier circuit provide low-resistance load and provide high impedance output, and inhibit Muller effect.
3. the amplifier circuit in low noise of high linearity as claimed in claim 2, which is characterized in that the first NMOS crystal
The source electrode of pipe connects first inductance, forms the amplifier architecture of source degeneracy, provides main transadmittance gain；
The drain electrode of first NMOS transistor is connected by the third capacitor with the source electrode of the PMOS transistor, as
The electric current of the main amplifier circuit and the auxiliary amplifier circuit is superimposed output end.
4. the amplifier circuit in low noise of high linearity as claimed in claim 2, which is characterized in that the third inductance and institute
It states the 4th inductance and provides DC channel for the PMOS transistor, the third capacitor and the 4th capacitor are the PMOS brilliant
Body pipe provides isolation direct current and acts on and provide resistance lower alternating current path, makes the auxiliary amplifier circuit and the main amplification
Device circuit is able to achieve the same-phase parallel output of alternating current while realizing DC current parallel output.
5. the amplifier circuit in low noise of high linearity as claimed in claim 2, which is characterized in that the booster amplifier electricity
It is a constant value that road compensates the mutual conductance with positive derivative of the main amplifier circuit in threshold value, in the feelings of low-power
The linearity is improved under condition.
6. the amplifier circuit in low noise of high linearity as described in claim 1, which is characterized in that the cascode circuit
It further include radiofrequency signal input interface and radiofrequency signal output interface.
7. the amplifier circuit in low noise of high linearity as described in claim 1, which is characterized in that the 2nd NMOS crystal
The drain electrode that the source electrode of pipe connects first NMOS transistor provides DC current for the main amplifying circuit；
The source electrode of second NMOS transistor connects the 4th inductance and provides DC current for the auxiliary amplifier circuit；
Second NMOS transistor passes through the 5th capacitor AC earth.
8. the amplifier circuit in low noise of high linearity as described in claim 1, which is characterized in that the main amplifier circuit
The auxiliary amplifying circuit in parallel under the premise of first NMOS transistor plays amplification.
9. the amplifier circuit in low noise of high linearity as described in claim 1, which is characterized in that described 4th inductance one end
The PMOS transistor and the 4th capacitor are connected, the other end connects the drain electrode and described second of first NMOS transistor
The source electrode of NMOS transistor.
10. the amplifier circuit in low noise of high linearity as described in claim 1, which is characterized in that the 4th inductance is made
For the matching inductance between the auxiliary amplifier circuit and second NMOS transistor, second NMOS transistor is eliminated
Parasitic capacitance bring at source node influences.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910526423.XA CN110149096A (en) | 2019-06-18 | 2019-06-18 | A kind of low-noise amplifier of high linearity |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910526423.XA CN110149096A (en) | 2019-06-18 | 2019-06-18 | A kind of low-noise amplifier of high linearity |
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| CN110149096A true CN110149096A (en) | 2019-08-20 |
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| CN201910526423.XA Pending CN110149096A (en) | 2019-06-18 | 2019-06-18 | A kind of low-noise amplifier of high linearity |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113746441A (en) * | 2021-07-13 | 2021-12-03 | 天津大学 | Broadband SiGe BiCMOS low noise amplifier |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113746441A (en) * | 2021-07-13 | 2021-12-03 | 天津大学 | Broadband SiGe BiCMOS low noise amplifier |
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Application publication date: 20190820 |