CN110111828A - The data manipulation method and control circuit of three-dimensional storage - Google Patents
The data manipulation method and control circuit of three-dimensional storage Download PDFInfo
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- CN110111828A CN110111828A CN201910402328.9A CN201910402328A CN110111828A CN 110111828 A CN110111828 A CN 110111828A CN 201910402328 A CN201910402328 A CN 201910402328A CN 110111828 A CN110111828 A CN 110111828A
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- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
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Abstract
The invention discloses the data manipulation methods and control circuit of a kind of 3D NAND, during executing data erasing operation, while carrying out data erasing to data storage layer, it synchronizes and data erasing is carried out to the intermediate redundant layer, after completing to the data erasing operation of the data storage layer and the intermediate redundant layer, the intermediate redundant layer is programmed, so that the intermediate redundant layer reaches preset target programmed threshold voltage.It can be seen that, technical solution of the present invention is when executing data erasing operation, intermediate redundant layer and data storage layer are first synchronized into erasing, then excessively middle intergradation redundant layer is directly programmed, so that its threshold voltage stabilization is in the target programmed threshold voltage, the threshold voltage shift problem of intermediate redundant layer is avoided, while improving the efficiency of erasing of the edge data accumulation layer adjacent with intermediate redundant layer, improves the performance of 3D NAND.
Description
Technical field
The present invention relates to memory technology fields, and saying more is related to a kind of data behaviour of three-dimensional storage (3D NAND)
Make method and control circuit.
Background technique
With the continuous development of science and technology, more and more electronic apparatus applications are to daily life and work
In the middle, huge convenience is brought for daily life and work, becomes the indispensable important tool of current people.
Memory is an important devices of many electronic equipments, stronger and stronger with electronic functionalities, needs memory
Data it is more and more, it is desirable that the memory capacity of memory is increasing.
For conventional two-dimensional surface memory, since its integration density depends primarily on list shared by single storage unit
Plane product, integrated level are highly dependent on the quality of photoetching and masking process.But it is constrained to present technological conditions limitation, even if
Photoetching and masking process precision are constantly improved using expensive process equipment, the promotion of integrated level is still limited.
In order to solve the above problem of two-dimensional surface memory, 3D NAND comes into being.3D NAND exists storage unit
Perpendicular to stacking on the direction of substrate, more storage units can be formed on lesser area, it is flat relative to conventional two-dimensional
Face memory has bigger memory capacity, is a main direction of development in current storage field.But existing 3D
There is threshold voltage shift in NAND, influence its performance.
Summary of the invention
In view of this, technical solution of the present invention provides the data manipulation method and control circuit of a kind of 3D NAND, solution
It has determined threshold voltage shift problem existing for 3D NAND, has improved its performance.
To achieve the goals above, the invention provides the following technical scheme:
A kind of data manipulation method of three-dimensional storage, the three-dimensional storage include the semiconductor substrate with well region,
In the direction perpendicular to the semiconductor substrate, the data memory module of multiple stackings is provided with above the well region, it is described
Data memory module has the data storage layer of multiple stackings, has intermediate redundant mould between the adjacent data memory module
Block, the intermediate redundant module have at least one layer of intermediate redundant layer；
The data manipulation method includes data method for deleting, and the data method for deleting includes:
While carrying out data erasing to the data storage layer, synchronizes and data erasing is carried out to the intermediate redundant layer；
After completing to the data erasing operation of the data storage layer and the intermediate redundant layer, to the intermediate redundant
Layer is programmed, so that the intermediate redundant layer reaches preset target programmed threshold voltage.
Preferably, described in described during executing the data method for deleting in above-mentioned data manipulation method
Between redundant layer be programmed and include:
Apply programming pulse to the wordline of the intermediate redundant layer, its threshold voltage is programmed into target programmed threshold electricity
Pressure.
Preferably, described in described during executing the data method for deleting in above-mentioned data manipulation method
Between redundant layer be programmed, further includes:
It is programmed verifying；
If the threshold voltage of the intermediate redundant layer is also not up to the target programmed threshold voltage, increase the programming
After the voltage of pulse, the intermediate redundant layer is programmed again；
If the voltage of the intermediate redundant layer reaches the target programmed threshold voltage, completion is programmed.
Preferably, in above-mentioned data manipulation method, it is described to the data storage layer carry out data erasing while, together
Step carries out data erasing to the intermediate redundant layer, comprising:
Apply an erasing pulse to the well region；
In the lasting timing section of the secondary erasing pulse, apply for the intermediate redundant layer and the data storage layer
One low potential.
Preferably, in above-mentioned data manipulation method, it is described to the data storage layer carry out data erasing while, together
Step carries out data erasing to the intermediate redundant layer, further includes:
Carry out erasing verifying；
If the threshold voltage of the intermediate redundant layer also miss the mark wipes threshold voltage, increase the erasing pulse
Voltage after, data erasing is carried out again to the intermediate redundant layer and the data storage layer；
If the threshold voltage of the intermediate redundant layer reaches the target erasure threshold voltage, erasure completion.
Preferably, in above-mentioned data manipulation method, the intermediate redundant layer and the data storage layer apply first
Low potential, comprising:
The intermediate redundant layer is grounded with the data storage layer.
Preferably, in above-mentioned data manipulation method, there is upper selecting pipe, the upper choosing above the data memory module of top
Selecting has upper redundant module between pipe and the top data memory module, the upper redundant module has at least one layer of upper redundancy
Layer；There is lower selecting pipe, the lower selecting pipe and the bottom data store between bottom data memory module and the well region
There is lower redundant module, the lower redundant module has at least one layer of lower redundant layer between module；
The data method for deleting further include:
In the lasting timing section of the primary erasing pulse, at a set point in time before period, be the upper redundancy
Layer and the lower redundant layer apply the second low potential, in the time point and its following sessions, so that the upper redundant layer
And the equal floating of lower redundant layer.
Preferably, described to apply for the upper redundant layer and the lower redundant layer in above-mentioned data manipulation method
Second low potential, comprising:
The upper redundant layer and the lower redundant layer are grounded.
Preferably, in above-mentioned data manipulation method, the setting time point is located at the rising edge of the erasing voltage
In period.
Preferably, in above-mentioned data manipulation method, the data manipulation method further includes data programing method, the number
Include: according to programmed method
Apply the first channel conducting voltage for the upper redundant layer and the lower redundant layer, is applied for the intermediate redundant layer
Add the second channel conducting voltage, the second channel conducting voltage is greater than the first channel conducting voltage；
It is programmed to set the data storage layer.
Preferably, in above-mentioned data manipulation method, the first channel conducting voltage only makes the upper redundant module
And the channel conducting in the lower redundant module；
The channel in the intermediate redundant module is connected in the second channel conducting voltage, and the three-dimensional is deposited
In reservoir, the channel coupling potential of non-programmed string is able to suppress the programming of the non-programmed string.
The present invention also provides a kind of control circuit of three-dimensional storage, the control circuit is for executing any of the above-described
The data manipulation method.
As can be seen from the above description, the data manipulation method and control electricity for the 3D NAND that technical solution of the present invention provides
Lu Zhong while carrying out data erasing to data storage layer, is synchronized superfluous to the centre during executing data method for deleting
Remaining layer row data erasing, after completing to the data erasing operation of the data storage layer and the intermediate redundant layer, to described
Intermediate redundant layer is programmed, so that the intermediate redundant layer reaches preset target programmed threshold voltage.As it can be seen that of the invention
Intermediate redundant layer and data storage layer are first synchronized erasing, then when executing data method for deleting by the technical solution
Excessively middle intergradation accumulation layer is directly programmed, so that its threshold voltage stabilization is avoided in the target programmed threshold voltage
The threshold voltage shift problem of intermediate redundant layer, improves the performance of 3D NAND.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is the structural schematic diagram of 3D NAND a kind of；
Fig. 2 is a kind of method flow diagram of the data method for deleting of 3D NAND；
Fig. 3 is the waveform timing chart of method shown in Fig. 2；
Fig. 4 is programmed and erased schematic illustration in a kind of 3D NAND data manipulation method；
Fig. 5 is a kind of flow diagram of several method for deleting provided in an embodiment of the present invention；
Fig. 6 is a kind of method flow diagram being programmed to intermediate redundant layer provided in an embodiment of the present invention；
Fig. 7 is a kind of method flow diagram of intermediate redundant layer data erasing provided in an embodiment of the present invention；
Fig. 8 is a kind of timing diagram of data method for deleting provided in an embodiment of the present invention；
Fig. 9 is the method flow diagram of the corresponding data method for deleting of timing diagram shown in Fig. 8；
Figure 10 is a kind of flow diagram of data programing method provided in an embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing and specific real
Applying mode, the present invention is described in further detail.
For 3D NAND, the number of plies of the data storage layer stacked is more, and storage density is bigger.But due to ditch
The depth in road hole is limited by the precision and the limit of existing etching technique, therefore when the stacking number of its data storage layer reaches one
After fixed number amount, can not further it increase.3D NAND can be set to be made of multiple data memory modules splicing stacking, quite
In the entire channel pore structure of 3D NAND is divided into multiple portions, each data memory module independently forms channel hole, adjacent to deposit
It stores up and is separated between module by redundant layer, the implementation of the 3D NAND is as shown in Figure 1, overcome the depth in hole by existing
The precision of etching technique and the restricted problem of the limit, can be further improved storage density.
With reference to Fig. 1, Fig. 1 is the structural schematic diagram of 3D NAND a kind of, and shown 3D NAND includes having partly leading for well region 11
Body substrate 10 is provided with more on the direction (X-direction in Fig. 1) perpendicular to the semiconductor substrate 10 above the well region 11
The data memory module 12 of a stacking, the data memory module 12 has the data storage layer 121 of multiple stackings, adjacent described
There is intermediate redundant module 13, the intermediate redundant module 13 has at least one layer of intermediate redundant layer between data memory module 12
131.In general, the well region 11 is P type trap zone.
The number that data memory module 12 in 3D NAND can be arranged according to demand is n, and n is the positive integer greater than 1, Fig. 1
In be only to be illustrated by taking n=2 as an example, technical solution of the present invention is not especially limited the value of n.It can be according to demand
The number of plies that data storage layer 121 in each data memory module 12 is arranged is m, and m is the positive integer greater than 1, the technology of the present invention side
Case is not especially limited the value of m.In the same intermediate redundant module 13, the intermediate redundant layer 131 can be one layer
Or multilayer, when with multilayer intermediate redundant layer 131, multilayer intermediate redundant layer 131 stacks setting, Ke Yigen in the X direction
Its number of plies is set according to demand, its number of plies is not especially limited.
As shown in Figure 1, top data memory module 12b above have upper selecting pipe M2, the upper selecting pipe M2 with it is described
There is upper redundant module 14, the upper redundant module 14 has at least one layer of upper redundant layer between the data memory module 12b of top
141；There is lower selecting pipe M1, the lower selecting pipe M1 and the bottom between bottom data memory module 12a and the well region 11
There is lower redundant module 15, the lower redundant module 15 has at least one layer of lower redundant layer between portion data memory module 12a
151。
Equally, the upper redundant layer 141 and the lower redundant layer 151 can be one layer or multilayer.With described in multilayer
When upper redundant layer 141, upper redundant layer 141 described in multilayer stacks setting in the X direction, its number of plies can be arranged according to demand, right
Its number of plies is not especially limited.With when lower redundant layer 151, lower redundant layer 151 described in multilayer stacks in the X direction described in multilayer
Setting, its number of plies can be arranged according to demand, be not especially limited to its number of plies.
In general, data method for deleting is as shown in Fig. 2, Fig. 2 is one kind when carrying out data erasing to 3D NAND shown in Fig. 1
The method flow diagram of the data method for deleting of 3D NAND, the data method for deleting include:
Step S11: starting after executing the data method for deleting, applies an erasing pulse for well region, to data storage layer
Carry out data erasing.
Step S12: obtaining the current voltage value of data storage layer, in order to carry out erasing verifying.
Step S13: judging whether the current voltage of data storage layer reaches targets threshold, if so, completing data erasing
Process, if not, after increasing erasing pulse voltage, return step S11.
The timing diagram of data method for deleting shown in Fig. 2 is as shown in figure 3, Fig. 3 is the waveform timing chart of method shown in Fig. 2.Into
When row data are wiped, higher erasing voltage V1 (amplitude of erasing pulse, about 20V) is provided for well region by erasing pulse,
Data storage layer ground connection carries out data erasing.
In erasing pulse initial time period, for each redundant module, redundant layer ground connection keeps 0V, waits erasing pulses
When voltage value rises to certain phase, redundant layer becomes floating from ground connection, redundant layer with erasing pulse voltage value rising
It is coupled out a potential.Start the time point of floating by controlling redundant layer, so that the potential that redundant layer finally couples is hanging down
Directly on channel direction and the electric field that is parallel on channel direction all cannot be excessive, to prevent the threshold voltage of redundant layer more
It drifts about after secondary program/erase circulation.In Fig. 3, the amplitude of erasing pulse is V1, and the vertical dotted line in the left side indicates erasing pulse
Rise initial time, the vertical dotted line in the right indicates that the time point, the time point were located in the rising edge period of erasing pulse.?
In the rising edge period, erasing pulse continuously gradually rises up to amplitude V1 by low potential (such as 0V).
As shown in figure 4, Fig. 4 is programmed and erased schematic illustration in a kind of 3D NAND data manipulation method, and in figure, V5
Grid (wordline) voltage of selecting pipe in expression, V2 is program voltage, and expression is applied to the data storage layer 121 being currently programmed
Grid (wordline) on voltage, as shown in Figure 4,3D NAND have data programming process and data erasing process, using Fig. 2
Shown data method for deleting will lead to following two problems:
First problem is that when carrying out data programming, up/down redundant layer adds a lesser voltage V3, and (redundant layer as above adds
Voltage V3_1, lower redundant layer making alive V3_2, the two can be identical or different) so that the respective channel conducting of up/down redundant layer
, and intermediate redundant layer will add a bigger voltage V4, not only guarantee that its channel is connected, it is also necessary to guarantee non-programmed
The channel of string is coupled out higher potential to inhibit the programming of non-programmed string.So, programming is gone here and there, intermediate redundant layer
A higher V4 conducting voltage is born, after multiple program/erase circulation, the threshold voltage of intermediate redundant layer can float
It moves.Wherein, data storage layer and redundant layer can be equivalent to MOS device in 3D NAND, have threshold voltage.3D NAND tool
There are multiple storage units, storage unit has multiple strings, and each string has multiple channel structures as shown in Figure 1, each channel junction
Structure has the memory module of multiple stackings.When 3D NAND executes data erasing operation, all data storage layers are wiped simultaneously
It removes, when being programmed operation, is programmed one by one with accumulation layer in a string.
Second Problem is, when carrying out data erasing, if the method that intermediate redundant layer uses above-mentioned floating after being first grounded,
The erasing electric field (region as shown in two dotted ellipses in Fig. 4 right figure) of the data storage layer of intermediate redundant layer neighbour will be will affect,
Its efficiency of erasing is reduced, wipe it can not deep as the data storage layer far from intermediate redundant layer.
To solve the above problems, the embodiment of the invention provides the data manipulation method of 3D NAND a kind of, the data behaviour
It include data method for deleting as method, the data method for deleting is as shown in figure 5, Fig. 5 is one kind provided in an embodiment of the present invention
The flow diagram of number method for deleting, the data method for deleting include:
Step S21: it while carrying out data erasing to the data storage layer, synchronizes and the intermediate redundant layer is counted
According to erasing.
Step S22: after completing to the data erasing operation of the data storage layer and the intermediate redundant layer, to described
Intermediate redundant layer is programmed, so that the intermediate redundant layer reaches preset target programmed threshold voltage.
In method shown in Fig. 5, during executing the data method for deleting, intermediate redundant layer is programmed includes:
Apply programming pulse to the wordline of the intermediate redundant layer, its threshold voltage is programmed into target programmed threshold voltage.
Specifically, during executing the data method for deleting, method such as Fig. 6 institute that intermediate redundant layer is programmed
Showing, Fig. 6 is a kind of method flow diagram being programmed to intermediate redundant layer provided in an embodiment of the present invention, this method comprises:
The wordline (grid) of S31: Xiang Suoshu intermediate redundant layer of step applies programming pulse.
Step S32: it is programmed verifying.
The threshold voltage for obtaining intermediate redundant layer, for being programmed verifying.
Step S33: judge whether the threshold voltage of intermediate redundant layer reaches target programmed threshold voltage.
If it is, programming is completed, if not, return step S31 carries out again it after the voltage of increase programming pulse
Secondary programming.In intermediate redundant layer miss the mark programmed threshold voltage, by executing programming operation repeatedly, until its threshold value electricity
Pressure reaches the target programmed threshold voltage.
In method shown in Fig. 5, it is described to the data storage layer carry out data erasing while, synchronize superfluous to the centre
Remaining layer carries out the process of data erasing as shown in fig. 7, Fig. 7 is a kind of intermediate redundant layer data erasing provided in an embodiment of the present invention
Method flow diagram, this method comprises:
S41: Xiang Suoshu well region of step applies an erasing pulse；
Step S42: being the intermediate redundant layer and the data storage layer in the lasting timing section of the secondary erasing pulse
Apply the first low potential.
In method shown in Fig. 7, it is described to the data storage layer carry out data erasing while, synchronize superfluous to the centre
Remaining layer carries out data erasing, further includes:
Step S43: erasing verifying is carried out；
Based on erasing verification result execute setting operation, specifically, if the threshold voltage of the intermediate redundant layer also not
Reach target erasure threshold voltage, after the voltage for increasing the erasing pulse, the intermediate redundant layer and the data are deposited
Reservoir carries out data erasing again；If the threshold voltage of the intermediate redundant layer reaches the target erasure threshold voltage,
Erasure completion.In intermediate redundant layer erasing miss the mark erasing threshold voltage, by executing this erasing operation repeatedly, until
Its threshold voltage reaches the target erasure threshold voltage.Optionally, the intermediate redundant layer is applied with the data storage layer
Add the first low potential, comprising: be grounded the intermediate redundant layer with the data storage layer.
In mode shown in Fig. 7, the data method for deleting further include: in the lasting timing section of the primary erasing pulse
It is interior, at a set point in time before period, apply the second low potential for the upper redundant layer and the lower redundant layer, in institute
Time point and its following sessions are stated, so that the upper redundant layer and the equal floating of lower redundant layer.Optionally, described is described
Upper redundant layer and the lower redundant layer apply the second low potential, comprising: by the upper redundant layer and the lower redundant layer
It is grounded.Wherein, the setting time point is located at the setting position of the rising edge of the erasing voltage.
It is further described below with reference to Fig. 8 and Fig. 9 data method for deleting described in the embodiment of the present invention:
With reference to Fig. 8 and Fig. 9, Fig. 8 is a kind of timing diagram of data method for deleting provided in an embodiment of the present invention, Fig. 9 Fig. 8
The method flow diagram of the corresponding data method for deleting of shown timing diagram.
As shown in figure 8, when carrying out data erasing, intermediate redundant layer ground connection, together with all data storage layers to be wiped
Erasing.After erasing, intermediate redundant layer is programmed and reaches desired target programmed threshold voltage.
It can be precisely controlled the threshold voltage of intermediate redundant layer when carrying out data erasing in this way, wiped without concern of data
The drift of Cheng Zhongqi threshold voltage and influence proper device operation.And the data storage layer of neighbour's intermediate redundant layer can also be improved
Efficiency of erasing, reduce the data storage layer and other data storage layers erasing state difference.And it is not needed when wiping additional
Voltage source control the operation for being grounded to floating of intermediate redundant layer, simplify circuit design.Meanwhile programming intermediate redundant layer
The time it takes can be ignored substantially compared to the time required for entire erase process.
Method includes: as shown in Figure 9
Step S51: when starting to execute data method for deleting, based on timing diagram shown in Fig. 8, erasing pulse is provided for well region.
Continue in timing section in an erasing pulse, it is 0V that data storage layer, which is persistently grounded, and intermediate redundant layer persistently connects
Ground is 0V, and up/down redundant layer and up/down selecting pipe are first to be grounded floating again, and same as mentioned above, details are not described herein.
After the completion of S52: erasing pulse of step effect, erasing verifying is carried out.
Step S53: after judging data erasing, whether intermediate redundant layer threshold voltage reaches target erasure threshold voltage.Such as
Fruit is no, carries out erasing operation again after increasing the voltage of erasing pulse, implementation method is for example above-mentioned, and details are not described herein.If so,
Execute step S54.
Step S54: being programmed intermediate redundant layer, and implementation method is for example above-mentioned, and details are not described herein.
Step S55: certification is programmed to intermediate redundant layer, implementation method is for example above-mentioned, and details are not described herein.
Step S56: after judging data programming, whether intermediate redundant layer threshold voltage reaches target programmed threshold voltage.It is real
Existing method is for example above-mentioned, and details are not described herein.
In the embodiment of the present invention, the data manipulation method further includes data programing method, and the data programing method is such as
Shown in Figure 10, Figure 10 is a kind of flow diagram of data programing method provided in an embodiment of the present invention, this method comprises:
Step S61: apply the first channel conducting voltage (such as above-mentioned voltage for the upper redundant layer and the lower redundant layer
V3), apply the second channel conducting voltage (such as above-mentioned voltage V4) for the intermediate redundant layer, the second channel conducting voltage is big
In the first channel conducting voltage；
Step S62: it is programmed to set the data storage layer.
In method shown in Figure 10, the first channel conducting voltage only makes the upper redundant module and the lower redundancy
Channel conducting in module；The channel in the intermediate redundant module is connected in the second channel conducting voltage, and makes
In the three-dimensional storage, the channel coupling potential of non-programmed string is able to suppress the programming of the non-programmed string.Pass through the application
Embodiment the method compared with the existing technology, can make non-programmed string couple biggish potential, inhibit described non-to reach
Program the programming of string.
As above-mentioned, for 3D NAND, process operation data includes programming process and erase process, therefore the present invention is real
It applies in example, data manipulation method includes data programing method and data method for deleting, in general, 3D NAND needs advanced line number
Data erasing is carried out according to programming, then based on demand.
As can be seen from the above description, in data manipulation method described in the embodiment of the present invention, data wiping is being carried out to 3D NAND
Except when, intermediate redundant layer and all data storage layers are subjected to data erasing, intermediate redundant layer and data storage layer data simultaneously
After erasure completion, then data programming is carried out to intermediate redundant layer, so that it is with target programmed threshold voltage.
Data manipulation method described in the embodiment of the present invention at least has the advantages that
Firstly, intermediate redundant layer can be precisely controlled by executing the data method for deleting in the data manipulation method
Threshold voltage, without worry threshold voltage drift and influence proper device operation.
Secondly, the efficiency of erasing with intermediate redundant layer neighbour's data storage layer can be improved, reduce close with intermediate redundant layer
The difference of adjacent data storage layer and other data storage layers erasing state.Routine data method for deleting is the data wiped in needs
Apply an erasing voltage in accumulation layer, for a certain data storage layer, will receive the erasing voltage V6 band of itself application
The electric field E1 come, will also be by the erasing voltage V6 bring fringe field of two layers of data storage layer from its two sides neighbour
E2, so for this layer data accumulation layer, the electric field being finally subject to is E1+E2. and (superfluous with centre for edge data accumulation layer
The adjacent data storage layer of remaining layer), since it is next to intermediate redundant layer, because intermediate redundant layer does not need erasing, institute
It is smaller with respect to V6 with intermediate redundant layer voltage, so fringe field E2 brought by intermediate redundant layer also can be less than normal.So edge
The final electric field of data storage layer than intermediate data storage layer (with the data storage layer of intermediate redundant layer not neighbour) than it is low, wipe
Except it is also more shallow.And the intermediate redundant layer in the embodiment of the present invention also assists in erasing, can also be applied V6 voltage, such number of edges
According to accumulation layer and the erasing state of intermediate data storage layer just without any difference.
And data do not need additional voltage source to control the operation for being grounded to floating of intermediate redundant layer when wiping, letter
Circuit design is changed.
Based on the above embodiment, another embodiment of the present invention provides a kind of control circuit of three-dimensional storage, the controls
Circuit processed is for executing data manipulation method described in above-described embodiment, therefore the control circuit can be precisely controlled intermediate redundant layer
Threshold voltage, without worry threshold voltage drift and influence proper device operation, can also improve close with intermediate redundant layer
The efficiency of erasing of adjacent data storage layer reduces and wipes state with the data storage layer of intermediate redundant layer neighbour and other data storage layers
Difference, and when data are wiped, does not need additional voltage source to control the operation for being grounded to floating of intermediate redundant layer, electricity
Line structure is simple.
Each embodiment in this specification is described in a progressive manner, the highlights of each of the examples are with other
The difference of embodiment, the same or similar parts in each embodiment may refer to each other.For being controlled disclosed in embodiment
For circuit, since it is corresponding with data manipulation method disclosed in embodiment, so being described relatively simple, related place ginseng
See that data manipulation method corresponding part illustrates.
It should also be noted that, herein, relational terms such as first and second and the like are used merely to one
Entity or operation are distinguished with another entity or operation, without necessarily requiring or implying between these entities or operation
There are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant are intended to contain
Lid non-exclusive inclusion, so that article or equipment including a series of elements not only include those elements, but also
It including other elements that are not explicitly listed, or further include for this article or the intrinsic element of equipment.Do not having
In the case where more limitations, the element that is limited by sentence "including a ...", it is not excluded that in the article including above-mentioned element
Or there is also other identical elements in equipment.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, of the invention
It is not intended to be limited to the embodiments shown herein, and is to fit to and the principles and novel features disclosed herein phase one
The widest scope of cause.
Claims (12)
1. a kind of data manipulation method of three-dimensional storage, which is characterized in that the three-dimensional storage includes half with well region
Conductor substrate is provided with the data storage of multiple stackings in the direction perpendicular to the semiconductor substrate above the well region
Module, the data memory module have the data storage layer of multiple stackings, has between the adjacent data memory module
Between redundant module, the intermediate redundant module has at least one layer of intermediate redundant layer；
The data manipulation method includes data method for deleting, and the data method for deleting includes:
While carrying out data erasing to the data storage layer, synchronizes and data erasing is carried out to the intermediate redundant layer；
Complete to the data erasing operation of the data storage layer and the intermediate redundant layer after, to the intermediate redundant layer into
Row programming, so that the intermediate redundant layer reaches preset target programmed threshold voltage.
2. data manipulation method according to claim 1, which is characterized in that executing the data method for deleting process
In, described be programmed to the intermediate redundant layer includes:
Apply programming pulse to the wordline of the intermediate redundant layer, its threshold voltage is programmed into target programmed threshold voltage.
3. data manipulation method according to claim 2, which is characterized in that executing the data method for deleting process
In, it is described that the intermediate redundant layer is programmed, further includes:
It is programmed verifying；
If the threshold voltage of the intermediate redundant layer is also not up to the target programmed threshold voltage, increase the programming pulse
Voltage after, the intermediate redundant layer is programmed again；
If the threshold voltage of the intermediate redundant layer reaches the target programmed threshold voltage, completion is programmed.
4. data manipulation method according to claim 1, which is characterized in that described to carry out data to the data storage layer
While erasing, synchronizes and data erasing is carried out to the intermediate redundant layer, comprising:
Apply an erasing pulse to the well region；
In the lasting timing section of the secondary erasing pulse, it is low to apply first with the data storage layer for the intermediate redundant layer
Current potential.
5. data manipulation method according to claim 4, which is characterized in that described to carry out data to the data storage layer
While erasing, synchronizes and data erasing is carried out to the intermediate redundant layer, further includes:
Carry out erasing verifying；
If the threshold voltage of the intermediate redundant layer also miss the mark wipes threshold voltage, increase the electricity of the erasing pulse
After pressure, data erasing is carried out again to the intermediate redundant layer and the data storage layer；
If the threshold voltage of the intermediate redundant layer reaches the target erasure threshold voltage, erasure completion.
6. data manipulation method according to claim 4, which is characterized in that the intermediate redundant layer and the data store
Layer applies the first low potential, comprising:
The intermediate redundant layer is grounded with the data storage layer.
7. data manipulation method according to claim 4, which is characterized in that have upper choosing above the data memory module of top
Pipe is selected, there is upper redundant module between the upper selecting pipe and the top data memory module, the upper redundant module has
Redundant layer at least one layer；There is lower selecting pipe, the lower selecting pipe and institute between bottom data memory module and the well region
Stating has lower redundant module between bottom data memory module, the lower redundant module has at least one layer of lower redundant layer；
The data method for deleting further include:
In the lasting timing section of the primary erasing pulse, at a set point in time before period, be the upper redundant layer with
And the lower redundant layer applies the second low potential, in the time point and its following sessions so that the upper redundant layer and
The equal floating of lower redundant layer.
8. data manipulation method according to claim 7, which is characterized in that it is described for the upper redundant layer and it is described under
Redundant layer applies the second low potential, comprising:
The upper redundant layer and the lower redundant layer are grounded.
9. data manipulation method according to claim 7, which is characterized in that the setting time point is located at the erasing electricity
In the period of the rising edge of pressure.
10. according to the described in any item data manipulation methods of claim 7-9, which is characterized in that the data manipulation method is also
Including data programing method, the data programing method includes:
Apply the first channel conducting voltage for the upper redundant layer and the lower redundant layer, applies for the intermediate redundant layer
Two channel conducting voltages, the second channel conducting voltage are greater than the first channel conducting voltage；
It is programmed for the intermediate redundant layer.
11. data manipulation method according to claim 10, which is characterized in that the first channel conducting voltage only makes
Channel conducting in the upper redundant module and the lower redundant module；
The channel in the intermediate redundant module is connected in the second channel conducting voltage, and makes the three-dimensional storage
In, the channel coupling potential of non-programmed string is able to suppress the programming of the non-programmed string.
12. a kind of control circuit of three-dimensional storage, which is characterized in that the control circuit is for executing such as claim 1-11
Any one data manipulation method.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160005747A1 (en) * | 2014-07-02 | 2016-01-07 | SK Hynix Inc. | three dimensional semiconductor device |
| US20160293627A1 (en) * | 2015-03-31 | 2016-10-06 | Jongwon Kim | Semiconductor memory devices and methods for manufacturing the same |
| CN108565265A (en) * | 2018-04-17 | 2018-09-21 | 长江存储科技有限责任公司 | A kind of three-dimensional storage and its data manipulation method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20160005747A1 (en) * | 2014-07-02 | 2016-01-07 | SK Hynix Inc. | three dimensional semiconductor device |
| US20160293627A1 (en) * | 2015-03-31 | 2016-10-06 | Jongwon Kim | Semiconductor memory devices and methods for manufacturing the same |
| CN108565265A (en) * | 2018-04-17 | 2018-09-21 | 长江存储科技有限责任公司 | A kind of three-dimensional storage and its data manipulation method |
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