CN110091442B - Cutter for cutting wafer and cutting method - Google Patents
Cutter for cutting wafer and cutting method Download PDFInfo
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- CN110091442B CN110091442B CN201910400682.8A CN201910400682A CN110091442B CN 110091442 B CN110091442 B CN 110091442B CN 201910400682 A CN201910400682 A CN 201910400682A CN 110091442 B CN110091442 B CN 110091442B
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- blade
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
- B28D—WORKING STONE OR STONE-LIKE MATERIALS
- B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
- B28D5/0058—Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material
- B28D5/007—Use, recovery or regeneration of abrasive mediums
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
- B28D—WORKING STONE OR STONE-LIKE MATERIALS
- B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
- B28D5/02—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by rotary tools, e.g. drills
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Abstract
The invention relates to a tool for cutting wafers, comprising: a first blade having a surface made of particulate matter having a first size; a second blade disposed on a first side of the first blade such that the second blade at least partially covers the first side of the first blade, wherein the second blade has a surface made of particulate matter having a second size and wherein the second size is smaller than the first size; and a third blade disposed on the second side of the first blade such that the third blade at least partially covers the second side of the first blade, wherein the third blade has a surface made of particulate matter having a third size, and wherein the third size is smaller than the first size. The invention can effectively avoid the stress from damaging the semiconductor device or the substrate on which the semiconductor device is positioned, thereby improving the yield and the reliability of the chip.
Description
Technical Field
The present invention relates generally to the field of semiconductor manufacturing, and more particularly to a tool for cutting a wafer. The invention further relates to a method for cutting wafers using a tool according to the invention.
Background
Nowadays, electronic products have entered into the aspects of modern life. Whereas the core components of most electronic products such as computers, mobile phones, etc., like processors, memories, etc., contain semiconductor devices. Semiconductor devices have played a vital role in modern information devices.
Wafer (also known as wafer) dicing is an important process in semiconductor processing, which aims to dice a wafer, in which semiconductor structures (such as image sensor chips, etc.) have been typically formed, so that the semiconductor structures are physically separated from each other.
Wafers are currently cut primarily by laser or dicing knives. As the demand for semiconductor integration increases, the number of chips per wafer needs to be increased, and thus the scribe groove area of the dicing area must be gradually reduced. In the case of a mechanical knife cutting process, the reduced cutting area increases the risk of damage to the chip from the stresses generated during cutting.
Fig. 1A-1B illustrate a dicing process and a dicing blade, respectively, of a conventional image sensor wafer, wherein a d region is a scribe line for dicing disposed between adjacent image sensors. As shown in fig. 1A-1B, in the related art dicing process, as the area of the dicing groove d is continuously reduced, the distance of the dicing blade 21 from the semiconductor structure on the wafer, such as an image sensor, is also continuously reduced at the time of dicing. This increases the risk that the stress generated during dicing will damage the chip or the substrate on which the chip is located.
A dicing scheme is disclosed from chinese patent application 201811455757.4 entitled "semiconductor device and method of forming the same, dicing method" by the present applicant, wherein an isolation structure is arranged in a dicing channel, wherein dicing acts on the isolation structure, which acts as a stress relief space, reducing stress from continuing to propagate into the interior of the semiconductor structure, thereby reducing damage to the carrier wafer of the semiconductor structure. However, in this solution, the tool needs to be precisely aligned to the isolation structure at the time of dicing, otherwise stress may still be transferred to the semiconductor structure. Furthermore, in the case of using this scheme, there may still occur a case where the semiconductor device or its substrate is damaged by stress.
Disclosure of Invention
Starting from the prior art, the task of the present invention is to provide a cutting tool and a cutting method for cutting a wafer, by which a semiconductor device or a substrate thereof can be effectively prevented from being damaged by stress, thereby improving the yield and reliability of chips.
In a first aspect of the invention, this task is solved by a tool for cutting wafers, comprising:
a first blade having a surface made of particulate matter having a first size;
a second blade disposed on a first side of the first blade such that the second blade at least partially covers the first side of the first blade, wherein the second blade has a surface made of particulate matter having a second size and wherein the second size is smaller than the first size; and
a third blade disposed on the second side of the first blade such that the third blade at least partially covers the second side of the first blade, wherein the third blade has a surface made of particulate matter having a third size, and wherein the third size is smaller than the first size.
It should be noted in the present invention that "the surface is made of particles having a certain size" means that the particles contained in the surface are substantially the size, and does not mean that all the particles contained in the surface are absolutely the size, but that there is a reasonable error in the size of each particle as long as the technical effect of the present invention can be achieved.
In a preferred embodiment of the invention, it is provided that the wafer comprises a scribe line for cutting with the tool, and wherein the scribe line comprises isolation structures made of a material different from the material of the wafer, and the thickness of the first blade corresponds to the distance between the isolation structures, and the thickness of the second blade and the third blade corresponds to the thickness of the respective isolation structures. Through the preferred scheme, the risk of stress damage to the semiconductor device or the substrate where the semiconductor device is located can be further reduced, because the isolation structure can serve as a stress release space during cutting due to the fact that the isolation structure is made of a material different from that of the wafer, stress is reduced from being continuously transmitted to the interior of the semiconductor structure, and damage to a bearing wafer of the semiconductor structure is reduced. In this preferred embodiment, the cutting tool is aligned with the spacer structure to perform the cutting. The isolation structure comprises, for example, a material that facilitates cutting, such as a material that is less rigid than the substrate.
In one embodiment of the invention, it is provided that the material of the isolation structure comprises one or more of the following: silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride, and silicon oxycarbonitride.
In a further embodiment of the invention, it is provided that the particles are sand. It should be noted here that the tool material or tool surface material of the present invention is not limited to grit, but other particulate matter such as boron nitride particles, boron carbide particles, corundum particles, carbide (e.g., silicon carbide) particles, and the like may be employed. The material of the tool can be freely selected according to different application occasions.
In a further embodiment of the invention, it is provided that the ends of the first, second and third cutting insert transition smoothly into one another to form a curved end of the tool. By means of this development, it is possible to form the tool end with an arc-shaped continuous shape, thereby being better adapted to the cutting task. Other tool end shapes are also contemplated under the teachings of the present invention, depending on the application. In the case of other tool end shapes, the ends of the first, second and third inserts may be arranged accordingly to form the desired shape after engagement of the three.
In a further embodiment of the invention, it is provided that the tool has the shape of a ring with a central circular opening. Other shapes of the tool are also conceivable, depending on the application.
In a further embodiment of the invention, it is provided that image sensor chips are formed on the wafer. The present invention can be applied to other semiconductor manufacturing processes besides the image sensor chip.
In a further embodiment of the invention, it is provided that a protective ring is arranged on both sides of the scribe line. By providing the guard ring, the cutter can be prevented from deviating from the scribing groove.
In a second aspect of the invention, the aforementioned task is solved by a wafer cutting device having a knife according to the invention.
In a third aspect of the invention, the aforementioned task is solved by a method for cutting a wafer using a tool according to the invention, comprising the steps of:
aligning a first blade of a cutter to a cutting position of a wafer; and
the wafer is cut using a cutter.
Here, the cutting angle, i.e. the knife, is preferably perpendicular to the cutting surface. In addition, in the case where the isolation structure is provided, the cutter needs to be aligned with the isolation structure and then cut.
The present invention is based on the following insight of the inventors: the inventor of the invention has found that, in the wafer cutting process, the cutting tool grinds and removes the scribed silicon material through the particulate matters (such as grits) carried by the cutting tool, so that the stress generated during cutting can cause hidden cracking/edge breakage near the cutting surface of the wafer (i.e. the cutting interface of the substrate where the chip is located), wherein the larger the grit size of the cutting tool is, the more serious the hidden cracking/edge breakage is; the cutting tool is designed into a combined structure, wherein the middle part of the cutting tool is provided with the particles with larger sizes so as to provide enough grinding or cutting capability, and the side surface of the cutting tool is provided with the particles with smaller sizes so as to reduce the risk of hidden cracking/edge breakage, so that the semiconductor device or the substrate where the semiconductor device is positioned can be effectively prevented from being damaged by stress, and the yield and the reliability of a chip are improved.
Drawings
The invention is further elucidated with reference to specific embodiments in the following description, in conjunction with the appended drawings.
FIGS. 1A-1B illustrate a dicing process and a dicing tool for an image sensor wafer according to the prior art;
FIG. 2 shows a schematic view of a tool for cutting wafers according to the present invention; and
fig. 3A-3B show front and top views of a tool for cutting wafers according to the present invention.
Detailed Description
It should be noted that the components in the figures may be exaggerated and not necessarily to scale for illustrative purposes. In the figures, identical or functionally identical components are provided with the same reference symbols.
In the present invention, "disposed on …", "disposed over …" and "disposed over …" do not exclude the presence of an intermediate therebetween, unless otherwise specified.
In the present invention, the embodiments are only intended to illustrate the aspects of the present invention, and should not be construed as limiting.
In the present invention, the terms "a" and "an" do not exclude the presence of a plurality of elements, unless otherwise specified.
It is further noted herein that in embodiments of the present invention, only a portion of the components or assemblies may be shown for clarity and simplicity, but those of ordinary skill in the art will appreciate that, given the teachings of the present invention, required components or assemblies may be added as needed in a particular scenario.
It is also noted herein that, within the scope of the present invention, the terms "same", "equal", and the like do not mean that the two values are absolutely equal, but allow some reasonable error, that is, the terms also cover the meanings of "substantially the same", "substantially equal", and "substantially equal". By analogy, in the present invention, the terms "perpendicular", "parallel" and the like in the directions of the tables also cover the meanings of "substantially perpendicular", "substantially parallel".
The numbering of the steps of the methods of the present invention does not limit the order of execution of the steps of the methods. Unless specifically stated, the method steps may be performed in a different order.
Fig. 2 shows a schematic view of a tool 100 for cutting wafers according to the present invention.
The tool 100 according to the invention is used for cutting a wafer 106. Wafer 106 may or may not have semiconductor structures already formed thereon, such as image sensors. The cutter 100 according to the present invention can effectively reduce the hidden cracks/cracks near the cut surface and other damages caused by stress, thereby improving the yield and the quality of semiconductor devices. Further, a guard ring 107 and an isolation structure 108 are optionally disposed on the wafer 106. Guard rings 107 are provided on both sides of, i.e., at least partially surrounding, the scribe line (i.e., the cutting site) to prevent the cutter 100 from deviating from the scribe line. The isolation structure 108 is arranged in a scribe lane in the wafer 106, and wherein the isolation structure 108 is of a different material than the wafer 106. By providing the isolation structure 108, the risk of stress damage to the semiconductor device or the substrate where the semiconductor device is located can be further reduced, because the isolation structure can serve as a stress release space during dicing due to the difference of the material of the isolation structure from the material of the wafer, and the stress is reduced from being continuously transmitted to the inside of the semiconductor structure, so that the damage to the carrier wafer of the semiconductor structure is further reduced on the basis of the invention. It should be noted, however, that the guard ring 106 and isolation structure 108 are not required and in other embodiments these structures may not be provided.
As shown in fig. 2, the tool 100 according to the present invention comprises the following components:
a first blade 101 made of particulate matter having a first size. In other embodiments, the first blade 101 may also have only a surface, such as a cutting surface, made of particles of a first size. Such as gravel (sand and/or gravel), boron nitride particles, boron carbide particles, corundum particles, carbide (e.g., silicon carbide) particles, and the like. It should be noted in the present invention that "the blade or the surface is made of particles having a certain size" means that the particles contained in the blade or the surface are substantially the size, and does not mean that all the particles contained in the blade or the surface are absolutely the size, but that a reasonable error in the size of each particle is allowed as long as the technical effect of the present invention, i.e., the stress of the cut surface is reduced.
A second blade 102 arranged on a first side (here the left side) of the first blade 101 such that the second blade 102 at least partially covers the first side of the first blade 101, wherein the second blade 102 is made of particulate matter having a second size, and wherein the second size is smaller than the first size. In other embodiments, the second blade 102 may also have only a surface, such as a cutting surface, made of a second size of particulate matter. The second size being smaller than the first size means, for example, that the average size (particle size) of the particles of the second size is smaller than the average size (particle size) of the particles of the first size. Here, the second blade 102 substantially completely covers the first side of the first blade 101, but in other embodiments the two may not completely coincide, e.g. at the center. Such as gravel (sand and/or gravel), boron nitride particles, boron carbide particles, corundum particles, carbide (e.g., silicon carbide) particles, and the like.
A third blade 103 arranged on a second side (here the right side) of the first blade 101 such that the third blade 103 at least partially covers the second side of the first blade 101, wherein the third blade 102 is made of particulate matter having a third size, and wherein the third size is smaller than the first size. In other embodiments, the third blade 103 may also have only a surface, such as a cutting surface, made of third size particulate matter. The third size being smaller than the first size means, for example, that the average size (particle size) of the particles of the third size is smaller than the average size (particle size) of the particles of the first size. Here, the third blade 103 substantially completely covers the second side of the first blade 101, but in other embodiments the two may not completely coincide, e.g. at the center. Such as gravel (sand and/or gravel), boron nitride particles, boron carbide particles, corundum particles, carbide (e.g., silicon carbide) particles, and the like. Wherein the second size and the third size are smaller than the first size. The second blade 102 and the third blade 103 may be the same or different, e.g., the average size of the particles is the same or different.
The ends of the first, second and third blades 101 and 103 may be configured to smoothly transition with each other to form the curved end 105 of the tool 100. Other shapes are also conceivable, depending on the application. In the case of other cutter end shapes, the ends of the first, second and third blades 101 and 103 may be arranged accordingly to form the desired shape after engagement of the three. 3A-3B, the cutter 100 may be configured as a ring with a centered circular hole. Other shapes and configurations are also contemplated under the teachings of the present invention.
The flow of the cutter for cutting a wafer according to the present invention is explained below.
First, the tool 100 is aligned with a cutting groove or a cutting portion of the wafer 106. With the spacer structures 108 arranged, the second blade 102 and the third blade 103 of the tool 100 are each aligned with one spacer structure 108 each. For example, the side 104 of the tool 100 must not extend beyond the spacer structure 108. To this end, the arrangement of the isolation structures 108 in the wafer 106 is adapted to the thickness of the second blade 102 and the third blade 103, such that they can be aligned, or vice versa, with a thickness adapted to the arrangement of the isolation structures 108.
The wafer 106 is then diced using the tool 100. During this cutting process, the larger particles of the first blade 101 will provide sufficient cutting or grinding capability, while the smaller particles of the second and third blades 102, 103 will create less stress at the cut surface, thereby reducing the formation of cracks, chipping, fissures, or other defects near the cut surface, and thereby improving yield and product quality.
The present invention is based on the following insight of the inventors: the inventor of the invention has found that, in the wafer cutting process, the cutting tool grinds and removes the scribed silicon material through the particulate matters (such as grits) carried by the cutting tool, so that the stress generated during cutting can cause hidden cracking/edge breakage near the cutting surface of the wafer (i.e. the cutting interface of the substrate where the chip is located), wherein the larger the grit size of the cutting tool is, the more serious the hidden cracking/edge breakage is; the cutting tool is designed into a combined structure, wherein the middle part of the cutting tool is provided with the particles with larger sizes so as to provide enough grinding or cutting capability, and the side surface of the cutting tool is provided with the particles with smaller sizes so as to reduce the risk of hidden cracking/edge breakage, so that the semiconductor device or the substrate where the semiconductor device is positioned can be effectively prevented from being damaged by stress, and the yield and the reliability of a chip are improved.
Although some embodiments of the present invention have been described herein, those skilled in the art will appreciate that they have been presented by way of example only. Numerous variations, substitutions and modifications will occur to those skilled in the art in light of the teachings of the present invention without departing from the scope thereof. It is intended that the following claims define the scope of the invention and that methods and structures within the scope of these claims and their equivalents be covered thereby.
List of reference numerals
10 photosensitive layer of image sensor
11 image sensor circuit layer
12 connecting layer
13 carrier wafer or digitally processed wafer
14 protection ring (Seal ring)
15 peripheral circuit
16 isolation groove
17 Filter layer
18 micro lens
19 transmission gate TG
20 metal connecting wire
d scribing groove
101 first blade
102 second blade
103 third blade
104 side surface of the tool
105 end of the tool
106 wafers
107 guard ring
108 isolation structure
Claims (8)
1. A tool for cutting a wafer, comprising:
a first blade having a surface made of particulate matter having a first size;
a second blade disposed on a first side of the first blade such that the second blade at least partially covers the first side of the first blade, wherein the second blade has a surface made of particulate matter having a second size and wherein the second size is smaller than the first size; and
a third blade arranged on a second side of the first blade such that the third blade at least partially covers the second side of the first blade, wherein the third blade has a surface made of particles having a third size, and wherein the third size is smaller than the first size, wherein the first blade protrudes beyond the second blade and the third blade, wherein the ends of the first, second and third blades transition gently into each other to form an arc-shaped end of the tool, and wherein the wafer comprises a scribe groove for cutting with the tool, and wherein the scribe groove comprises isolation structures made of a material different from the material of the wafer, and the thickness of the first blade corresponds to the distance between the isolation structures, and the thickness of the second blade and the third blade respectively corresponds to the thickness of the respective isolation structures.
2. The tool according to claim 1, wherein the material of the isolating structure comprises one or more of: silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride, and silicon oxycarbonitride.
3. The tool of claim 1, wherein the particulate matter is grit.
4. The cutter of claim 1, wherein the cutter is annular with a centered circular hole.
5. The tool of claim 1, wherein an image sensor chip is formed on the wafer.
6. The tool according to claim 1, wherein a protective ring is provided on both sides of the scribe line.
7. Wafer cutting device with a tool according to one of claims 1 to 6.
8. Method for cutting wafers using a tool according to one of claims 1 to 6, comprising the following steps:
aligning a first blade of a cutter to a cutting position of a wafer; and
the wafer is cut using a cutter.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910400682.8A CN110091442B (en) | 2019-05-15 | 2019-05-15 | Cutter for cutting wafer and cutting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910400682.8A CN110091442B (en) | 2019-05-15 | 2019-05-15 | Cutter for cutting wafer and cutting method |
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| CN110091442A CN110091442A (en) | 2019-08-06 |
| CN110091442B true CN110091442B (en) | 2021-07-23 |
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| CN201910400682.8A Active CN110091442B (en) | 2019-05-15 | 2019-05-15 | Cutter for cutting wafer and cutting method |
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Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1130629A1 (en) * | 1999-07-30 | 2001-09-05 | Nippon Sheet Glass Co., Ltd. | Method of dicing semiconductor wafer into chips, and structure of groove formed in dicing area |
| CN102049814A (en) * | 2010-11-27 | 2011-05-11 | 常州华中集团有限公司 | Diamond saw blade and manufacturing method thereof |
| CN102528942B (en) * | 2011-12-28 | 2014-03-05 | 福建万龙金刚石工具有限公司 | High-efficiency diamond bit |
| CN104973562A (en) * | 2014-04-03 | 2015-10-14 | 中芯国际集成电路制造(上海)有限公司 | Wafer cutting method and MEMS wafer cutting method |
| CN106182448B (en) * | 2016-08-19 | 2018-03-02 | 广州晶体科技有限公司 | Sandwich-type gang saw tool bit and its manufacture method |
| CN107414085B (en) * | 2017-07-07 | 2019-07-16 | 泉州众志金刚石工具有限公司 | A kind of diamond segment carcass material and fine-granularity diamond saw blade |
| CN108453903A (en) * | 2018-02-06 | 2018-08-28 | 佛山市南珠锐普超硬材料制品有限公司 | A kind of Multilayer durable type diamond saw blade and its manufacturing method and application method |
| CN108582504B (en) * | 2018-05-07 | 2020-05-05 | 江苏锋泰工具有限公司 | Energy-saving efficient diamond saw blade and preparation method thereof |
| CN109585480A (en) * | 2018-11-30 | 2019-04-05 | 德淮半导体有限公司 | Semiconductor devices and forming method thereof, cutting method |
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Effective date of registration: 20230725 Address after: 223001 Room 318, Building 6, east of Zhenda Steel Pipe Company, south of Qianjiang Road, Huaiyin District, Huai'an City, Jiangsu Province Patentee after: Huaian Xide Industrial Design Co.,Ltd. Address before: No. 599, East Changjiang Road, Huaiyin District, Huai'an City, Jiangsu Province Patentee before: HUAIAN IMAGING DEVICE MANUFACTURER Corp. |