CN110086328B - Power-on time sequence control circuit - Google Patents
Power-on time sequence control circuit Download PDFInfo
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- CN110086328B CN110086328B CN201910533181.7A CN201910533181A CN110086328B CN 110086328 B CN110086328 B CN 110086328B CN 201910533181 A CN201910533181 A CN 201910533181A CN 110086328 B CN110086328 B CN 110086328B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/36—Means for starting or stopping converters
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
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Abstract
The invention provides a power-on time sequence control circuit which comprises a time delay control circuit, a PFC time delay driving circuit and a PWM time delay driving circuit, wherein the time delay control circuit is connected with the PFC time delay driving circuit; the delay control circuit is connected with the relay, and is used for generating a PFC driving instruction through a first preset delay after receiving the auxiliary power supply after the relay is closed, and sending the PFC driving instruction to the PFC delay driving circuit; the PFC delay driving circuit is used for receiving the PFC driving instruction, generating a PFC driving power supply after second preset delay, transmitting the PFC driving power supply to the PFC circuit, generating a PWM driving instruction and transmitting the PWM driving instruction to the PWM delay driving circuit; the PWM delay driving circuit is used for receiving the PWM driving instruction, generating a PWM driving power supply after third preset delay and transmitting the PWM driving power supply to the PWM circuit. The power-on time sequence control circuit can control each power-on module to carry out reasonable time delay when the electronic product is powered on, so that the excessive impact current input into each power-on module is avoided, and the electronic product is more reliable.
Description
Technical Field
The invention relates to the technical field of time sequence control, in particular to a power-on time sequence control circuit.
Background
The power supply is a power source of the electronic product, and the power-on starting process of the electronic product is a stage with higher power failure rate, and has larger influence on the quality and reliability of the electronic product. For example, in the LED display screen, each power-on module of the LED display screen is directly powered on simultaneously, so that the impact current of the power-on module is easily overlarge, and the LED display screen is enabled to be black, and the reliability of products is affected.
Disclosure of Invention
In view of the above problems, the present invention provides a power-on timing control circuit, so as to control each power-on module to perform reasonable delay when powering on an electronic product, thereby avoiding excessive impact current input into each power-on module and enabling the electronic product to be more reliable.
In order to achieve the above purpose, the present invention adopts the following technical scheme:
a power-on time sequence control circuit comprises a time delay control circuit, a PFC time delay driving circuit and a PWM time delay driving circuit;
The delay control circuit is connected with the relay, and is used for generating a PFC driving instruction after receiving the auxiliary power supply after the relay is closed and after a first preset delay, and sending the PFC driving instruction to the PFC delay driving circuit;
the PFC delay driving circuit is used for receiving the PFC driving instruction, generating a PFC driving power supply after second preset delay, transmitting the PFC driving power supply to the PFC circuit so as to drive the PFC circuit to carry out power factor correction on the electric energy output by the relay, generating a PWM driving instruction and transmitting the PWM driving instruction to the PWM delay driving circuit;
the PWM delay driving circuit is used for receiving the PWM driving instruction, generating a PWM driving power supply after third preset delay and transmitting the PWM driving power supply to the PWM circuit so as to drive the PWM circuit to perform pulse width modulation on electric energy output by the PFC circuit.
Preferably, in the power-on time sequence control circuit, the delay control circuit includes a first triode and a first capacitor;
The collector electrode of the first triode is connected with the 1 end of the coil of the relay, the 2 end of the coil is connected with the auxiliary power supply, the emitter electrode of the first triode is used for being grounded, and the base electrode of the first triode is connected with the auxiliary power supply;
one end of the first capacitor is connected with the base electrode of the first triode, and the other end of the first capacitor is grounded.
Preferably, in the power-on time sequence control circuit, the first triode is an NPN triode.
Preferably, in the power-on time sequence control circuit, a first resistor is connected between the base electrode of the first triode and the auxiliary power supply, and a second resistor is connected in parallel with the first capacitor.
Preferably, in the power-on time sequence control circuit, the PFC delay driving circuit includes a second triode, a third triode, a fourth triode, a second capacitor and a PFC driving power supply output end;
The base electrode of the second triode is connected with the collector electrode of the first triode, the emitter electrode of the second triode is used for being grounded, and the collector electrode of the second triode is connected with the auxiliary power supply;
the base electrode of the third triode is connected with the collector electrode of the second triode, the collector electrode of the third triode is used for being grounded, and the emitter electrode of the third triode is connected with the base electrode of the fourth triode;
The collector electrode of the fourth triode is connected with the auxiliary power supply, and the emitter electrode of the fourth triode is connected with the output end of the PFC driving power supply;
one end of the second capacitor is connected with the base electrode of the third triode, and the other end of the second capacitor is grounded.
Preferably, in the power-on time sequence control circuit, the second triode and the fourth triode are NPN type triodes, and the third triode is a PNP type triode.
Preferably, in the power-on time sequence control circuit, a third resistor is connected between the collector of the first triode and the base of the second triode, a fourth resistor is connected between the base of the second triode and the emitter of the second triode, a fifth resistor is connected between the collector of the second triode and the auxiliary power supply, and a sixth resistor is connected between the base of the fourth triode and the collector of the fourth triode.
Preferably, in the power-on time sequence control circuit, the PWM delay driving circuit includes a fifth triode, a sixth triode, a third capacitor and a PWM driving power output end;
The base electrode of the fifth triode is connected with the emitter electrode of the fourth triode, the collector electrode of the fifth triode is used for being grounded, and the emitter electrode of the fifth triode is connected with the base electrode of the sixth triode;
The collector electrode of the sixth triode is connected with the emitter electrode of the fourth triode, and the emitter electrode of the sixth triode is connected with the output end of the PWM driving power supply;
one end of the third capacitor is connected with the base electrode of the fifth triode, and the other end of the third capacitor is grounded.
Preferably, in the power-on time sequence control circuit, the fifth triode is a PNP triode, and the sixth triode is an NPN triode.
Preferably, in the power-on time sequence control circuit, a seventh resistor is connected between the base electrode of the fifth triode and the emitter electrode of the four triodes, and an eighth resistor is connected between the base electrode and the collector electrode of the sixth triode.
The invention provides a power-on time sequence control circuit which comprises a time delay control circuit, a PFC time delay driving circuit and a PWM time delay driving circuit, wherein the time delay control circuit is connected with the PFC time delay driving circuit; the delay control circuit is connected with the relay, and is used for generating a PFC driving instruction after receiving the auxiliary power supply after the relay is closed and after a first preset delay, and sending the PFC driving instruction to the PFC delay driving circuit; the PFC delay driving circuit is used for receiving the PFC driving instruction, generating a PFC driving power supply after second preset delay, transmitting the PFC driving power supply to the PFC circuit so as to drive the PFC circuit to carry out power factor correction on the electric energy output by the relay, generating a PWM driving instruction and transmitting the PWM driving instruction to the PWM delay driving circuit; the PWM delay driving circuit is used for receiving the PWM driving instruction, generating a PWM driving power supply after third preset delay and transmitting the PWM driving power supply to the PWM circuit so as to drive the PWM circuit to perform pulse width modulation on electric energy output by the PFC circuit. The power-on time sequence control circuit can control each power-on module to carry out reasonable time delay when the electronic product is powered on, so that the excessive impact current input into each power-on module is avoided, and the electronic product is more reliable.
In order to make the above objects, features and advantages of the present invention more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the present invention, the drawings that are required for the embodiments will be briefly described, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope of the present invention. Like elements are numbered alike in the various figures.
Fig. 1 is a schematic structural diagram of a power-on timing control circuit according to embodiment 1 of the present invention;
fig. 2 is a schematic structural diagram of a power-on timing control circuit according to embodiment 2 of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments.
The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present invention.
The terms "comprises," "comprising," "including," or any other variation thereof, are intended to cover a specific feature, number, step, operation, element, component, or combination of the foregoing, which may be used in various embodiments of the present invention, and are not intended to first exclude the presence of or increase the likelihood of one or more other features, numbers, steps, operations, elements, components, or combinations of the foregoing.
Furthermore, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and should not be construed as indicating or implying relative importance.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which various embodiments of the invention belong. The terms (such as those defined in commonly used dictionaries) will be interpreted as having a meaning that is the same as the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein in connection with the various embodiments of the invention.
Example 1
Fig. 1 is a schematic structural diagram of a power-on timing control circuit according to embodiment 1 of the present invention.
The power-on timing control circuit 100 includes a delay control circuit 110, a PFC delay drive circuit 120, and a PWM delay drive circuit 130;
the delay control circuit 110 is connected to the relay 140, and is configured to generate a PFC driving instruction after receiving the auxiliary power supply after the relay 140 is closed and after a first preset delay, and send the PFC driving instruction to the PFC delay driving circuit 120;
In the embodiment of the invention, the power-on time sequence control circuit 100 can be applied to an LED screen, and controls the power-on time sequence of each functional module when the LED screen is powered on, so as to reduce the impact current entering and exiting the LED screen and avoid the tripping of a power distribution air switch at the front end of the LED screen, wherein the power-on module of the LED screen comprises a relay 140, a PFC circuit 150 (PFC, power Factor Correction, power factor correction) and a PWM circuit 160 (PWM, pulse Width Modulation, pulse width modulation), the relay 140 receives the input electric energy, after being closed, the input electric energy is transmitted to the PFC circuit 150 for power factor correction, then the electric energy is transmitted to the PWM circuit 160 for pulse width modulation, and finally the electric energy after power adjustment is output to a load end.
In the embodiment of the present invention, the power-on timing control circuit 100 includes a delay control circuit 110, where the delay control circuit 110 is connected to a relay 140, receives and activates an auxiliary power supply of an LED screen after the relay 140 is closed, and generates a PFC driving command after a delay of a preset time length and sends the PFC driving command to the PFC delay driving circuit 120. The length of the first preset delay may be implemented by using an electronic component, for example, a capacitor and a triode may be disposed in the delay control circuit 110, the capacitor is connected to the auxiliary power supply and the base of the triode, when the capacitor starts to charge after receiving the auxiliary power supply, the triode may be driven after the voltage of the capacitor reaches the driving voltage of the triode after a period of time, so that the charging time of the capacitor is used as the delay. The length of the first delay is related to the size of the capacitor, and the specific delay length may be set by adjusting the capacitor, which is not limited herein.
The PFC delay driving circuit 120 is configured to receive the PFC driving instruction, generate a PFC driving power after a second preset delay, and transmit the PFC driving power to the PFC circuit 150, so as to drive the PFC circuit 150 to perform power factor correction on the electric energy output by the relay 140, and generate a PWM driving instruction and send the PWM driving instruction to the PWM delay driving circuit 130;
In the embodiment of the present invention, the power-on timing control circuit 100 includes a PFC delay driving circuit 120, one end of the PFC delay driving circuit 120 is connected to the delay control circuit 110, the other end is connected to the PFC circuit 150, and after receiving a PFC driving instruction, a PFC driving power supply is generated through a second preset delay and transmitted to the PFC circuit 150, so that the PFC circuit 150 is activated to receive the electric energy of the relay 140 and perform power factor correction. Meanwhile, the PFC delay driving circuit 120 also generates a PWM driving command and transmits the PWM driving command to the PWM delay driving circuit 130.
In the embodiment of the present invention, the length of the second preset delay may also be implemented by using an electronic component, for example, a capacitor and a triode may also be disposed in the PFC delay driving circuit 120, one end of the capacitor is connected to the delay control circuit 110, the capacitor is charged by using the electric energy of the delay control circuit 110, and the other end of the capacitor is connected to the base of the triode, and when the voltage of the capacitor reaches the driving voltage of the triode, the triode is activated, so that the charging time of the capacitor is used as the second preset delay. The length of the second delay is related to the size of the capacitor, and the specific delay length can be set by adjusting the capacitor, which is not limited herein.
The PWM delay driving circuit 130 is configured to receive the PWM driving instruction, generate a PWM driving power after a third preset delay, and transmit the PWM driving power to the PWM circuit 160, so as to drive the PWM circuit 160 to perform pulse width modulation on the electric energy output by the PFC circuit 150.
In the embodiment of the present invention, the power-on time sequence control circuit 100 includes a PWM delay driving circuit 130, one end of the PWM delay driving circuit 130 is connected to the PFC delay driving circuit 120, the other end is connected to the PWM circuit 160, and after receiving the PWM driving command, a PWM driving power supply is generated through a third preset delay and transmitted to the PWM circuit 160, so that the PWM circuit 160 is activated to receive the electric energy of the relay 140 and perform pulse width modulation.
In the embodiment of the present invention, the length of the third preset delay may also be implemented by using an electronic component, for example, a capacitor and a triode are disposed in the PWM delay driving circuit 130, one end of the capacitor is connected to the PFC delay driving circuit 120, the electric energy of the PFC delay driving circuit 120 is used for charging, and the other end is connected to the base of the triode, when the voltage of the capacitor reaches the driving voltage of the triode, the triode is activated, so that the charging time of the capacitor is used as the third preset delay. The length of the third delay is related to the capacitance, and the specific delay length can be set by adjusting the capacitance, which is not limited herein.
Example 2
Fig. 2 is a schematic structural diagram of a power-on timing control circuit according to embodiment 2 of the present invention.
The power-on timing control circuit 200 includes a delay control circuit 210, a PFC delay driving circuit 220, and a PWM delay driving circuit 230;
The delay control circuit 210 is connected to a relay, and is configured to generate a PFC driving instruction after receiving the auxiliary power supply 240 after the relay is closed and after a first preset delay, and send the PFC driving instruction to the PFC delay driving circuit 220;
the PFC delay driving circuit 220 is configured to receive the PFC driving instruction, generate a PFC driving power after a second preset delay, and transmit the PFC driving power to a PFC circuit, so as to drive the PFC circuit to perform power factor correction on the electric energy output by the relay, and generate a PWM driving instruction and send the PWM driving instruction to the PWM delay driving circuit 230;
The PWM delay driving circuit 230 is configured to receive the PWM driving instruction, generate a PWM driving power after a third preset delay, and transmit the PWM driving power to the PWM circuit, so as to drive the PWM circuit to perform pulse width modulation on the electric energy output by the PFC circuit.
In the embodiment of the present invention, the delay control circuit 210 includes a first triode 211 and a first capacitor 212; the collector of the first triode 211 is connected with the 1 end of the coil 201 of the relay, the 2 end of the coil 201 is connected with the auxiliary power supply 240, the emitter of the first triode 211 is used for being grounded, and the base of the first triode 211 is connected with the auxiliary power supply 240; one end of the first capacitor 212 is connected to the base electrode of the first triode 211, and the other end is grounded. The first transistor 211 is an NPN transistor. A first resistor 213 is connected between the base of the first triode 211 and the auxiliary power supply 240, and the first capacitor 212 is connected in parallel with a second resistor 214.
In the embodiment of the present invention, the PFC delay driving circuit 220 includes a second triode 221, a third triode 222, a fourth triode 223, a second capacitor 224, and a PFC driving power supply output terminal 225; the base electrode of the second triode 221 is connected with the collector electrode of the first triode 211, the emitter electrode of the second triode 221 is used for being grounded, and the collector electrode of the second triode 221 is connected with the auxiliary power supply 240; the base electrode of the third triode 222 is connected with the collector electrode of the second triode 221, the collector electrode of the third triode 222 is used for being grounded, and the emitter electrode of the third triode 222 is connected with the base electrode of the fourth triode 223; the collector of the fourth triode 223 is connected with the auxiliary power supply 240, and the emitter of the fourth triode 223 is connected with the PFC driving power supply output end 225; one end of the second capacitor 224 is connected to the base of the third triode 222, and the other end is grounded.
In the embodiment of the present invention, the second transistor 221 and the fourth transistor 223 are NPN transistors, and the third transistor 222 is a PNP transistor. A third resistor 226 is connected between the collector of the first triode 211 and the base of the second triode 221, a fourth resistor 227 is connected between the base and the emitter of the second triode 221, a fifth resistor 228 is connected between the collector of the second triode 221 and the auxiliary power supply 240, and a sixth resistor 229 is connected between the base and the collector of the fourth triode 223.
In the embodiment of the present invention, the PWM delay driving circuit 230 includes a fifth triode 231, a sixth triode 232, a third capacitor 233, and a PWM driving power output 234; the base electrode of the fifth triode 231 is connected with the emitter electrode of the fourth triode 223, the collector electrode of the fifth triode 231 is used for being grounded, and the emitter electrode of the fifth triode 231 is connected with the base electrode of the sixth triode 232; the collector of the sixth triode 232 is connected with the emitter of the fourth triode 223, and the emitter of the sixth triode 232 is connected with the PWM driving power supply output end 234; one end of the third capacitor 233 is connected to the base of the fifth triode 231, and the other end is grounded.
In the embodiment of the present invention, the fifth triode 231 is a PNP triode, and the sixth triode 232 is an NPN triode. A seventh resistor 235 is connected between the base of the fifth triode 231 and the emitter of the fourth triode, and an eighth resistor 236 is connected between the base and the collector of the sixth triode 232.
In the embodiment of the present invention, after an ac power source and an auxiliary power source 240 are input to the LED screen, the relay of the ac power source input to the LED screen is closed, and the auxiliary power source 240 enters the delay control circuit 210 through the coil 201 of the relay, and enters the PFC delay driving circuit 220 after being divided by the third resistor 226 and the fourth resistor 227. After the auxiliary power supply 240 enters the delay control circuit 210 and the PFC delay drive circuit 220, the base of the second diode of the PFC delay drive circuit 220 is at a high level, so that the second diode is turned on, the collector of the second diode is at a low level, and the base of the third triode 222 connected to the collector of the second diode is at a low level, so that the third triode 222 is not turned on, the fourth triode 223 is not turned on, and the PFC drive power supply output 225 is at a low level, so that the PFC circuit does not supply power and does not operate. The emitter of the sixth transistor 232 is also low, i.e., the PWM drive power supply output 234 is low, and the PWM circuit does not operate.
After the auxiliary power supply 240 is divided by the first resistor 213 and the second resistor 214, the first capacitor 212 is charged, and after the charging time period, that is, the first preset delay time, the capacitor voltage value reaches the driving voltage value of the first triode 211, the first triode 211 is turned on, the collector electrode of the first triode 211 is at a low level, that is, the base electrode of the second triode 221 is at a low level, so that the second triode 221 is not turned on. At this time, the second capacitor 224 is charged by the auxiliary power supply 240 through the voltage division of the fifth resistor 228, and reaches the voltage value of the auxiliary power supply 240 after the second preset delay, so that the third triode 222 is turned off, the base of the fourth triode 223 is at a high level, the fourth triode 223 is turned on, the PFC driving power supply output terminal 225 is at a high level, and the PFC circuit starts to operate. The PWM circuit is not operating at this time.
After the PFC driving power output 225 is at a high level, the third capacitor 233 is connected to the PFC driving power output 225 through a seventh resistor 235, receives electric energy to charge, after a third preset delay, the capacitor reaches the voltage of the PFC driving power output 225, the fifth triode 231 connected to the capacitor is turned off, the base of the sixth triode 232 is connected to the PFC driving power output 225 through an eighth resistor 236, the high level is obtained, the sixth triode 232 is turned on, the PWM driving power output 234 outputs the high level, and the PWM circuit starts to operate.
The power-on time sequence control circuit provided by the embodiment of the invention adopts a pure circuit design, has a simple structure, and is lower in cost and higher in circuit reliability compared with the time sequence control by utilizing a micro control chip.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (8)
1. The power-on time sequence control circuit is characterized by comprising a time delay control circuit, a PFC time delay driving circuit and a PWM time delay driving circuit;
The delay control circuit is connected with the relay, and is used for generating a PFC driving instruction after receiving the auxiliary power supply after the relay is closed and after a first preset delay, and sending the PFC driving instruction to the PFC delay driving circuit;
the PFC delay driving circuit is used for receiving the PFC driving instruction, generating a PFC driving power supply after second preset delay, transmitting the PFC driving power supply to the PFC circuit so as to drive the PFC circuit to carry out power factor correction on the electric energy output by the relay, generating a PWM driving instruction and transmitting the PWM driving instruction to the PWM delay driving circuit;
The PWM delay driving circuit is used for receiving the PWM driving instruction, generating a PWM driving power supply after third preset delay and transmitting the PWM driving power supply to the PWM circuit so as to drive the PWM circuit to perform pulse width modulation on the electric energy output by the PFC circuit;
The delay control circuit comprises a first triode and a first capacitor;
The collector electrode of the first triode is connected with the 1 end of the coil of the relay, the 2 end of the coil is connected with the auxiliary power supply, the emitter electrode of the first triode is used for being grounded, and the base electrode of the first triode is connected with the auxiliary power supply;
one end of the first capacitor is connected with the base electrode of the first triode, and the other end of the first capacitor is grounded;
The PFC delay driving circuit comprises a second triode, a third triode, a fourth triode, a second capacitor and a PFC driving power supply output end;
The base electrode of the second triode is connected with the collector electrode of the first triode, the emitter electrode of the second triode is used for being grounded, and the collector electrode of the second triode is connected with the auxiliary power supply;
the base electrode of the third triode is connected with the collector electrode of the second triode, the collector electrode of the third triode is used for being grounded, and the emitter electrode of the third triode is connected with the base electrode of the fourth triode;
The collector electrode of the fourth triode is connected with the auxiliary power supply, and the emitter electrode of the fourth triode is connected with the output end of the PFC driving power supply;
one end of the second capacitor is connected with the base electrode of the third triode, and the other end of the second capacitor is grounded.
2. The power-on timing control circuit of claim 1, wherein the first transistor is an NPN transistor.
3. The power-on time sequence control circuit according to claim 1, wherein a first resistor is connected between the base electrode of the first triode and the auxiliary power supply, and a second resistor is connected in parallel with the first capacitor.
4. The power-on timing control circuit of claim 1, wherein the second transistor and the fourth transistor are NPN transistors and the third transistor is a PNP transistor.
5. The power-on time sequence control circuit according to claim 1, wherein a third resistor is connected between a collector of the first triode and a base of the second triode, a fourth resistor is connected between a base of the second triode and an emitter of the second triode, a fifth resistor is connected between the collector of the second triode and the auxiliary power supply, and a sixth resistor is connected between the base of the fourth triode and the collector of the fourth triode.
6. The power-on timing control circuit according to claim 1, wherein the PWM delay driving circuit comprises a fifth transistor, a sixth transistor, a third capacitor, and a PWM driving power supply output terminal;
The base electrode of the fifth triode is connected with the emitter electrode of the fourth triode, the collector electrode of the fifth triode is used for being grounded, and the emitter electrode of the fifth triode is connected with the base electrode of the sixth triode;
The collector electrode of the sixth triode is connected with the emitter electrode of the fourth triode, and the emitter electrode of the sixth triode is connected with the output end of the PWM driving power supply;
one end of the third capacitor is connected with the base electrode of the fifth triode, and the other end of the third capacitor is grounded.
7. The power-up timing control circuit of claim 6, wherein the fifth transistor is a PNP transistor and the sixth transistor is an NPN transistor.
8. The power-on timing control circuit of claim 6, wherein a seventh resistor is connected between the base of the fifth triode and the emitter of the fourth triode, and an eighth resistor is connected between the base of the sixth triode and the collector of the sixth triode.
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| CN201910533181.7A CN110086328B (en) | 2019-06-19 | 2019-06-19 | Power-on time sequence control circuit |
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| CN201910533181.7A CN110086328B (en) | 2019-06-19 | 2019-06-19 | Power-on time sequence control circuit |
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| CN110086328A CN110086328A (en) | 2019-08-02 |
| CN110086328B true CN110086328B (en) | 2024-05-07 |
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| CN209994263U (en) * | 2019-06-19 | 2020-01-24 | 深圳莱福德科技股份有限公司 | Power-on sequence control circuit |
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| Publication number | Publication date |
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| CN110086328A (en) | 2019-08-02 |
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