CN110079787A - A kind of method that surfactant assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nano wire - Google Patents
A kind of method that surfactant assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nano wire Download PDFInfo
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- CN110079787A CN110079787A CN201910400878.7A CN201910400878A CN110079787A CN 110079787 A CN110079787 A CN 110079787A CN 201910400878 A CN201910400878 A CN 201910400878A CN 110079787 A CN110079787 A CN 110079787A
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/301—AIII BV compounds, where A is Al, Ga, In or Tl and B is N, P, As, Sb or Bi
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
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Abstract
The present invention relates to the methods of a kind of surfactant auxiliary vapor phase growth minor diameter, high-performance Group III-V semiconductor nano wire, comprising: is grown using dual temperature area vapor phase method；Dual temperature area includes source region and vitellarium, and source region places Group III-V semiconductor source material, for providing source material；Place the substrate for being covered with Au film catalyst, the growth for nano wire in vitellarium；Placement surface activating agent between source region and vitellarium, for improveing nano wire.The present invention can prepare the iii-v nano wire that diameter is less than 10nm, while realize the control to its diameter, electric property.Meanwhile the chemical vapor deposition method preparation iii-v nano wire that the present invention uses, condition is simple, low in cost.Used surfactant only forms chemical bond in the nanowire surface of growth and V group element, without being doped in nano wire.
Description
Technical field
The present invention relates to a kind of surfactants to assist vapor phase growth minor diameter, high-performance Group III-V semiconductor nano wire
Method, belong to low-dimensional field of photoelectric material preparation.
Background technique
Have benefited from unique geometry and size, one-dimensional nano line (diameter 10-91000) rice magnitude, length-width ratio are greater than
The novel physics and chemical phenomenon not observed in many macrocosm can be used to explore, such as quantum tunneling effect and small
Dimensional effect etc. has important research significance and development in fields such as next-generation photoelectricity, electrochemistry, sensor, quantum calculations
Prospect.In recent years, due to p-type silicon material mobility (hole mobility: μh≈480cm2V-1s-1) limitation on low-dimensional scale,
Development of the Moore's Law in high density integrated circuit encounters unprecedented difficulty.Scientists in " rear mole " period are just
Seek scheme one after another to overcome the great difficulty that Moore's Law faces under small size.In numerous solutions of proposition, seek
The new channel material of more high mobility realizes that full packet grid structure nanometer wire field effect tube is acknowledged as one of most efficient method
(Jesús A.del Alamo.2011.Nanometre-scale electronics with III–V compound
semiconductors.Nature.479.317.).Gallium antimonide (GaSb) with the highest hole of Group III-V semiconductor due to moving
Shifting rate (μh≈1000cm2V-1s-1)(Dey A W,Svensson J,Borg B M,Ek M and Wernersson L-
E.2012.Single InAs/GaSb nanowire low-power CMOS inverter.Nano Lett.12.5593–
7.), it is considered to be one of the best semiconductor material of p-type silicon is substituted in future microelectronics circuit.Due to gibbs-Thomas
Skin effect (EkM, Borg B M, Johansson J and the Dick K of effect and antimony (Sb) atom
A.2013.Diameter limitation in growth of III-Sb-containing nanowire
heterostructures.ACS Nano.7.3668–75；Anyebe E A,Rajpalke M K,Veal T D,Jin C J,
Wang Z M and Zhuang Q D.2015.Surfactant effect of antimony addition to the
morphology of self-catalyzed InAs1-xSbxNanowires.Nano Res.8.1309-19.), strong shadow
The migration length of atom can be reduced, lead to uncontrollable radial growth, so that in high temperature gas phase preparation side with interface energy by ringing surface
It is difficult to realize minor diameter, high-performance GaSb nano wire in method, significantly limits GaSb material in next-generation microelectronic component
Practical application.
It is well known that surfactant is the key that liquid phase method regulation nano material, however surfactant is but without report
It is used in high temperature gas phase process, proposes the present invention thus.
Summary of the invention
In view of the deficiencies of the prior art, minor diameter, high-performance iii-v half is difficult to realize especially in high temperature gas phase method
The preparation of nanowires, the present invention provide a kind of surfactant auxiliary vapor phase growth high-performance Group III-V semiconductor nanometer
The method of line.Surfactant forms stable chemical bond in the nanowire surface of growth and five (V) race elements in the present invention, has
The inhibition nano wire radial growth of effect, reduces the diameter, and can also influence mutual between nanowire surface energy and interface energy
The controllable of nanowire diameter and electric property is realized in effect, easy to operate, low in cost.
Technical scheme is as follows:
A kind of method that surfactant assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nano wire, packet
It includes:
It is grown using dual temperature area vapor phase method；The dual temperature area includes source region and vitellarium, and the source region places III-V
Race's semiconductor source material, for providing source material；The substrate for being covered with Au film catalyst is placed in the vitellarium, is used for nanometer
The growth of line；
Placement surface activating agent between source region and vitellarium, for improveing nano wire.
, according to the invention it is preferred to, the temperature range of source region is 690-900 DEG C, and the temperature range of vitellarium is 510-600
℃.Source region temperature controls in 690-900 DEG C, ensure that the decomposition and supply of source material, and vitellarium temperature is controlled in 510-600
DEG C, it ensure that catalyst condition is liquid, grow nano wire according to the growth pattern of gas-liquid-solid (VLS).
, according to the invention it is preferred to, after dual temperature area being vacuumized before heating growth be passed through protective gas；Further preferably
, protective gas H2, purity 99.9995%；It is evacuated to 10-3Torr leads to the time of protective gas for 20-40 points
Clock.
, according to the invention it is preferred to, it is warming up to heating rate >=60 DEG C/min of source region and vitellarium required temperature.
, according to the invention it is preferred to, the Group III-V semiconductor source material is GaSb or GaAs, and purity is
99.999%, powder morphology, partial size≤100 mesh.
, according to the invention it is preferred to, the surfactant is chalcogen, further preferred S, Se or Te, simple substance
Powder morphology.
, according to the invention it is preferred to, the substrate is Si/SiO2Substrate；Preferably, Au film catalyst with a thickness of
0.1-12nm。
, according to the invention it is preferred to, Group III-V semiconductor source material is at a distance from the substrate for being covered with Au film catalyst
15cm；Surfactant is 9cm at a distance from the substrate for being covered with Au film catalyst.
, according to the invention it is preferred to, growth time 20-60min；After growth, source region and vitellarium are simultaneously stopped
It heats and is gradually cooling to room temperature.
According to the present invention, the surfactant assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nano wire
Method, a kind of preferred embodiment, comprising the following steps:
(1) dual temperature area horizontal pipe furnace is used, the boron nitride crucible for filling GaSb or GaAs powder is placed in upstream source
Area, distance place the Si/ of covering 0.1-12nm thickness Au film catalyst for growing the substrate 15cm of nano wire, downstream vitellarium
SiO2Substrate, for growing nano wire, the boron nitride crucible for filling surfactant S, Se or Te powder is placed in two warm areas
Centre, distance is for growing the substrate 9cm of nano wire；
(2) pressure of tube furnace is evacuated to 10-3Torr simultaneously leads to 30 minutes H2Protect gas；
(3) source region temperature is warming up to 690-900 DEG C, vitellarium temperature is warming up to 510-600 DEG C, grows 20-60min；
(4) after growing, source region and vitellarium stop heating and are gradually cooling to room temperature.
The present invention regulates and controls Group III-V semiconductor as surfactant using sulfur family material in high temperature gas phase process for the first time
The structure and performance of nano wire are obtained small by inhibiting the approach of the growth of nano wire side surface and the passivation of real-time perfoming surface state
Diameter, high-performance Group III-V semiconductor nano wire.
The beneficial effects of the present invention are:
The present invention can prepare the iii-v nano wire that diameter is less than 10nm, while realize to its diameter, electric property
Control.Meanwhile chemical vapor deposition (CVD) method that the present invention uses prepares iii-v nano wire, condition is simple, cost
It is cheap.Used surfactant only forms chemical bond in the nanowire surface of growth and V group element, receives without being doped to
In rice noodles.
Detailed description of the invention
Fig. 1 is the schematic diagram that the present invention improves nano wire using surfactant.
Fig. 2 is the stereoscan photograph for the GaSb nano wire that in the embodiment of the present invention 1 prepared by surfactant improvement front and back.
Fig. 3 is the diameter distribution statistics figure of surfactant improvement front and back in the embodiment of the present invention 1.
Fig. 4 is that the hole mobility of the GaSb nano wire of surfactant improvement front and back in the embodiment of the present invention 1 is distributed system
Meter figure.
Fig. 5 is the stereoscan photograph of the GaAs nano wire of unused surfactant improvement.
Fig. 6 is the stereoscan photograph of GaAs nano wire of the embodiment 2 after surfactant S improvement.
Fig. 7 is the stereoscan photograph of GaAs nano wire of the embodiment 3 after surfactant Se improvement.
Fig. 8 is the stereoscan photograph of GaAs nano wire of the embodiment 4 after surfactant Te improvement.
Fig. 9 is in embodiment 2,3,4 by the diameter distribution statistics figure of different surfaces surfactant improvement front and back.
Figure 10 is the electric property of the GaAs nano wire in embodiment 2,3,4 after the improvement of different surfaces surfactant
Figure.
Specific embodiment
Below by specific embodiment, the present invention will be further described, but not limited to this.
Sample as described in the examples is the Si/SiO for growing nano wire2Substrate.
Embodiment 1
Using dual temperature area horizontal pipe furnace, the boron nitride crucible for filling 0.5g GaSb powder is placed in upstream source region, away from
From sample 15cm, the boron nitride crucible for filling 0.5g surfactant S powder is placed among GaSb powder and vitellarium, apart from sample
Product 9cm covers the Si/SiO of 0.1nm thickness Au film2Substrate is placed among the warm area of downstream, the growth for nano wire.By tube furnace
Pressure be evacuated to 10-3Torr simultaneously leads to 30 minutes H2, throughput 200sccm.Source region temperature is increased to 750 DEG C, by vitellarium
Temperature is increased to 550 DEG C, grows 25min.After growth, source region and vitellarium are simultaneously stopped and heat and be gradually cooling to room
Temperature.
Surfactant improves principle as shown in Figure 1, S atom forms chemical bond in nanowire surface and Sb atom, thus
Inhibit nano wire radial growth.
Embodiment 2
Using dual temperature area horizontal pipe furnace, the boron nitride crucible for filling 0.6g GaAs powder is placed in upstream source region, away from
From sample 15cm, the boron nitride crucible for filling 0.6g surfactant S powder is placed among source material and vitellarium, apart from sample
9cm covers the Si/SiO of 12nm Au film2Substrate is placed among the warm area of downstream, the growth for nano wire.By the pressure of tube furnace
It is evacuated to 10 by force-3Torr simultaneously leads to 30 minutes H2, throughput 100sccm.Source region temperature is increased to 820 DEG C, by vitellarium temperature
600 DEG C are increased to, 1h is grown.After growth, source region and vitellarium stop heating and are gradually cooling to room temperature.
Embodiment 3
Using dual temperature area horizontal pipe furnace, the boron nitride crucible for filling 0.5g GaAs powder is placed in upstream source region, away from
From sample 15cm, the boron nitride crucible for filling 0.5g surfactant Se powder is placed among source material and vitellarium, apart from sample
Product 9cm covers the Si/SiO of 12nm Au film2Substrate is placed among the warm area of downstream, the growth for nano wire.By tube furnace
Pressure is evacuated to 10-3Torr simultaneously leads to 30 minutes H2, throughput 200sccm.Source region temperature is increased to 850 DEG C, by vitellarium temperature
Degree is increased to 600 DEG C, grows 1h.After growth, source region and vitellarium stop heating and are gradually cooling to room temperature.
Embodiment 4
Using dual temperature area horizontal pipe furnace, the boron nitride crucible for filling 0.4g GaAs powder is placed in upstream source region, away from
From sample 15cm, the boron nitride crucible for filling 0.5g surfactant Te powder is placed among source material and vitellarium, apart from sample
Product 9cm covers the Si/SiO of 12nm Au film2Substrate is placed among the warm area of downstream, the growth for nano wire.By tube furnace
Pressure is evacuated to 10-3Torr simultaneously leads to 30 minutes H2, throughput 300sccm.Source region temperature is increased to 850 DEG C, by vitellarium temperature
Degree is increased to 580 DEG C, grows 1h.After growth, source region and vitellarium stop heating and are gradually cooling to room temperature.
Test example 1
The stereoscan photograph for the GaSb nano wire that in embodiment 1 prepared by surfactant improvement front and back, as shown in Figure 2.
The diameter distribution statistics figure of surfactant improvement front and back is as shown in Figure 3.
The GaSb nanowire diameter of unused surfactant improvement is 219 ± 53nm it can be seen from Fig. 2,3, and uses S
The GaSb nanowire diameter of surfactant improvement is 28 ± 9nm.As it can be seen that using surfactant-modified, the diameter of nano wire
It is obviously reduced.
Hole mobility distribution statistics figure such as Fig. 4 institute of the GaSb nano wire of surfactant improvement front and back in embodiment 1
Show, as shown in Figure 4, in terms of electric property, the GaSb nano wire mobility after surfactant improvement be can reach
200cm2V-1s-1, and the GaSb nano wire mobility of unused surfactant improvement only has 40cm in highest2V-1s-1。
Test example 2
The stereoscan photograph of the GaAs nano wire of unused surfactant improvement is tested, as shown in Figure 5.
The stereoscan photograph of GaAs nano wire of the embodiment 2 after surfactant S improvement, as shown in Figure 6.
The stereoscan photograph of GaAs nano wire of the embodiment 3 after surfactant Se improvement, as shown in Figure 7.
The stereoscan photograph of GaAs nano wire of the embodiment 4 after surfactant Te improvement, as shown in Figure 8.
Diameter distribution statistics figure in embodiment 2,3,4 by different surfaces surfactant improvement front and back is as shown in Figure 9.
By Fig. 5-9 it is found that the diameter range of the GaAs nano wire of unused surfactant improvement is 76.1 ± 49.9nm, adopt
It is 36.9 ± 8.6nm, the GaAs improved using Se surfactant with the GaAs nanowire diameter range that S surfactant is improved
Nanowire diameter range is 29.9 ± 7.3nm, the GaAs nanowire diameter range for using Te surfactant to improve for 26.2 ±
6.6nm.As it can be seen that the diameter of nano wire is obviously reduced using surfactant-modified.
The electric property of GaAs nano wire in testing example 2,3,4 after the improvement of different surfaces surfactant,
As shown in Figure 10.As shown in Figure 10, by selecting different surfactants, electric property also available regulation.Using S table
The GaAs nano wire of face activating agent improvement presents p-type electric-conducting characteristic, the GaAs nano wire p-type improved using Se surfactant
Conductive characteristic weakens and shows insulation bulk properties, and uses the GaAs nano wire of Te surfactant improvement since Te atom is mixed
The miscellaneous nano wire that enters provides electronics, shows N-shaped conductive characteristic.
Claims (10)
1. a kind of method of surfactant auxiliary vapor phase growth minor diameter, high-performance Group III-V semiconductor nano wire, comprising:
It is grown using dual temperature area vapor phase method；The dual temperature area includes source region and vitellarium, and the source region places iii-v half
Conductor source material, for providing source material；The substrate for being covered with Au film catalyst is placed in the vitellarium, for nano wire
Growth；
Placement surface activating agent between source region and vitellarium, for improveing nano wire.
2. surfactant according to claim 1 assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nanometer
The method of line, which is characterized in that the temperature range of source region is 690-900 DEG C, and the temperature range of vitellarium is 510-600 DEG C.
3. surfactant according to claim 1 assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nanometer
The method of line, which is characterized in that be passed through protective gas after vacuumizing dual temperature area before heating growth；Preferably, protective gas is
H2。
4. surfactant according to claim 1 assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nanometer
The method of line is warming up to heating rate >=60 DEG C/min of source region and vitellarium required temperature.
5. surfactant according to claim 1 assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nanometer
The method of line, the Group III-V semiconductor source material are GaSb or GaAs；It is preferred that powder morphology, partial size≤100 mesh.
6. surfactant according to claim 1 assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nanometer
The method of line, the surfactant are chalcogen；It is preferred that S, Se or Te, elemental powders form.
7. surfactant according to claim 1 assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nanometer
The method of line, the substrate are Si/SiO2Substrate.
8. surfactant according to claim 1 assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nanometer
The method of line, Au film catalyst with a thickness of 0.1-12nm.
9. surfactant according to claim 1 assists vapor phase growth minor diameter, high-performance Group III-V semiconductor nanometer
The method of line, Group III-V semiconductor source material are 15cm at a distance from the substrate for being covered with Au film catalyst；Surfactant with
The distance for being covered with the substrate of Au film catalyst is 9cm.
10. surfactant auxiliary vapor phase growth minor diameter according to claim 1, high-performance Group III-V semiconductor are received
The method of rice noodles, growth time 20-60min；After growth, source region and vitellarium are simultaneously stopped and heat and be gradually cooling to
Room temperature.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112877779A (en) * | 2019-11-29 | 2021-06-01 | 山东大学深圳研究院 | Method for growing high-quality GaAs nanowire based on Sn catalysis gas phase |
| CN114516658A (en) * | 2020-11-18 | 2022-05-20 | 香港城市大学深圳研究院 | Two-step chemical vapor deposition method for growing rare nitride GaNSb nanowire |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1699637A (en) * | 2004-05-19 | 2005-11-23 | 北京大学 | Apparatus for growth of monocrystal semiconductor nano wire and use thereof |
| CN101553895A (en) * | 2006-09-08 | 2009-10-07 | 通用汽车环球科技运作公司 | One-dimensional metal and metal oxide nanostructures |
| CN103320866A (en) * | 2013-06-21 | 2013-09-25 | 中国科学院上海技术物理研究所 | Molecular beam epitaxial (MBE) growth method of Bi element regulated and controlled GaAs-based nanowire crystal structure |
| CN103456602A (en) * | 2013-03-18 | 2013-12-18 | 深圳信息职业技术学院 | Method for preparing non-polar surface gallium nitride nanometer cone material |
| CN106929820A (en) * | 2017-04-05 | 2017-07-07 | 国家纳米科学中心 | A kind of ZnSe nano wires and its preparation method and application |
-
2019
- 2019-05-15 CN CN201910400878.7A patent/CN110079787B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1699637A (en) * | 2004-05-19 | 2005-11-23 | 北京大学 | Apparatus for growth of monocrystal semiconductor nano wire and use thereof |
| CN101553895A (en) * | 2006-09-08 | 2009-10-07 | 通用汽车环球科技运作公司 | One-dimensional metal and metal oxide nanostructures |
| CN103456602A (en) * | 2013-03-18 | 2013-12-18 | 深圳信息职业技术学院 | Method for preparing non-polar surface gallium nitride nanometer cone material |
| CN103320866A (en) * | 2013-06-21 | 2013-09-25 | 中国科学院上海技术物理研究所 | Molecular beam epitaxial (MBE) growth method of Bi element regulated and controlled GaAs-based nanowire crystal structure |
| CN106929820A (en) * | 2017-04-05 | 2017-07-07 | 国家纳米科学中心 | A kind of ZnSe nano wires and its preparation method and application |
Non-Patent Citations (1)
| Title |
|---|
| 刘仕锋 等: ""在双热舟化学气相沉积系统中通过掺In技术生长GaN纳米线和纳米锥"", 《物理学报》 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112877779A (en) * | 2019-11-29 | 2021-06-01 | 山东大学深圳研究院 | Method for growing high-quality GaAs nanowire based on Sn catalysis gas phase |
| CN112877779B (en) * | 2019-11-29 | 2022-07-19 | 山东大学深圳研究院 | Method for growing high-quality GaAs nanowire based on Sn catalysis gas phase |
| CN114516658A (en) * | 2020-11-18 | 2022-05-20 | 香港城市大学深圳研究院 | Two-step chemical vapor deposition method for growing rare nitride GaNSb nanowire |
| CN114516658B (en) * | 2020-11-18 | 2023-07-25 | 香港城市大学深圳研究院 | Two-step chemical vapor deposition method for growing dilute nitrided GaNSb nanowire |
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