CN110061028B

CN110061028B - Display device and method for manufacturing the same

Info

Publication number: CN110061028B
Application number: CN201910271685.6A
Authority: CN
Inventors: 王硕宏; 林俊男; 高宏龙; 黄朝琨; 宋文清; 张家铭
Original assignee: AU Optronics Corp
Current assignee: AU Optronics Corp
Priority date: 2018-05-08
Filing date: 2019-04-04
Publication date: 2021-03-23
Anticipated expiration: 2039-04-04
Also published as: CN110061028A

Abstract

A display device and a method of manufacturing the same, wherein the method of manufacturing the display device includes: providing a substrate with a first surface and a second surface which are opposite; forming a driving element layer on the first surface of the substrate; forming a protective layer to cover the driving element layer; forming at least one pad on the second surface of the substrate under the condition that the protective layer covers the driving element layer; arranging at least one light-emitting diode element on the driving element layer so as to electrically connect the at least one light-emitting diode element with the driving element layer; forming at least one conductive circuit pattern on the side surface of the substrate, and electrically connecting the conductive circuit pattern to the driving element layer and the at least one pad, wherein the side surface is connected between the first surface and the second surface; and arranging the driving chip on the second surface of the substrate so that the driving chip is electrically connected with the at least one connecting pad.

Description

Display device and method for manufacturing the same

Technical Field

The present invention relates to a display device and a method for manufacturing the same, and more particularly, to a display device having a single substrate and having a driving element and a conductive trace pattern on both sides thereof and a method for manufacturing the same.

Background

With the advancement of technology, the Screen-to-body Ratio (Screen-to-body Ratio) of the display panel is an important reference index for many consumers to purchase the display device, and thus the demand for the display device with a higher display area on the display panel is increased. However, the peripheral area of the display panel is provided with peripheral circuits without display function, and the provision of the peripheral circuits makes it difficult for the display device to achieve a high screen ratio. Therefore, a design that can solve the above problems is needed.

Disclosure of Invention

The invention provides a novel display device framework and a manufacturing method thereof, and the manufactured display device can solve the problem of increasing peripheral wires of a peripheral zone without a display function so as to improve the screen occupation ratio of the display device.

The invention provides a display device, which can improve the screen occupation ratio of the display device and can perform a modularized seamless splicing technology, a large-size display device is formed by a small-size display device, the area size of a display panel is improved, better visual perception is achieved, and the display device is not limited by the generation of the panel.

The invention provides a manufacturing method of a display device, which comprises the following steps: providing a substrate with a first surface and a second surface which are opposite; forming a driving element layer on the first surface of the substrate; forming a protective layer to cover the driving element layer; forming at least one pad on the second surface of the substrate under the condition that the protective layer covers the driving element layer; arranging at least one light-emitting diode element on the driving element so as to electrically connect the at least one light-emitting diode element with the driving element; forming at least one conductive circuit pattern on the side surface of the substrate, and electrically connecting the conductive circuit pattern to the driving element and the at least one pad, wherein the side surface is connected between the first surface and the second surface; and arranging the driving chip on the second surface of the substrate so that the driving chip is electrically connected with the at least one connecting pad.

The invention provides a display device, which comprises a substrate, a driving element, a plurality of light emitting diode elements, a plurality of connecting pads, a driving chip and a plurality of conducting circuit patterns. The substrate is provided with a first surface, a second surface opposite to the first surface and a side face connected between the first surface and the second surface. The driving element layer is arranged on the first surface of the substrate. The light emitting diode element is arranged on the driving element layer and is electrically connected with the driving element layer. The connecting pad is arranged on the second surface of the substrate. The driving chip is disposed on the pad and electrically connected to the pad. The conductive circuit pattern is arranged on the side surface of the substrate and is electrically connected between the driving element layer and the connecting pad.

In view of the above, in the display device and the manufacturing method thereof according to the embodiment of the invention, by forming at least one conductive circuit pattern on the side surface of the substrate, wherein the conductive circuit pattern is electrically connected between the driving element layer and the pad, the problem of area increase of the peripheral area in the display device can be solved, so as to improve the screen occupation ratio of the display device and perform modular splicing. In addition, in the manufacturing method of the display device according to the embodiment of the invention, the protective layer covers the driving element layer, so that the driving element layer on the first surface is not easily damaged when the substrate is subjected to the subsequent process on the second surface.

In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

Fig. 1A to 1F are schematic views illustrating a manufacturing process of a display device according to an embodiment of the invention.

Fig. 2A is a schematic view of a member on a first surface of the display device of fig. 1E, in which fig. 2A omits the insulating layer, the light-shielding pattern, and the capping layer of fig. 1E.

Fig. 2B is a schematic view of a member on a side of the display device of fig. 1E, wherein fig. 2B omits the cover layer of fig. 1E.

Fig. 2C is a schematic view of a member on a second surface of the display device of fig. 1E, wherein fig. 2C omits the cover layer and the insulating layer of fig. 1E.

Fig. 3A to 3G are schematic cross-sectional views illustrating a manufacturing process of a display device according to another embodiment of the invention.

Wherein, the reference numbers:

100. 100': display device

100a, 100 a': region(s)

110. 110': substrate

112: first surface

112a, 113a, 115a, 116 a: interface

113: first connection surface

114. 114': second surface

115: second connecting surface

116: side surface

120: line layer

130. 180: insulating layer

130 a: opening of the container

140. 170, 170': protective layer

142: a first protective sublayer

144: a second protective sub-layer

154: connecting wire

154a, 154 b: end part

160: connecting pad

172: adhesive layer

180 a: first contact window

180 b: second contact window

192: driving chip

194: anisotropic conductive adhesive

200: conductive circuit pattern

202: a first conductive part

204: second conductive part

206: third conductive part

210: covering layer

A-A': cutting line

CL: common line

DE: drive element layer

E1: a first electrode

E1a, E1b, E2a, E2 b: sub-electrode

E2: second electrode

LED: light emitting diode element

PL: power line

SL 1: first signal line

SL 2: second signal line

T1, T2: transistor with a metal gate electrode

α: first inner included angle

Beta: second inner included angle

θ, γ, δ, ω: inner included angle

Detailed Description

The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. As those skilled in the art will recognize, the described embodiments may be modified in various different ways, without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc. have been exaggerated for clarity. Like reference numerals refer to like elements throughout the specification. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connected" may refer to physical and/or electrical connections. Further, "electrically connected" or "coupled" may mean that there are additional elements between the elements.

Furthermore, relative terms, such as "lower" or "bottom" and "upper" or "top," may be used herein to describe one element's relationship to another element, as illustrated. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the figures. For example, if the device in one of the figures is turned over, elements described as being on the "lower" side of other elements would then be oriented on "upper" sides of the other elements. Thus, the exemplary term "lower" can include both an orientation of "lower" and "upper," depending on the particular orientation of the figure. Similarly, if the device in one of the figures is turned over, elements described as "below" or "beneath" other elements would then be oriented "above" the other elements. Thus, the exemplary terms "above" or "below" may include both an orientation of above and below.

As used herein, "about", "approximately", or "substantially" includes the stated value and the average value within an acceptable range of deviation of the specified value as determined by one of ordinary skill in the art, taking into account the measurement in question and the specified amount of error associated with the measurement (i.e., the limitations of the measurement system). For example, "about" may mean within one or more standard deviations of the stated value, or within ± 30%, ± 20%, ± 10%, ± 5%. Further, as used herein, "about", "approximately" or "substantially" may be selected based on optical properties, etch properties, or other properties, with a more acceptable range of deviation or standard deviation, and not all properties may be applied with one standard deviation.

Exemplary embodiments are described herein with reference to cross-sectional views that are schematic illustrations of idealized embodiments. Thus, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or (and/or) tolerances, are to be expected. Thus, the embodiments described herein should not be construed as limited to the particular shapes of regions as illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, a region shown or described as flat may generally have rough and/or nonlinear features. Further, the acute angles shown may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the claims.

Unless defined otherwise, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present invention and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

Fig. 1A to 1F are schematic views illustrating a manufacturing process of a display device according to an embodiment of the invention. FIG. 1E is a schematic side view of a display device according to an embodiment of the invention. Fig. 1F is an enlarged schematic view of a partial region 100a of the display device of fig. 1E. Fig. 2A is a schematic view of members on the first surface 112 of the display device of fig. 1E, wherein fig. 2A omits the insulating layer 130, the light blocking pattern BM, and the capping layer 210 of fig. 1E. Fig. 2B is a schematic view of components on side 116 of the display device of fig. 1E, wherein fig. 2B omits cover layer 210 of fig. 1E. Fig. 2C is a schematic diagram of components on the second surface 114 of the display device of fig. 1E, wherein fig. 2C omits the capping layer 210 and the insulating layer 180 of fig. 1E. In particular, FIG. 1E corresponds to section line A-A' of FIG. 2A.

Referring to fig. 1A, a substrate 110 having a first surface 112 and a second surface 114 opposite to each other is provided. In the present embodiment, the substrate 110 is, for example, a rigid substrate (rigid substrate). However, the invention is not limited thereto, and in other embodiments, the substrate 110 may also be a flexible substrate. For example, the hard substrate may be made of glass, quartz or other suitable materials; the flexible substrate may be made of plastic or other suitable materials.

Referring to fig. 1A, a driving device layer DE is formed on the first surface 112 of the substrate 110. In the embodiment, the driving element layer DE includes the circuit layer 120 and the first electrode E1 and the second electrode E2 electrically connected to the circuit layer 120. In the embodiment, the first electrode E1 and the second electrode E2 may be a composite layer structure, the first electrode E1 includes a sub-electrode E1a and a sub-electrode E1b, and the second electrode E2 includes a sub-electrode E2a and a sub-electrode E2 b. For example, in the present embodiment, a conductive layer (not shown) is patterned on the circuit layer 120 to form the sub-electrode E1b and the sub-electrode E2b, and then another conductive layer (not shown) is patterned on the sub-electrode E1b and the sub-electrode E2b to form the sub-electrode E1a and the sub-electrode E2 a. For example, in the present embodiment, the material of the sub-electrode E1a and the material of the sub-electrode E2a may be Indium-Tin Oxide (ITO) or other suitable materials; the sub-electrode E1b and the sub-electrode E2b may be a single layer or a multi-layer structure, and the material thereof may include a metal material, such as Ti/Al/Ti, Mo/Al/Mo, Mo/Al or other suitable materials, but not limited thereto.

Referring to fig. 1A and fig. 2A, the circuit layer 120 is disposed on the first surface 112 of the substrate 110. For example, in the present embodiment, the circuit layer 120 includes a first signal line SL1, a second signal line SL2, a power line PL, a common line CL, and transistors T1 and T2. The first signal lines SL1 are arranged to intersect with the second signal lines SL 2. The transistor T1 is electrically connected to the first signal line SL1 and the second signal line SL 2. The control terminal of the transistor T2 is electrically connected to the transistor T1. A first terminal of the transistor T2 is electrically connected to the power line PL, and a second terminal of the transistor T2 is electrically connected to the first electrode E1. The common line CL is electrically connected to the second electrode E2. It should be noted that the distance between the first signal line SL1 and the power line PL is only for illustration and not for limiting the invention.

Referring to fig. 1A, next, an insulating layer 130 may be formed on the circuit layer 120. In the embodiment, the insulating layer 130 is disposed on the circuit layer 120 and may cover a portion of the first electrode E1. The insulating layer 130 has an opening 130a exposing a portion of the circuit layer 120. Referring to fig. 1A and 2A, for example, the opening 130a of the insulating layer 130 may expose the ends of the first signal line SL1 and the power line PL electrically connected to the first electrode E1. For example, in the present embodiment, the material of the insulating layer 130 includes an inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, other suitable materials, or a stacked layer of at least two of the above materials), an organic material (e.g., Polyesters (PET), polyolefins, polyacryls, polycarbonates, polyalkylenes, polyphenylenes, polyethers, polyketones, polyols, polyaldehydes, other suitable materials, or a combination thereof), other suitable materials, or a combination thereof.

In this embodiment, a light-shielding pattern BM may be formed on the circuit layer 120 by using the insulating layer 130 to shield the light reflection of the metal circuit in the circuit layer 120. The material of the light shielding pattern BM may be an organic material (e.g., polyimide, acrylate, or other suitable resin material), graphite, or other suitable material.

Referring to fig. 1A, a protection layer 140 is formed to cover the driving device layer DE. In the embodiment, the protection layer 140 may be a double-layer structure selectively including a first protection sub-layer 142 and a second protection sub-layer 144, but the invention is not limited thereto. In other embodiments, the protection layer 140 may also be a single-layer structureOr a stacked structure of more than two layers. Specifically, in the present embodiment, the first protective sub-layer 142 is formed to cover the driving element layer DE, and then the second protective sub-layer 144 is formed on the first protective sub-layer 142. In one embodiment, the passivation layer 140 has a suitable hardness for protecting the driving device layer DE in the subsequent process. In the present embodiment, the pencil hardness of the protection layer 140 is preferably greater than or equal to 2H to protect the driving element layer DE. Since the protection layer 140 covers the driving element layer DE, the driving element layer DE is not easily damaged when the substrate 110 is subsequently turned over for other processes. The material of the first protective sub-layer 142 and the material of the second protective sub-layer 144 may respectively include metal oxide, inorganic material, or organic material, wherein the metal oxide may be indium tin oxide, zinc tin oxide, or other suitable metal oxide, the inorganic material may be silicon nitride, graphene, or other suitable inorganic material, and the organic material may be polyimide, polymethyl methacrylate, or other suitable organic material. For example, in the present embodiment, the first protective sub-layer 142 and the second protective sub-layer 144 can be made of zinc tin oxide (IZO) and silicon nitride (SiN)_x) But not limited thereto.

Referring to fig. 1B, the substrate 110 is turned over such that the second surface 114 of the substrate 110 faces upward for subsequent processes.

Referring to fig. 1C, then, the connecting wires 154 and the pads 160 are formed on the second surface 114 of the substrate 110. In detail, in the embodiment, under the condition that the protection layer 140 covers the driving device layer DE, a plurality of pads 160 and a plurality of connecting lines 154 respectively extending from the plurality of pads 160 to the edge of the substrate 110 are formed on the second surface 114 of the substrate 110, wherein the plurality of pads 160 are respectively electrically connected to the plurality of connecting lines 154. For example, in the embodiment, under the condition that the protection layer 140 covers the driving element layer DE, the connection lines 154 may be formed on the second surface 114 of the substrate 110 first; next, an insulating layer 180 is formed to cover the connection line 154. The insulating layer 180 has a first contact window 180a and a second contact window 180b, the second contact window 180b exposes one end portion 154b of the connection line 154 near the edge of the substrate 110, and the first contact window 180a exposes the other end portion 154a of the connection line 154 away from the edge of the substrate 110. Then, the pad 160 is formed on the insulating layer 180. The pad 160 is filled in the first contact window 180a of the insulating layer 180 to be electrically connected to the end portion 154a of the connecting wire 154. In short, in the embodiment, the pads 160 may be formed by selectively using a film disposed on the insulating layer 180. However, the invention is not limited thereto, and in other embodiments, other materials may be used to form the pads disposed on the second surface 114, such as: the end 154a of the connecting wire 154 may be directly used as a pad. In the embodiment, the material of the insulating layer 180 may be the same as or different from the material of the insulating layer 130, and the invention is not limited thereto.

Referring to fig. 1D, the passivation layer 140 is removed to expose the driving device layer DE. For example, in the present embodiment, the protection layer 140 may be a double-layer structure composed of a first protection sub-layer 142 and a second protection sub-layer 144, wherein the first protection sub-layer 142 is made of tin zinc oxide, and the second protection sub-layer 144 is made of silicon nitride. In the present embodiment, the first protective sub-layer 142 may serve as a dry etching barrier layer of the second protective sub-layer 144. When the passivation layer 140 is removed, the second passivation layer 144 may be removed by dry etching, and then the first passivation layer 142 may be removed by wet etching. In addition, the step of removing the protection layer 140 to expose the driving device layer DE may further include protecting the pads 160 and the connecting wires 154 on the second surface 114 of the substrate 110 with a peelable glue.

Referring to fig. 1E and fig. 2A, the LED device LED is disposed on the driving device layer DE, so that the LED device LED is electrically connected to the driving device layer DE. In the present embodiment, the LED device is formed on the growth substrate, and then transferred onto the driving device layer DE by using the bulk transfer technique, for example, but the invention is not limited thereto. The LED device LED is electrically connected to the transistor T1 through the first electrode E1, and electrically connected to the common line CL through the second electrode E2.

Referring to fig. 1E, fig. 1F and fig. 2A to fig. 2C, in the present embodiment, a chamfering process may be selectively performed on the substrate 110, so that the substrate 110 has a first connection surface 113, a second connection surface 115 and a side surface 116. The first connection surface 113 is connected between the first surface 112 and the side surface 116. The first surface 112 and the first connection surface 113 have an interface 112A (shown in fig. 2A). The first connection surface 113 has an interface 113a (shown in fig. 2A and 2B) with the side surface 116. Second connection face 115 is connected between second surface 114 and side face 116. The side surface 116 and the second connection surface 115 have an interface 116a (shown in fig. 2B and 2C). The second connection surface 115 and the second surface 114 have an interface 115a (shown in fig. 2B and 2C).

In the present embodiment, the first connection surface 113 may be inclined with respect to the first surface 112 and the side surface 116, and the second connection surface 115 may be inclined with respect to the second surface 114 and the side surface 116. That is, a tangent line tangent to the first connection surface 113 and a tangent line tangent to the first surface 112 have a first inner included angle α, which is an obtuse angle; an inner included angle theta is formed between the first connecting surface 113 and the side surface 116, and the inner included angle theta is an obtuse angle; a tangent line tangent to the second connection surface 115 and a tangent line tangent to the second surface 114 have an inner included angle γ, which is an obtuse angle; an inner included angle delta is formed between the second connecting surface 115 and the side surface 116, and the inner included angle delta is an obtuse angle; however, the present invention is not limited thereto. In addition, in the present embodiment, the first connection surface 113, the side surface 116 and the second connection surface 115 include a plurality of planes that are not parallel. However, the invention is not limited thereto, and the first connection surface 113, the side surface 116 and the second connection surface 115 also include curved surfaces, flat surfaces or combinations thereof. For example, in another embodiment not shown, the first connection surface 113 and the second connection surface 115 may be convex surfaces, and the side surface 116 may be a flat surface, or the first connection surface 113, the side surface 116 and the second connection surface 115 may be connected as one convex surface.

Then, a plurality of conductive trace patterns 200 are formed on the side surface 116 of the substrate 110. The conductive trace pattern 200 is electrically connected between the driving device layer DE and the pad 160. In detail, in the present embodiment, the conductive trace pattern 200 is formed on a portion of the first surface 112 near the interface 112a, the first connection surface 113, the side surface 116, the second connection surface 115, and a portion of the second surface 114 near the interface 115 a. Two ends of the conductive trace pattern 200 are respectively filled into the opening 130a on the first surface 112 and the second contact window 180b on the second surface 114, and electrically connected to the first signal line SL1 on the first surface 112 and the end 154b of the connecting line 154 on the second surface 114. The first electrode E1 for electrically connecting with the LED is electrically connected to the pad 160 on the second surface 114 through the first signal line SL1 on the first surface 112, the power line PL, the conductive trace pattern 200 on the side surface 116, and the connecting line (or fan-out trace) 154 on the second surface 114.

In the present embodiment, the conductive trace pattern 200 includes a first conductive portion 202 (shown in fig. 1E and 1F) and a second conductive portion 204 (shown in fig. 1E and 1F). The first conductive portion 202 is disposed on the first connection surface 113 of the substrate 110. The second conductive portion 204 is disposed on the side surface 116 of the substrate 110. The first conductive portion 202 and the second conductive portion 204 have a second inner included angle β, which is an obtuse angle. In an embodiment, the second inner angle β is substantially equal to the inner angle θ, but not limited thereto. The conductive line pattern 200 further includes a third conductive portion 206 disposed on the second connection surface 115 of the substrate 110. The second conductive portion 204 and the third conductive portion 206 have an inner included angle ω, which is an obtuse angle. In one embodiment, the inner included angle ω is substantially equal to the inner included angle δ, but not limited thereto. That is, the conductive trace pattern 200 is commonly formed on the first connection surface 113, the side surface 116, and the second connection surface 115. For example, the conductive trace pattern 200 conformally covers the first connection face 113, the side face 116 and the second connection face 115, as shown in fig. 1F. In the present embodiment, the conductive line pattern 200 may be formed by screen printing, spraying or other suitable methods.

Referring to fig. 1E, next, in the present embodiment, a covering layer 210 may be formed to cover the conductive line pattern 200. For example, the material of the covering layer 210 is an insulating material, and includes an inorganic material (e.g., silicon nitride, silicon oxide, silicon oxynitride, other suitable materials, or a stacked layer of at least two of the above materials), an organic material (e.g., Polyesters (PET), polyolefins, polyacryls, polycarbonates, polyalkylenes, polyphenylenes, polyethers, polyketones, polyols, polyaldehydes, other suitable materials, or a combination thereof), other suitable materials, or a combination thereof.

Referring to fig. 1E and fig. 2C, the driving chip 192 is disposed on the second surface 114 of the substrate 110, so that the driving chip 192 is electrically connected to the pad 160. For example, the driving chip 192 may be electrically connected to the pad 160 and fixed on the second surface 114 of the substrate 110 by the anisotropic conductive film 194 filled in the first contact hole 180 a. However, the invention is not limited thereto, and in the embodiment, the driving chip 192 may also be electrically connected to the pad 160 and fixed on the second surface 114 by other methods.

Based on the above, in the display device 100 and the manufacturing method thereof according to the embodiment of the invention, the conductive trace pattern 200 disposed on the side surface 116 of the substrate 110 can electrically connect the driving device layer DE on the first surface 112 of the substrate 110 and the pad 160 on the second surface 114. That is, most of the conductive trace pattern 200 is disposed on the side surface 116 and the second surface 114 of the substrate 110 without occupying too much peripheral area of the first surface 112 (i.e., the display surface of the display device 100). Therefore, the peripheral area of the first surface 112 which cannot be used for displaying can be reduced, so that a display device with an ultra-narrow frame or even without a frame is realized, and the screen occupation ratio is improved. In addition, in the manufacturing method, the driving element layer DE is covered by the protection layer 140, so that the driving element layer DE is protected from being damaged when the substrate 110 is turned over for other processes.

Fig. 3A to 3G are schematic cross-sectional views illustrating a manufacturing process of a display device according to another embodiment of the invention. Fig. 3G is an enlarged schematic view of a partial region 100 a' of the display device of fig. 3F. It should be noted that the embodiment of fig. 3A to 3F follows the element numbers and partial contents of the embodiment of fig. 1A to 1E, wherein the same or similar elements are denoted by the same or similar reference numbers, and the description of the same technical contents is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, which are not repeated herein.

The embodiment of fig. 3A to 3G differs from the embodiment of fig. 1A to 1F in the characteristic that: the protective layer used in the manufacturing process is different.

Referring to fig. 3A, in the present embodiment, first, a substrate 110 having a first surface 112 and a second surface 114 opposite to each other is provided. Next, a driving element layer DE is formed on the first surface 112 of the substrate 110, wherein the driving element layer DE includes the circuit layer 120, and a first electrode E1 and a second electrode E2 electrically connected to the circuit layer 120.

Referring to fig. 3B, a passivation layer 170 is formed to cover the driving device layer DE. In this embodiment, the material of the protection layer 170 may be glass, and the protection layer 170 may be a single layer or a composite multi-layer structure, but not limited thereto. The passivation layer 170 can be adhered to the driving element DE by an adhesive layer 172.

Referring to fig. 3C, the substrate 110 is thinned to form a thinned substrate 110 'and a thinned passivation layer 170'. In particular, in the aforementioned processes, such as the wet etching process, some water marks which are not easy to be observed are easily formed on the second surface 114 of the substrate 110, or residual contamination is generated due to the splashing of the etching solution during the process, which affects the reliability of the subsequent processes on the second surface 114 of the substrate 110. When the material of the passivation layer 170 is glass, the thinning process can remove the water marks or residual stains on the second surface 114 to improve the reliability of the product, and the requirement of thinning the substrate 110 can be met. Through the thinning process, the thickness of the substrate 110' can be adjusted to 0.7-0.2 mm.

Referring to fig. 3D, the substrate 110 ' is turned over such that the second surface 114 ' of the substrate 110 ' faces upward. Then, under the condition that the passivation layer 170 'covers the driving device layer DE, a plurality of pads 160 and a plurality of connecting lines 154 respectively extending from the plurality of pads 160 to the edge of the substrate 110' are formed on the second surface 114 'of the substrate 110', wherein the plurality of pads 160 are respectively electrically connected to the plurality of connecting lines 154. Next, an insulating layer 180 is formed to cover the connection line 154. The insulating layer 180 has a first contact window 180a and a second contact window 180b, the second contact window 180b exposes one end portion 154b of the connection line 154 near the edge of the substrate 110 ', and the first contact window 180a exposes the other end portion 154a of the connection line 154 far from the edge of the substrate 110'. Then, the pad 160 is formed on the insulating layer 180. The pad 160 is filled in the first contact window 180a of the insulating layer 180 to be electrically connected to the end portion 154a of the connecting wire 154.

Referring to fig. 3E, the passivation layer 170' is removed to expose the driving device layer DE.

Referring to fig. 3F and fig. 3G, the LED device LED is disposed on the driving device layer DE, so that the LED device LED is electrically connected to the driving device layer DE. Next, in the present embodiment, a chamfering process may be selectively performed on the substrate 110 'so that the substrate 110' has a first connection surface 113, a second connection surface 115 and a side surface 116.

Then, a plurality of conductive trace patterns 200 are formed on the side surface 116 of the substrate 110'. The conductive trace pattern 200 is electrically connected between the driving device layer DE and the pad 160.

Next, in the present embodiment, a covering layer 210 may be formed to cover the conductive trace pattern 200.

Then, the driving chip 192 is disposed on the second surface 114 'of the substrate 110', so that the driving chip 192 is electrically connected to the pad 160. In this way, the display device 100' is completed.

In summary, the display device and the manufacturing method thereof of the present invention include: providing a substrate with a first surface and a second surface which are opposite; forming a driving element layer on the first surface of the substrate; forming a protective layer to cover the driving element layer; forming a pad on the second surface of the substrate under the condition that the protective layer covers the driving element layer; arranging the light-emitting diode element on the driving element layer so as to electrically connect the light-emitting diode element with the driving element layer; forming a plurality of conductive circuit patterns on the side surface of the substrate, wherein one conductive circuit pattern is electrically connected between the driving element layer and the pad, and the side surface is connected between the first surface and the second surface; and arranging the driving chip on the second surface of the substrate so as to electrically connect the driving chip and the connecting pad. Particularly, a plurality of conductive circuit patterns are formed on the side surface of the substrate, wherein one conductive circuit pattern is electrically connected between the driving element layer and the pad. Therefore, the peripheral area of the first surface of the substrate, which cannot be used for displaying, can be reduced, and then the display device with an ultra-narrow frame or even without the frame is realized, so that the screen occupation ratio of the display device is improved. In addition, the protective layer covers the driving element layer in the method for manufacturing the display device, so that the driving element layer can be protected from being damaged easily when the substrate is turned over for other processes, and the reliability of the display device is improved.

The present invention is capable of other embodiments, and various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A method of manufacturing a display device, comprising:

providing a substrate having a first surface and a second surface opposite to each other;

forming a driving element layer on the first surface of the substrate;

forming a protective layer to cover the driving element layer;

forming at least one pad on the second surface of the substrate under the condition that the protective layer covers the driving element layer;

arranging at least one light-emitting diode element on the driving element layer so as to electrically connect the at least one light-emitting diode element with the driving element layer;

forming at least one conductive circuit pattern on one side surface of the substrate, and electrically connecting the driving element layer and the at least one pad, wherein the side surface is connected between the first surface and the second surface; and

and arranging a driving chip on the second surface of the substrate so that the driving chip is electrically connected with the at least one pad.

2. The method of manufacturing a display device according to claim 1, further comprising:

forming at least one connecting line on the second surface of the substrate under the condition that the protective layer covers the driving element layer, wherein the connecting line extends from the at least one connecting pad to one edge of the substrate; and

and forming an insulating layer on the at least one pad and the at least one connecting line under the condition that the protective layer covers the driving element layer, wherein the insulating layer is provided with a first contact window and a second contact window which are respectively overlapped on the at least one pad and the at least one connecting line.

3. The method of manufacturing a display device according to claim 2, further comprising:

after the at least one pad is formed and before the at least one LED element is arranged, the protective layer is removed.

4. The method of claim 3, wherein the step of removing the protective layer comprises:

and protecting the at least one pad and the at least one connecting line on the second surface of the substrate by using a strippable glue.

5. The method of claim 1, wherein the protective layer has a pencil hardness of 2H or more.

6. The method of claim 1, wherein the passivation layer comprises ITO, ZnSe, SiN, glass, polyimide, PMMA, or combinations thereof.

7. The method of manufacturing a display device according to claim 1, further comprising:

and performing a chamfering process to make the substrate have a first connection surface connected between the first surface and the side surface, wherein the at least one conductive circuit pattern conformally covers the first connection surface and the side surface.

8. The method according to claim 7, wherein an inner angle is formed between the first connection surface and the first surface or between the first connection surface and the side surface, and the inner angle is an obtuse angle.

9. The method of manufacturing a display device according to claim 1, further comprising:

forming a covering layer to cover the at least one conductive circuit pattern.

10. A display device, comprising:

the substrate is provided with a first surface, a second surface opposite to the first surface and a side surface connected between the first surface and the second surface;

a driving element layer disposed on the first surface of the substrate;

a plurality of light emitting diode elements arranged on the driving element layer and electrically connected with the driving element layer;

a plurality of pads disposed on the second surface of the substrate;

the driving chip is arranged on the connecting pads and is electrically connected with the connecting pads; and

and a plurality of conductive circuit patterns arranged on the side surface of the substrate and electrically connected between the driving element layer and the pads.

11. The display device according to claim 10, wherein the substrate further has a first connection surface connected between the first surface and the side surface, wherein a tangent to the first connection surface and a tangent to the first surface have a first inner included angle, the first inner included angle is an obtuse angle, and the plurality of conductive trace patterns conformally cover the first connection surface and the side surface.

12. The display device according to claim 11, wherein at least one of the conductive trace patterns comprises:

a first conductive part disposed on the first connection surface of the substrate; and

and the second conductive part is arranged on the side surface of the substrate, wherein a second inner included angle is formed between the first conductive part and the second conductive part, and the second inner included angle is an obtuse angle.

13. The display device of claim 10, further comprising:

a plurality of connecting wires extending from the plurality of pads to an edge of the substrate; and

an insulating layer disposed on the pads and the connecting lines, the insulating layer having a plurality of first contact windows and a plurality of second contact windows respectively overlapping the pads and the connecting lines, wherein the connecting lines are electrically connected to the conductive trace patterns through the second contact windows and to the pads through the first contact windows, and the driving chip is electrically connected to the pads through the first contact windows.