CN110048692A - A kind of across the quadrant phase-moving method of vector addition phase shifter and circuit - Google Patents
A kind of across the quadrant phase-moving method of vector addition phase shifter and circuit Download PDFInfo
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- CN110048692A CN110048692A CN201810202999.6A CN201810202999A CN110048692A CN 110048692 A CN110048692 A CN 110048692A CN 201810202999 A CN201810202999 A CN 201810202999A CN 110048692 A CN110048692 A CN 110048692A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
- H03G3/20—Automatic control
- H03G3/30—Automatic control in amplifiers having semiconductor devices
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/16—Networks for phase shifting
Abstract
Propose across the quadrant phase-shifting control method and quadrant switching circuit for simulating vector addition phase shifter, the polarity selection signal for generating the different gain adjustment voltage of monotonicity variation tendency and respective synchronization variation when phase shift variation is carried out between different quadrant sections, and signal phase is automatically continuously changed between multiple quadrant sections by the control of single voltage one direction.Gain adjustment voltage generation circuit includes to be made of four difference amplifiers and an output-stage circuit, and polarity selection signal generation circuit is made of two window comparators.
Description
Technical field
The present invention relates to signal processing phase-shift circuits used in communication equipment and measuring device.
Technical background
Vector addition phase-shift theory is as shown in Figure 1.I+ and Q+ is the unit orthogonal vector of two positive polaritys, I- and Q- in figure
It is the unit orthogonal vector of two negative polarity.
Assuming that orthogonal vector I+ and Q+ can be expressed as cos (θ) and sin (θ), I+ and Q+ are respectively multiplied by corresponding control system
Number A and B and it is added available output signal y
Meet in A, BUnder conditions of change A, B value size, then output signal can keep amplitude not
Become, and phase angle changes with the ratio of (B/A).It can be changed in this way by the amplitude of two orthogonal signalling and realize output signal
Phase shift.The phase shift within the scope of 90 ° may be implemented in this way.When phase shift range is more than 90 °, i.e., in across quadrant phase shift, I branch or
The polarity needs of the orthogonal base vector of Q branch switch over, the variation of the control coefrficient when phase increaseds or decreases needed for it
Rule is also different.When such as from first quartile phase shift to the second quadrant, I path quadrature base vector is changed by positive polarity unit vector I+
Be negative polarity unit vector I-.In first quartile, as phase increases, I branch control coefrficient coefficient A monotone decreasing, and Q branch
Control coefrficient B monotone increasing;And in the second quadrant, as phase increases, I branch control coefrficient A monotone increasing, and Q branch controls B
Monotone decreasing.
Polarity that table 1 illustrates I, Q branch base vector of different quadrants and corresponding control coefrficient are with the increased change of phase shift
Law.
I, Q branch base vector polarity and control coefrficient between the different quadrants of table 1
The first phase in 2016 " microelectronics " Suzhou University of Science and Technology learns to farm in field et al. " a kind of low gain stochastic wave simulation delivered
The design of a vector addition phase shifter " text describes simulation vector addition phase shifter as shown in Figure 2.
Fig. 2 circuit two modules of main envelope, i.e. I/Q network and vector summation network.Wherein I/Q network is embodied as figure
The realization of poly phase filter shown in 3, vector summation network is as shown in Figure 4.The two of the output of polyphase filtering network shown in Fig. 3
Road orthogonal signalling, i.e., with VI+With VI-For the I tributary signal of output terminal and with VQ+And VQ-For the Q tributary signal of output terminal.I
Tributary signal and Q tributary signal are connected to the differential input end of vector addition circuit as base vector signal, as shown in Figure 4.
Pass through polarity selection signal SI,、SQ、Selection polar for input signal may be implemented, also determine output in this way
The quadrant range of signal phase, S hereIWithFor logic NOT relationship, i.e. SIWhen=1Or SIWhen=0SQ
WithBetween be also similar logic NOT relationship.Assuming that SI=1, SQI branch base vector and Q branch base vector polarity is all when=1
It is positive, for output phase within the scope of first quartile, then the output phase that generate in the second quadrant needs I branch base vector polarity
It is negative, Q branch base vector is positive, that is, needs SI=0, SQ=1.
Fig. 4 left-hand component is gain control circuit, with gain adjustment voltage VMElectric current I may be implemented in variationAIn IIWith IQ
Between the variation of different allocation proportions, and then control the mutual conductance of I branch and Q branch difference channel in vector addition circuit to realize
The variation at phase of output signal angle during Vector modulation.In 90 ° of phase shift ranges, this gain control circuit can be simple
The automatic continuous adjusting for phase of output signal is realized using the unidirectional variation of gain adjustment voltage.In across quadrant phase shift,
Gain adjustment voltage V when phase increasesMMonotonicity variation tendency have difference in different quadrants.Assuming that phase is in first quartile
When variation, V can be increased by dullnessMSo that phase increases;Then when phase change is to the second quadrant, in order to enable phase increases
Add, gain adjustment voltage VMNeed dull reduction.Become in different quadrant gain adjustment voltages relative to the variation of phase change
Gesture is different.
It can be seen from the above within the scope of the same quadrant of Fig. 2 scheme when phase shift, it can be by changing gain adjustment voltage VM
Realize continuous automatic shifting phase;And when across quadrant phase shift, then need to change the value of polarity selection signal to realize opposed polarity
Base vector signal input, it is also desirable to change gain adjustment voltage with the variation tendency of phase change.But Fig. 2 scheme does not illustrate
How required polarity selection signal and gain adjustment voltage are generated when across quadrant phase shift, and such scheme can only manually control reality
Existing principle verifying, can not achieve single voltage and controls 360 ° of continuous automatic shifting phases of all phase.
The present invention proposes a kind of quadrant switching method and circuit on the basis of Fig. 2 scheme, can be in across quadrant phase shift
The polarity selection signal that different quadrants are generated according to the variation of control signal also can occur in monotonicity in different quadrants and become
The different gain adjustment voltage of change trend realizes that single voltage one direction controls 360 ° of continuous automatic shifting phases of all phase.
Summary of the invention
The present invention propose it is a kind of for simulating the quadrant switching method and circuit of vector addition phase shifter, can be across quadrant
The polarity selection signal for generating different quadrants when phase shift according to the variation of control signal also can occur in single in different quadrants
The different gain adjustment voltage of tonality variation tendency realizes that single voltage one direction controls 360 ° of continuous automatic shifting phases of all phase.
Vector addition phase shifter quadrant switching method proposed by the present invention, when simulation vector addition phase shifter is in phase shift process
In it is across quadrant when, change I branch base vector signal and Q branch base vector signal polarity, change simultaneously I branch control coefrficient
Variation tendency when increasing with Q branch control coefrficient relative to phase realizes that signal phase is controlled by single voltage one direction
Automatically continuously change between multiple quadrant sections.
Further, I branch base vector signal is equal with Q branch base vector signal amplitude, and 90 ° of phase phase difference;Positive polarity I branch
Roadbed vector signal and negative polarity I branch base vector signal amplitude are equal, and 180 ° of phase phase difference;Positive polarity Q branch base vector letter
It is number equal with negative polarity Q branch base vector signal amplitude, 180 ° of phase phase difference.
Further, I branch control coefrficient and the quadratic sum of Q branch control coefrficient remain unchanged during phase shift;Same
In one quadrant when phase shift, I branch control coefrficient is opposite with the variation tendency of Q branch;In across quadrant phase shift, I branch control system
Number can change in different quadrant sections with the increased variation tendency of phase from Q branch control coefrficient.
Quadrant switching circuit proposed by the invention includes that gain adjustment voltage generation circuit and polarity selection signal generate
Circuit;The input of gain adjustment voltage generation circuit is control voltage VC, export as gain adjustment voltage VM;Polarity selection signal produces
Raw circuit input is control voltage VC, export as polarity selection signal SI、SQ, SIWithFor logic NOT relationship,With
SQFor logic NOT relationship.
Further, the first branch of the first differential pair of the gain adjusting circuit generation circuit is metal-oxide-semiconductor M0ASource electrode
With resistance R0AThe branch of connection, the second branch of the first differential pair are metal-oxide-semiconductor M0BSource electrode and resistance R0BThe branch of connection, MOS
Pipe M0CDrain electrode and resistance R0AAnd R0BCommon end be connected to tail current source, metal-oxide-semiconductor M0CSource electrode ground connection, metal-oxide-semiconductor M0A's
Grid and reference voltage Vref0Connection, metal-oxide-semiconductor M0BGrid with control voltage VC connect, metal-oxide-semiconductor M0CGrid and bias voltage
VSConnection.
The third branch of second differential pair of gain adjusting circuit generation circuit is metal-oxide-semiconductor M1ASource electrode and resistance R1A
The branch of connection, the 4th branch of the second differential pair are metal-oxide-semiconductor M1BSource electrode and resistance R1BThe branch of connection, metal-oxide-semiconductor M1CLeakage
Pole and resistance R1AAnd R1BCommon end be connected to tail current source, metal-oxide-semiconductor M1CSource electrode ground connection, metal-oxide-semiconductor M1BGrid and reference
Voltage Vref1Connection, MOS pipe M1AGrid with control voltage VC connect, metal-oxide-semiconductor M1CGrid and bias voltage VSConnection.
5th branch of the gain adjusting circuit generation circuit third differential pair is metal-oxide-semiconductor M2ASource electrode and resistance R2A
The branch of connection, the 6th branch of third differential pair are metal-oxide-semiconductor M2BSource electrode and resistance R2BThe branch of connection, metal-oxide-semiconductor M2CLeakage
Pole and resistance R2AAnd R2BCommon end be connected to tail current source, metal-oxide-semiconductor M2CSource electrode ground connection, metal-oxide-semiconductor M2AGrid and reference
Voltage Vref2Connection, MOS pipe M2BGrid with control voltage VC connect, metal-oxide-semiconductor M2CGrid and bias voltage VSConnection.
7th branch of the 4th differential pair of gain adjusting circuit generation circuit is metal-oxide-semiconductor M3ASource electrode and resistance R3A
The branch of connection, the 8th branch of the 4th differential pair are metal-oxide-semiconductor M3BSource electrode and resistance R3BThe branch of connection, metal-oxide-semiconductor M3CLeakage
Pole and resistance R3AAnd R3BCommon end be connected to tail current source, metal-oxide-semiconductor M3CSource electrode ground connection, metal-oxide-semiconductor M3BGrid and reference
Voltage Vref3Connection, MOS pipe M3AGrid with control voltage VC connect, metal-oxide-semiconductor M3CGrid and bias voltage VSConnection.
Transistor M4With M5Grid and drain electrode be shorted and connect to power supply as active load, the source electrode and M of M40A、
M1A、M2A、 M3ADrain electrode connection, M5Source electrode and M0B、M1B、M2B、M3BDrain electrode connection;Metal-oxide-semiconductor M6Grid connect bias voltage
VB, source electrode ground connection, drain electrode with resistance RLConnection, M4Source electrode and resistance RLConnection, M4Source voltage as the gain exported
Adjust voltage VM。
Metal-oxide-semiconductor M0C、M1C、M2C、M3CThe drain current to work in saturation state is equal.
Further, reference voltage Vref0< Vref1< Vref2< Vref3, and meet following relationship
Vref1-Vref0=Vref2-Vref1=Vref3-Vref2=2 Δ VinM
WhereinISSMFor M0C、M1C、M2CWith M3CThe drain current to work in saturation state.
Further, the first branch of the first window comparator of polarity selection signal generation circuit has comparator C1 and two poles
Pipe D1, the second branch of first window comparator have comparator C2 and diode D2, the inverting input terminal and reference of comparator C1
Voltage UDMConnection, the non-inverting input terminal and reference voltage U of comparator C2BMConnection, the non-inverting input terminal of comparator C1 and C2's is anti-
Phase input terminal connects and is connected to control voltage VC;The output end of comparator C1 is connect with the anode of diode D1, comparator
The anode of the output end of C2 and diode D2 are connect, and the output circuit of first window comparator has a resistance RC1 and resistance RC2, and two
Pole pipe D5 and phase inverter I1, one end of resistance RC1 are connected to the cathode of diode D1 Yu diode D2, and other the one of resistance RC1
End is connected to polarity selection output signal SI, resistance RC2 is connected in parallel with diode D5, the plus earth of diode D5, cathode
It is connected to polarity selection output signal SI;The input terminal and polarity selection signal S of phase inverter I1IConnection, output end and polarity select
SignalConnection;
The third branch of second window comparator of polarity selection signal generation circuit has comparator C3 and diode D3, the
4th branch of two window comparators has comparator C4 and diode D4, the inverting input terminal and reference voltage U of comparator C3EMEven
It connects, the non-inverting input terminal and reference voltage U of comparator C4CMConnection, the non-inverting input terminal of comparator C3 and the inverting input terminal of C4
It connects and is connected to control voltage VC;The output end of comparator C3 is connect with the anode of diode D3, the output of comparator C4
End is connect with the anode of diode D4, and the output circuit of the second window comparator has a resistance RC3 and resistance RC4, diode D6 and
Phase inverter I2, one end of resistance RC3 are connected to the cathode of diode D3 Yu diode D4, and the other end of resistance RC3 is connected to
Polarity selects output signal SQ, resistance RC4 is connected in parallel with diode D6, and the plus earth of diode D6, cathode is connected to pole
Property selection output signal SQ;The input terminal and polarity selection signal S of phase inverter I2QConnection, output end and polarity selection signal
Connection.
Further, reference voltage UAM、UBM、UCM、UDM、UEMMeet following relationship
UAM=Vref0-ΔVinM
UBM=Vref1-ΔVinM
UCM=Vref2-ΔVinM
UDM=Vref3-ΔVinM
UEM=Vref3+ΔVinM
Detailed description of the invention
Fig. 1 is vector addition phase-shift theory figure.
Fig. 2 is existing phase shifter scheme.
Fig. 3 is multiphase filtering network.
Fig. 4 is vector summation network.
Fig. 5 is the phase shifter with quadrant switching circuit.
Fig. 6 is quadrant switching circuit.
Fig. 7 is the different quadrant sections for controlling voltage.
Fig. 8 is basic difference unit circuit.
Fig. 9 is difference unit circuit transmission characteristic
Figure 10 is gain adjustment voltage generation circuit.
Figure 11 is IAWith VCRelation curve.
Figure 12 is VCWith VMRelation curve.
Figure 13 is window comparator.
Figure 14 is window comparator transmission characteristic.
Figure 15 is polarity selection voltage signal generation circuit.
Figure 16 is polarity selection waveform voltage signal.
Specific embodiment
Fig. 5 is to have used the phase shifter proposed by the present invention with quadrant switching circuit.The input of I/Q network is input letter
Number VIN, the output of I/Q network is two-way orthogonal basis vector signal VIWith VQ;The input of quadrant switching module is control signal VC, export and be
Gain adjustment voltage VMWith polarity control signal SI、SQ、Polarity selecting module is in polarity control signal SI、SQ、Under the action of control amplifier I and the orthogonal base vector of amplifier Q input terminal polarity, gain control module it is defeated
Voltage V outGIWith VGQIt can control the gain of amplifier I Yu amplifier Q, amplifier I is added to obtain defeated with the output of amplifier Q
Signal V outOUT.In addition to quadrant switching module in Fig. 5 circuit, other modular circuits are realized identical as Fig. 2.
Quadrant switching circuit is as shown in fig. 6, there is an input termination control signal VC, output end voltage VMFor gain adjustment
Voltage, output signal SI、SQ、For polarity selection signal.
Assuming that control signal VCRange is UA<VC<UE, it can uniformly be divided into four continuous sections as shown in Figure 7.Wherein
First quartile section is [UA,UB], the second quadrant section is [UB,UC], third quadrant section is [UC,UD], fourth quadrant section
For [UD,UE]。
The output of quadrant switching circuit is the piecewise function of input, in the different quadrant sections gain adjustment electricity of control voltage
Press VMMonotonicity trend it is different, polarity selection signal SIWith SQValue it is also different, as shown in table 2.SIWithWith SQIt is
Logic NOT relationship utilizes S in tableIWith SQIt can be obtained according to logic NOT relationship accordinglyWith
Table 2 controls voltage VCGain adjustment voltage V at different quadrant sectionsMWith polarity selection signal
VC | VM | SISQ |
First quartile section | It is increased monotonically | 11 |
Second quadrant section | Monotone decreasing | 01 |
Third quadrant section | It is increased monotonically | 00 |
Fourth quadrant section | Monotone decreasing | 10 |
VCOutput signal V at different quadrant sectionsMThe as gain adjustment voltage of gain control module, it is assumed that controlling
Voltage V processedCFirst quartile section with VCIncrease gain adjustment voltage VMMonotone increasing, then as control voltage VCChange to
With V when two quadrant sectionCIncrease gain adjustment voltage VMMeeting monotone decreasing, as shown in table 2.
In different quadrant section polarity selection signal SISQOutput it is also different, as represented by table 2, may be implemented in this way pair
In the polar selection of input signal in different quadrant sections.
The realization of quadrant switching module includes two circuits, i.e. gain adjustment voltage generation circuit and polarity selection signal produces
Raw circuit.Gain adjustment voltage is according to control voltage VCGenerate gain adjustment voltage VM, and polarity selection signal generation circuit according to
Control voltage VCIt generates polarity and selects voltage signal SI、SQ、
The transmission characteristic of difference channel is utilized in gain adjustment voltage generation circuit.Fig. 8 is a basic difference unit
Circuit, Differential Input MOS pipe M1With M2Grid connect input voltage Vin1With Vin2, M1With M2Source electrode meet tail current source Iss。
Fig. 9 is the transmission characteristic of basic difference unit circuit.
The horizontal axis of Fig. 9 is Δ Vin, here Δ Vin=Vin1-Vin2, and as following formula defines Δ Vin1
Differential Input Vin1-Vin2<-ΔVin1When, M1Shutdown, tail current source current ISSFlow completely through M2;When Differential Input-
ΔVin1<Vin1-Vin2<ΔVin1When, M1、M2It simultaneously turns on, and with Vin1-Vin2Increase, M1Electric current in pipe gradually increases
Greatly, M2Electric current in pipe is gradually reduced;Work as Vin1-Vin2>ΔVin1When, M2Shutdown, tail current source current ISSFlow completely through M1.With
Δ VinChange M1With M2The variation of middle drain current is as shown in Figure 9.
Using the transmission characteristic of basic difference channel shown in Fig. 9, Figure 10 circuit can be constructed.
Figure 10 is proposed gain adjustment voltage generation circuit, coupled as shown by four difference channels, M0AWith M0B、M1A
With M1B、M2AWith M2B、M3AWith M3BIt is the input circuit of each difference channel respectively, controls voltage VCIt is connected to transistor M0B、M1A、
M2B、M3AGrid, reference voltage Vref0It is connected to M0AGrid, reference voltage Vref1It is connected to M1BGrid, reference voltage
Vref2It is connected to M2AGrid, reference voltage Vref3It is connected to M3BGrid, M0C、M1C、M2CWith M3CIt is to be used as tail current source
MOS transistor, M0C、M1C、M2CWith M3CGrid be connected to common bias voltage VS, M4With M5It is that two grid leaks are shorted
MOS transistor is used as load, M6With resistance RLFor output-stage circuit, output voltage VMAs gain adjustment voltage.
V in Figure 10 circuitref0< Vref1< Vref2< Vref3, and meet following relationship
Vref1-Vref0=Vref2-Vref1=Vref3-Vref2=2 Δ VinM
WhereinISSMFor M0C、M1C、M2CWith M3CWork the tail current provided in saturation state.
M0C、M1C、 M2CWith M3CThis four metal-oxide-semiconductor breadth length ratios are identical, and gate bias voltage is all VS, therefore provided tail current all phases
Deng.
Control voltage VCFour quadrant sections be respectively as follows:
Control the first quartile section of voltage, [Vref0-ΔVinM,Vref0+ΔVinM]
Control the second quadrant section of voltage, [Vref1-ΔVinM,Vref1+ΔVinM]
Control the third quadrant section of voltage, [Vref2-ΔVinM,Vref2+ΔVinM]
Control the fourth quadrant section of voltage, [Vref3-ΔVinM,Vref3+ΔVinM]
M4Source current IAIt can be expressed as
IA=I0A+I1A+I2A+I3A+Ibias
Here I0AFor M0ASource current, I1AFor M1ASource current, I2AFor M2ASource current, I3AFor M3ASource
Electrode current, IbiasFor M6Drain current.
As control voltage VC<Vref0-ΔVinMWhen, M0B、M1A、M2B、M3ACut-off, IA=Ibias+2ISSM,
Gain adjustment voltage VMFor minimum value VML, can be expressed as
Here VTHFor M4Threshold voltage, μnFor M4The mobility of carrier, C in conducting channelOXFor M4Gate oxide electricity
Hold, W and L are respectively M4Grid width and length.
As control voltage VC>Vref0-ΔVinMAnd VC<Vref0+ΔVinMWhen, i.e. VCAt first quartile section, M0BConducting,
M1A、M2B、M3ACut-off is kept, with VCIncrease, I0AIt is gradually reduced and I0BIt gradually increases, electric current IAReduce, and VMIncrease, when
VC=Vref0+ΔVinM=Vref1-ΔVinMWhen, electric current I0AIt is 0, and electric current I0BFor ISSM, at this moment IA=Ibias+ISSM, gain adjustment
Voltage VMFor maximum value VMU, can be expressed as
As control voltage VC>Vref1-ΔVinMAnd VC<Vref1+ΔVinMWhen, i.e. VCAt the second quadrant section, M0A、M2B、
M3ACut-off, with VCIncrease, I1AIncrease, I1BReduce, electric current IAIncrease, and VMReduce, works as VCIncrease to VC=Vref1+ΔVinM,
Gain adjustment voltage VMEqual to VML。
It is available to work as V by similar analysisCIn third and fourth quadrant section changes and VC>Vref3+ΔVinM
When, M4In load current IAVariation it is as shown in figure 11, output gain adjustment voltage VMVariation it is as shown in figure 12.It can see
To in different quadrant section gain adjustment voltage VMWith VCVariation tendency changed, i.e. VMMonotonicity trend have occurred
Variation.
The basic unit of polarity selection signal generation circuit is a window comparator, and window comparator is as shown in figure 13,
Wherein A, B are two comparator circuits.As input voltage Ui<UrlWhen, export UoFor high level UoH;Work as Url<Ui<UrhWhen, output
UoFor low level UoL;Work as Ui>UrhWhen, export UoFor high level UoH;Figure 14 illustrates the input-output characteristic of window comparator.
Using the characteristic of window comparator, polarity selection signal generation circuit as shown in figure 15 can be constructed, this
Circuit includes two window comparators, and wherein comparator C1 and C2 are the main circuit of I branch window comparator, comparator C3 with
C4 is the main circuit of Q branch window comparator.U in Figure 15 and Figure 16AM、UBM、UCM、UDM、UEMFor reference voltage, meet such as
Lower relationship.
UAM=Vref0-ΔVinM
UBM=Vref1-ΔVinM
UCM=Vref2-ΔVinM
UDM=Vref3-ΔVinM
UEM=Vref3+ΔVinM
Here Vref0、Vref1、Vref2、Vref3And Δ VinMIt is identical as meaning shown in Figure 10 circuit.I branch window compares
The output signal of device is SI, obtained in output end by a phase inverter I1The output signal of Q branch window comparator is
SQ, obtained in output end by a phase inverter I2Polarity selects voltage signal SI、SQChange between different quadrant sections
Change as shown in figure 16, it can be seen that in different quadrant section SIWith SQValue described with table 2 it is consistent.
The embodiment of quadrant switching circuit is explained above.It should be pointed out that as long as no essence of the invention is detached from simultaneously
And meet the definition in claim, do suitably modified still belonging to the scope of the present invention on above-mentioned example.
Claims (8)
1. across the quadrant phase-moving method of a kind of simulation vector addition phase shifter, it is characterized in that: when simulation vector addition phase shifter is moving
When across quadrant during phase, change the polarity of I branch base vector signal and Q branch base vector signal, changes simultaneously the control of I branch
Variation tendency when coefficient and Q branch control coefrficient increase relative to phase realizes signal phase by single voltage one direction control
System automatically continuously changes between multiple quadrant sections.
2. across the quadrant phase-moving method of simulation vector addition phase shifter in claim 1, it is characterized in that: I branch base vector signal
It is equal with Q branch base vector signal amplitude, 90 ° of phase phase difference;Positive polarity I branch base vector signal and negative polarity I branch basic vector
It is equal to measure signal amplitude, 180 ° of phase phase difference;Positive polarity Q branch base vector signal and negative polarity Q branch base vector signal amplitude
It is equal, 180 ° of phase phase difference.
3. across the quadrant phase-moving method of simulation vector addition phase shifter in claim 1, it is characterized in that: I branch control coefrficient and Q
The quadratic sum of branch control coefrficient remains unchanged during phase shift;In same quadrant when phase shift, I branch control coefrficient and Q
The variation tendency of branch is opposite;In across quadrant phase shift, I branch control coefrficient is from Q branch control coefrficient in different quadrant areas
Between can change with the increased variation tendency of phase.
4. a kind of realize the quadrant switching circuit across quadrant automatic shifting phase in simulation vector addition phase shifter, it is characterized in that: as
Limiting switching circuit includes gain adjustment voltage generation circuit and polarity selection signal generation circuit;Gain adjustment voltage generation circuit
Input is control voltage VC, export as gain adjustment voltage VM;The input of polarity selection signal generation circuit is control voltage VC, defeated
It is out polarity selection signal SI、SQ, SIWithFor logic NOT relationship,With SQFor logic NOT relationship.
5. the quadrant switching circuit across quadrant automatic shifting phase is realized in the simulation vector addition phase shifter in claim 4, it is special
Sign is: the first branch of the first differential pair of the gain adjusting circuit generation circuit is metal-oxide-semiconductor M0ASource electrode and resistance R0AEven
The branch connect, the second branch of the first differential pair are metal-oxide-semiconductor M0BSource electrode and resistance R0BThe branch of connection, metal-oxide-semiconductor M0CDrain electrode
With resistance R0AAnd R0BCommon end be connected to tail current source, metal-oxide-semiconductor M0CSource electrode ground connection, metal-oxide-semiconductor M0AGrid and with reference to electricity
Press Vref0Connection, metal-oxide-semiconductor M0BGrid with control voltage VC connect, metal-oxide-semiconductor M0CGrid and bias voltage VSConnection;
The third branch of second differential pair of gain adjusting circuit generation circuit is metal-oxide-semiconductor M1ASource electrode and resistance R1AConnection
Branch, the 4th branch of the second differential pair are metal-oxide-semiconductor M1BSource electrode and resistance R1BThe branch of connection, metal-oxide-semiconductor M1CDrain electrode and electricity
Hinder R1AAnd R1BCommon end be connected to tail current source, metal-oxide-semiconductor M1CSource electrode ground connection, metal-oxide-semiconductor M1BGrid and reference voltage
Vref1Connection, metal-oxide-semiconductor M1AGrid with control voltage VC connect, metal-oxide-semiconductor M1CGrid and bias voltage VSConnection;
5th branch of the gain adjusting circuit generation circuit third differential pair is metal-oxide-semiconductor M2ASource electrode and resistance R2AConnection
Branch, the 6th branch of third differential pair are metal-oxide-semiconductor M2BSource electrode and resistance R2BThe branch of connection, metal-oxide-semiconductor M2CDrain electrode and electricity
Hinder R2AAnd R2BCommon end be connected to tail current source, metal-oxide-semiconductor M2CSource electrode ground connection, metal-oxide-semiconductor M2AGrid and reference voltage
Vref2Connection, metal-oxide-semiconductor M2BGrid with control voltage VC connect, metal-oxide-semiconductor M2CGrid and bias voltage VSConnection;
7th branch of the 4th differential pair of gain adjusting circuit generation circuit is metal-oxide-semiconductor M3ASource electrode and resistance R3AConnection
Branch, the 8th branch of the 4th differential pair are metal-oxide-semiconductor M3BSource electrode and resistance R3BThe branch of connection, metal-oxide-semiconductor M3CDrain electrode and electricity
Hinder R3AAnd R3BCommon end be connected to tail current source, metal-oxide-semiconductor M3CSource electrode ground connection, metal-oxide-semiconductor M3BGrid and reference voltage
Vref3Connection, metal-oxide-semiconductor M3AGrid with control voltage VC connect, metal-oxide-semiconductor M3CGrid and bias voltage VSConnection;
Transistor M4With M5Grid and drain electrode be shorted and connect to power supply as active load, the source electrode and M of M40A、M1A、
M2A、M3ADrain electrode connection, M5Source electrode and M0B、M1B、M2B、M3BDrain electrode connection;Metal-oxide-semiconductor M6Grid meet bias voltage VB, source
Pole ground connection, drain electrode and resistance RLConnection, M4Source electrode and resistance RLConnection, M4Source voltage as the gain adjustment exported
Voltage VM;
Metal-oxide-semiconductor M0C、M1C、M2C、M3CThe drain current to work in saturation state is equal.
6. the quadrant switching circuit across quadrant automatic shifting phase is realized in the simulation vector addition phase shifter in claim 4, it is special
Sign is: reference voltage Vref0< Vref1< Vref2< Vref3, and meet following relationship
Vref1-Vref0=Vref2-Vref1=Vref3-Vref2=2 Δ VinM
WhereinISSMFor M0C、M1C、M2CWith M3CThe drain current to work in saturation state.
7. the quadrant switching circuit across quadrant automatic shifting phase is realized in the simulation vector addition phase shifter in claim 4, it is special
Sign is: the first branch of the first window comparator of polarity selection signal generation circuit has a comparator C1 and diode D1, and first
The second branch of window comparator has comparator C2 and diode D2, the inverting input terminal and reference voltage U of comparator C1DMEven
It connects, the non-inverting input terminal and reference voltage U of comparator C2BMConnection, the non-inverting input terminal of comparator C1 and the inverting input terminal of C2
It connects and is connected to control voltage VC;The output end of comparator C1 is connect with the anode of diode D1, the output of comparator C2
End is connect with the anode of diode D2, and the output circuit of first window comparator has a resistance RC1 and resistance RC2, diode D5 and
Phase inverter I1, one end of resistance RC1 are connected to the cathode of diode D1 Yu diode D2, and the other end of resistance RC1 is connected to
Polarity selects output signal SI, resistance RC2 is connected in parallel with diode D5, and the plus earth of diode D5, cathode is connected to pole
Property selection output signal SI;The input terminal and polarity selection signal S of phase inverter I1IConnection, output end and polarity selection signal
Connection;
The third branch of second window comparator of polarity selection signal generation circuit has comparator C3 and diode D3, the second window
4th branch of mouth comparator has comparator C4 and diode D4, the inverting input terminal and reference voltage U of comparator C3EMConnection,
The non-inverting input terminal and reference voltage U of comparator C4CMConnection, the non-inverting input terminal of comparator C3 and the inverting input terminal of C4 connect
And it is connected to control voltage VC;The anode of the output end of comparator C3 and diode D3 connects, the output end of comparator C4 and
The anode connection of diode D4, the output circuit of the second window comparator have resistance RC3 and resistance RC4, diode D6 and reverse phase
Device I2, one end of resistance RC3 are connected to the cathode of diode D3 Yu diode D4, and the other end of resistance RC3 is connected to polarity
Select output signal SQ, resistance RC4 is connected in parallel with diode D6, the plus earth of diode D6, and cathode is connected to polarity choosing
Select output signal SQ;The input terminal and polarity selection signal S of phase inverter I2QConnection, output end and polarity selection signalConnection.
8. the generation circuit of the polarity selection signal for vector addition phase-shift circuit in claim 4, it is characterized in that: with reference to
Voltage UAM、UBM、UCM、UDM、UEMMeet following relationship
UAM=Vref0-ΔVinM
UBM=Vref1-ΔVinM
UCM=Vref2-ΔVinM
UDM=Vref3-ΔVinM
UEM=Vref3+ΔVinM。
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