CN110047420A - Gate driving circuit - Google Patents
Gate driving circuit Download PDFInfo
- Publication number
- CN110047420A CN110047420A CN201910359642.3A CN201910359642A CN110047420A CN 110047420 A CN110047420 A CN 110047420A CN 201910359642 A CN201910359642 A CN 201910359642A CN 110047420 A CN110047420 A CN 110047420A
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- grid
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- signal
- output end
- drive element
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- 238000001514 detection method Methods 0.000 claims abstract description 46
- 239000013078 crystal Substances 0.000 claims description 3
- 101100069049 Caenorhabditis elegans goa-1 gene Proteins 0.000 description 13
- 230000002159 abnormal effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
Abstract
A kind of gate driving circuit includes: detection compensation circuit and cascade drive element of the grid.Detection compensation circuit includes switching circuit and control chip, and control chip includes the first detection input, the second detection input and thermal compensation signal output end.Drive element of the grid includes control terminal, clock signal input terminal and driving signal output end, control terminal is connect by corresponding switching circuit with the first detection input, clock signal input terminal is connect by corresponding switching circuit with the second detection input, and driving signal output end is connect by corresponding switching circuit with thermal compensation signal output end.For the drive element of the grid of the same level, after the first detection input and the second detection input that control chip are respectively received grid control signal and clock signal, but when the second detection input for controlling chip does not receive corresponding gate drive signal, the thermal compensation signal output end for controlling chip exports the drive element of the grid of thermal compensation signal to next stage.
Description
Technical field
The present invention relates to field of display technology more particularly to a kind of gate driving circuits for display panel.
Background technique
In existing display panel structure, (the gate driver on of gate driving in array substrate can use
Array, GOA) gate driving circuit is produced on the non-display area of display panel by technology, to substitute traditional external driving core
Piece can not only promote production capacity, and reduce product cost, and can reduce the border width of display panel, realize narrow frame
Design for aesthetic.
In traditional grid electrode drive circuit structure, the gate drive signal of the drive element of the grid output of the same level is made simultaneously
For the reset signal (restoration signal) of the drive element of the grid of upper level, and the gate driving list as next stage
The trigger signal of member.Therefore, if open circuit occurs in any one drive element of the grid, the gate driving of upper level can be influenced simultaneously
The gate drive signal of the drive element of the grid output of the gate drive signal and next stage of unit output, causes display abnormal.
Therefore, it is necessary to a kind of gate driving circuit be provided, to solve the above problems.
Summary of the invention
The purpose of the present invention is to provide a kind of gate driving circuits, detection immediately can be carried out to gate drive signal simultaneously
Compensation, so that it is guaranteed that display panel is normally shown.
To achieve the above object, the present invention provides a kind of gate driving circuit characterized by comprising detection compensation electricity
Road, including multiple switch circuit and control chip, the control chip including the first detection input, the second detection input with
And thermal compensation signal output end；And multiple cascade drive element of the grid, wherein the drive element of the grid includes for exporting
The control terminal of grid control signal, the clock signal input terminal for receiving clock signal and for according to the grid control
Signal and the clock signal export the driving signal output end of gate drive signal, and the control terminal by switching accordingly
Circuit is connect with first detection input, and the clock signal input terminal passes through corresponding switching circuit and second inspection
Input terminal connection is surveyed, the driving signal output end is connect by corresponding switching circuit with the thermal compensation signal output end；Its
In, for the drive element of the grid of the same level, when the first detection input and the second detection input difference of the control chip
After receiving the grid control signal and the clock signal, but the second detection input of the control chip does not receive
When corresponding gate drive signal, the grid that the thermal compensation signal output end of the control chip exports thermal compensation signal to next stage is driven
Moving cell.
In some embodiments, the gate driving circuit further includes a plurality of clock cable, wherein the gate driving
The clock signal input terminal of unit is connect by corresponding clock cable with the control chip.
In some embodiments, the drive element of the grid further includes inputting for receiving the trigger signal of trigger signal
End.
In some embodiments, the trigger signal of the drive element of the grid of the driving signal output end and the next stage
Input terminal connection.
In some embodiments, for the drive element of the grid of the same level, when the first detection input of the control chip
After being respectively received the grid control signal and the clock signal with the second detection input, but the of the control chip
When two detection inputs do not receive corresponding gate drive signal, the trigger signal of the drive element of the grid of the next stage is defeated
Enter end and receives the thermal compensation signal.
In some embodiments, the switching circuit includes the first transistor, second transistor and third transistor, wherein
The source electrode and drain electrode of the first transistor is connect with first detection input and the control terminal respectively, and described second is brilliant
The source electrode and drain electrode of body pipe is connect with second detection input and the clock signal input terminal respectively, the third crystal
The source electrode and drain electrode of pipe is connect with the thermal compensation signal output end and the driving signal output end respectively, the first transistor
Grid, the grid of the second transistor and the grid of the third transistor be connected to the trigger signal input terminal.
In some embodiments, the drive element of the grid includes the 4th transistor and the 5th transistor, and the described 4th is brilliant
The source electrode and drain electrode of body pipe is connect with the clock signal input terminal and the driving signal output end respectively, the 5th crystal
The source electrode and grid of pipe are connected to the trigger signal input terminal, the grid and the 5th transistor of the 4th transistor
Drain electrode be connected to the control terminal.
In some embodiments, the drain electrode of the third transistor and the drain electrode of the 4th transistor are connected to described
Driving signal output end.
In some embodiments, the drain electrode of the second transistor and the source electrode of the 4th transistor are connected to described
Clock signal input terminal.
In some embodiments, the drain electrode of the first transistor, the grid of the 4th transistor and described 5th brilliant
The drain electrode of body pipe is connected to the control terminal.
For feature and technology contents of the invention can be clearer and more comprehensible, please refer to below in connection with it is of the invention specifically
Bright and attached drawing, however attached drawing is only provided with reference to using, and is not intended to limit the present invention.
Detailed description of the invention
Fig. 1 is the functional block diagram according to the gate driving circuit of the embodiment of the present invention；
Fig. 2 is the electrical block diagram according to embodiment illustrated in fig. 1.
Specific embodiment
In order to keep the purpose of the present invention, technological means and its effect more explicit, below with reference to attached drawing to this hair
It is bright further to illustrate.It should be appreciated that embodiment described herein is only a part of the embodiment of the present invention, rather than it is complete
The embodiment in portion, is not intended to limit the present invention.
Referring to FIG. 1, its functional block diagram for showing gate driving circuit according to an embodiment of the present invention.Gate driving circuit
1 includes detection compensation circuit and multiple cascade drive element of the grid GOA1, GOA3.Detection compensation circuit includes multiple switch electricity
Road 10 and control chip 11.Controlling chip 11 includes the first detection input 111, the second detection input 112 and compensation letter
Number output end 113.
Drive element of the grid GOA1, GOA3 include for exporting the control terminal 120 of grid control signal GC1, GC3, being used for
Receive the clock signal input terminal 121 of clock signal CK1, CK3 and for believing according to grid control signal GC1, GC3 and clock
Number CK1, CK3 export the driving signal output end 122 of gate drive signal Out1, Out3.As shown in Figure 1, gate driving list
The control terminal 120 of first GOA1, GOA3 are connected by the first detection input 111 of corresponding switching circuit 10 and control chip 11
It connects, the clock signal input terminal 121 of drive element of the grid GOA1, GOA3 pass through corresponding switching circuit 10 and control chip 11
The connection of second detection input 112, the driving signal output end 122 of drive element of the grid GOA1, GOA3 by switching accordingly
Circuit 10 is connect with the thermal compensation signal output end 113 of control chip 11.In the present embodiment, gate driving circuit 1 further includes more
Clock cable 13.The clock signal input terminal 121 of drive element of the grid GOA1, GOA3 pass through corresponding clock cable 13
It is connect with control chip 11.Furthermore drive element of the grid GOA1, GOA3 further include defeated for receiving the trigger signal of trigger signal
Enter end 123.The triggering of the drive element of the grid GOA3 of the driving signal output end 122 and next stage of drive element of the grid GOA1 is believed
Number input terminal 123 connects.For example, the trigger signal input terminal 123 of drive element of the grid GOA1 is used to receive external touching
The trigger signal that the trigger signal input terminal 123 of signalling ST, drive element of the grid GOA3 receive is drive element of the grid
The gate drive signal Out1 of GOA1.
For example, using drive element of the grid GOA1 as the drive element of the grid of the same level, when the first of control chip 11
After detection input 111 and the second detection input 112 are respectively received grid control signal GC1 and clock signal CK1, but control
When second detection input 112 of coremaking piece 11 does not receive corresponding gate drive signal Out1, the compensation of chip 11 is controlled
Signal output end 113 will export the drive element of the grid GOA3 of thermal compensation signal Out1 ' to next stage.That is, next stage
The trigger signal input terminal 123 of drive element of the grid GOA3 can receive thermal compensation signal Out1 '.Therefore, grid of the invention drives
Dynamic circuit 1 can detect whether gate drive signal Out1, Out3 of drive element of the grid GOA1, GOA3 are abnormal immediately, and
Abnormal gate drive signal is compensated, so that it is guaranteed that display panel is normally shown.
Referring to FIG. 2, its electrical block diagram for showing embodiment according to Fig. 1.In the present embodiment, switch electricity
Road 10 includes the first transistor Q1, second transistor Q2 and third transistor Q3.The source electrode and drain electrode of the first transistor Q1 is distinguished
It is connect with the first detection input 111 and control terminal 120, the source electrode and drain electrode of second transistor Q2 is inputted with the second detection respectively
End 112 and clock signal input terminal 121 connect, the source electrode and drain electrode of third transistor Q3 respectively with thermal compensation signal output end 113
It connects with driving signal output end 122, the grid of the first transistor Q1, the grid of second transistor Q2 and third transistor Q3
Grid is connected to trigger signal input terminal 123.
Drive element of the grid GOA1, GOA3 include the 4th transistor Q4 and the 5th transistor Q5.In the present embodiment, the 4th
The source electrode and drain electrode of transistor Q4 is connect with clock signal input terminal 121 and driving signal output end 122 respectively, the 5th transistor
The source electrode and grid of Q5 is connected to trigger signal input terminal 123, the leakage of the grid and the 5th transistor Q5 of the 4th transistor Q4
Pole is connected to control terminal 120.
Furthermore as shown in Fig. 2, the drain electrode of third transistor Q3 and the drain electrode of the 4th transistor Q4 are connected to driving signal
Output end 122.The drain electrode of second transistor Q2 and the source electrode of the 4th transistor Q4 are connected to clock signal input terminal 121.The
The drain electrode of one transistor Q1, the drain electrode of the grid and the 5th transistor Q5 of the 4th transistor Q4 are connected to control terminal 120.
In conclusion gate driving circuit provided by the invention, when the gate drive signal appearance of drive element of the grid is different
Chang Shi detects abnormal gate drive signal by detection compensation circuit immediately and compensates to it, so that it is guaranteed that display
Panel is normally shown.
It should be understood that the application of the present invention is not limited to the above for those of ordinary skills can
With improvement or transformation based on the above description, all these modifications and variations all should belong to the guarantor of appended claims of the present invention
Protect range.
Claims (10)
1. a kind of gate driving circuit characterized by comprising
Compensation circuit is detected, including multiple switch circuit and control chip, the control chip include the first detection input, the
Two detection inputs and thermal compensation signal output end；And
Multiple cascade drive element of the grid, wherein the drive element of the grid includes the control for exporting grid control signal
End, the clock signal input terminal for receiving clock signal and for according to the grid control signal and the clock signal
Export the driving signal output end of gate drive signal, the control terminal passes through corresponding switching circuit and first detection
Input terminal connection, the clock signal input terminal is connect by corresponding switching circuit with second detection input, described
Driving signal output end is connect by corresponding switching circuit with the thermal compensation signal output end；Wherein,
For the drive element of the grid of the same level, when the first detection input and the second detection input difference of the control chip
After receiving the grid control signal and the clock signal, but the second detection input of the control chip does not receive
When corresponding gate drive signal, the grid that the thermal compensation signal output end of the control chip exports thermal compensation signal to next stage is driven
Moving cell.
2. gate driving circuit as described in claim 1, which is characterized in that further include a plurality of clock cable, wherein described
The clock signal input terminal of drive element of the grid is connect by corresponding clock cable with the control chip.
3. gate driving circuit as described in claim 1, which is characterized in that the drive element of the grid further includes for receiving
The trigger signal input terminal of trigger signal.
4. gate driving circuit as claimed in claim 3, which is characterized in that the driving signal output end and the next stage
Drive element of the grid trigger signal input terminal connection.
5. gate driving circuit as claimed in claim 3, which is characterized in that for the drive element of the grid of the same level, when described
The first detection input and the second detection input for controlling chip are respectively received the grid control signal and the clock
After signal, but the second detection input of the control chip is not when receiving corresponding gate drive signal, the next stage
The trigger signal input terminal of drive element of the grid receive the thermal compensation signal.
6. gate driving circuit as claimed in claim 3, which is characterized in that the switching circuit includes the first transistor,
Two-transistor and third transistor, wherein the source electrode and drain electrode of the first transistor respectively with first detection input and
The control terminal connection, the source electrode and drain electrode of the second transistor are believed with second detection input and the clock respectively
The connection of number input terminal, the source electrode and drain electrode of the third transistor respectively with the thermal compensation signal output end and the driving signal
Output end connection, the grid phase of the grid of the first transistor, the grid of the second transistor and the third transistor
It is connected to the trigger signal input terminal.
7. gate driving circuit as claimed in claim 6, which is characterized in that the drive element of the grid includes the 4th transistor
With the 5th transistor, the source electrode and drain electrode of the 4th transistor respectively with the clock signal input terminal and the driving signal
Output end connection, the source electrode and grid of the 5th transistor are connected to the trigger signal input terminal, the 4th crystal
The drain electrode of the grid of pipe and the 5th transistor is connected to the control terminal.
8. gate driving circuit as claimed in claim 7, which is characterized in that the drain electrode of the third transistor and the described 4th
The drain electrode of transistor is connected to the driving signal output end.
9. gate driving circuit as claimed in claim 7, which is characterized in that the drain electrode of the second transistor and the described 4th
The source electrode of transistor is connected to the clock signal input terminal.
10. gate driving circuit as claimed in claim 7, which is characterized in that the drain electrode of the first transistor, the described 4th
The drain electrode of the grid of transistor and the 5th transistor is connected to the control terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910359642.3A CN110047420B (en) | 2019-04-30 | 2019-04-30 | Gate drive circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910359642.3A CN110047420B (en) | 2019-04-30 | 2019-04-30 | Gate drive circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110047420A true CN110047420A (en) | 2019-07-23 |
| CN110047420B CN110047420B (en) | 2022-04-01 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910359642.3A Active CN110047420B (en) | 2019-04-30 | 2019-04-30 | Gate drive circuit |
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| Country | Link |
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| CN (1) | CN110047420B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060082128A (en) * | 2005-01-11 | 2006-07-14 | 삼성전자주식회사 | Substrate for display panel |
| US20110102388A1 (en) * | 2009-11-02 | 2011-05-05 | Chunghwa Picture Tubes, Ltd. | Display and gate driver circuit thereof |
| US20160180817A1 (en) * | 2014-12-18 | 2016-06-23 | Samsung Display Co., Ltd. | Gate driver and display apparatus having the same |
| CN106448522A (en) * | 2016-10-20 | 2017-02-22 | 京东方科技集团股份有限公司 | Detection circuit, gate drive circuit and display panel |
| CN108831360A (en) * | 2018-06-22 | 2018-11-16 | 京东方科技集团股份有限公司 | Gate drive signal detection circuit, method and display device |
| CN109147690A (en) * | 2018-08-24 | 2019-01-04 | 惠科股份有限公司 | Control method and device, controller |
-
2019
- 2019-04-30 CN CN201910359642.3A patent/CN110047420B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20060082128A (en) * | 2005-01-11 | 2006-07-14 | 삼성전자주식회사 | Substrate for display panel |
| US20110102388A1 (en) * | 2009-11-02 | 2011-05-05 | Chunghwa Picture Tubes, Ltd. | Display and gate driver circuit thereof |
| US20160180817A1 (en) * | 2014-12-18 | 2016-06-23 | Samsung Display Co., Ltd. | Gate driver and display apparatus having the same |
| CN106448522A (en) * | 2016-10-20 | 2017-02-22 | 京东方科技集团股份有限公司 | Detection circuit, gate drive circuit and display panel |
| CN108831360A (en) * | 2018-06-22 | 2018-11-16 | 京东方科技集团股份有限公司 | Gate drive signal detection circuit, method and display device |
| CN109147690A (en) * | 2018-08-24 | 2019-01-04 | 惠科股份有限公司 | Control method and device, controller |
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| Publication number | Publication date |
|---|---|
| CN110047420B (en) | 2022-04-01 |
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| PB01 | Publication | ||
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| CB02 | Change of applicant information |
Address after: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Applicant after: TCL Huaxing Photoelectric Technology Co.,Ltd. Address before: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Applicant before: Shenzhen China Star Optoelectronics Technology Co.,Ltd. |
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| CB02 | Change of applicant information | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of invention: gate drive circuit Effective date of registration: 20231113 Granted publication date: 20220401 Pledgee: Industrial and Commercial Bank of China Limited Shenzhen Guangming Sub branch Pledgor: TCL Huaxing Photoelectric Technology Co.,Ltd. Registration number: Y2023980065368 |
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| PE01 | Entry into force of the registration of the contract for pledge of patent right |