CN110032107B

CN110032107B - Logic system and control method for controlling on-off of 4 paths of signals by using 3 relays

Info

Publication number: CN110032107B
Application number: CN201910302013.7A
Authority: CN
Inventors: 罗向东; 刘聪
Original assignee: Nantong University
Current assignee: Nantong University
Priority date: 2019-04-16
Filing date: 2019-04-16
Publication date: 2020-05-08
Anticipated expiration: 2039-04-16
Also published as: CN110032107A

Abstract

The invention discloses a logic system for controlling the on-off of 4 paths of signals by 3 relays, which is characterized in that: the device comprises an MCU control unit, a relay logic control circuit, a USB power interface circuit, a USB-to-TTL level conversion circuit and a signal input/output interface unit. And the MCU control unit is used for carrying out access control on the relay logic control circuit. The USB-to-TTL level conversion circuit is used for converting the USB level received by the USB power interface circuit into the TTL level which can be identified by the MCU control unit. The signal input/output interface unit is used for connecting an antenna, a filter, an AD converter and other instrument equipment to realize the input and output of analog signals. The relay logic control circuit comprises 3 relays, signal channels are expanded among relay contacts through cascade connection, and one of the four paths of signals of the signal input and output interface unit is controlled.

Description

Logic system and control method for controlling on-off of 4 paths of signals by using 3 relays

Technical Field

The invention relates to the field of relay control systems, in particular to a logic system and a control method for controlling the on-off of 4 paths of signals by using 3 relays.

Background

Many input device analog signal often need be gathered in the industry, but there is very big drawback in gathering multichannel analog signal through an AD converter, and plug interface joint that need not stop switches, and is obviously more troublesome, also can cause wearing and tearing to precision instruments or AD converter's interface in addition, reduces its life.

The single chip microcomputer is also called a single chip microcontroller, and is not a chip for completing a certain logic function, but a computer system is integrated on one chip. At present, the single chip microcomputer is widely applied to various control fields, such as intelligent instruments, medical equipment, robots and the like. Relays have a switch-like function, and are widely used in various electronic device control circuits for isolating control signals from loads. Some special outputs require that the outputs can be output only when the control signals are sent out according to a preset logic sequence, and generally, only one relay can control the gating of one signal, and the four relays are generally required to control the gating of four signals. At present, a signal control circuit is generally realized by a chip digital circuit, the circuit is complex, and the technical requirement on designers is high.

Disclosure of Invention

The invention aims to provide a logic system and a control method which have simple circuits and convenient realization and can control 3 relays to gate 4 signals based on a single chip microcomputer.

The basic technical scheme for realizing the purpose of the invention is as follows: a logic system for controlling the on-off of 4 paths of signals by 3 relays is structurally characterized in that: the device comprises an MCU control unit, a relay logic control circuit, a USB power interface circuit, a USB-to-TTL level conversion circuit and a signal input/output interface unit. And the MCU control unit is used for carrying out access control on the relay logic control circuit. The USB-to-TTL level conversion circuit is used for converting the USB level received by the USB power interface circuit into the TTL level which can be identified by the MCU control unit. The signal input/output interface unit is used for connecting an antenna, a filter, an AD converter and other instrument equipment to realize the input and output of analog signals. The relay logic control circuit comprises 3 relays, signal channels are expanded among relay contacts through cascade connection, and one of the four paths of signals of the signal input and output interface unit is controlled.

The technical scheme based on the basic technical scheme is as follows: the MCU control unit is provided with a first crystal oscillator circuit and a reset circuit. The first crystal oscillator circuit is used for providing a clock signal for the MCU control unit. The reset circuit is used for resetting a program counter of the MCU control unit and enabling the MCU control unit to work stably.

The technical scheme based on the corresponding technical scheme is as follows: the USB power interface circuit comprises a USB female socket M1, a tenth capacitor C10, an eleventh polar capacitor C11 and a ninth light emitting diode D9. The USB female socket M1 adopts a Micro USB female socket. An eleventh polar capacitor C11 of the power interface circuit adopts an aluminum electrolytic capacitor, has the functions of filtering and energy storage, and can stably supply power to the PC. The ninth led D9 is used as a power-on indicator light of the power interface circuit to prompt the user that the system is powered on.

The technical scheme based on the corresponding technical scheme is as follows: the USB-to-TTL level conversion circuit comprises a level conversion chip G1 which is a conversion chip of a USB bus and realizes the conversion of USB to a serial port, the conversion of USB to IrDA infrared or the conversion of USB to a printing port. The level conversion chip G1 is used to convert the USB level received by the USB power interface circuit into a TTL level that can be recognized by the MCU control unit.

The technical scheme based on the corresponding technical scheme is as follows: the USB-to-TTL level conversion circuit is provided with a second oscillating circuit which is used for providing a clock signal for the level conversion chip G1. The level conversion chip G1 is a chip with a model CH 340G. The UD + pin of the CH340G is connected with the D + pin of MICROUSB, and the UD-pin is connected with the D-pin of MICROUSB. The transmission pin TXD and the reception pin RXD of the CH340G chip are connected to the reception pin RXD and the transmission pin TXD, respectively, of the MCU control unit. The receiving pin RXD of the MCU control unit is connected with the TXD pin of the CH340G chip through a backward diode D8, and the backward diode D8 adopts 1N4148, so that current is prevented from flowing into a rear-stage circuit through the pin and charging a capacitor of the rear stage, voltage with certain amplitude of the rear stage is prevented, and cold starting of a downloading program of the MCU control unit is influenced.

The technical scheme based on the corresponding technical scheme is as follows: the 3 relays of the relay logic control circuit are divided into a first relay U1, a second relay U2 and a third relay U3. 3 signal relay is all adopted to individual relay, signal relay control voltage is 5V, and the contact form is: DPDT. The signal relay has 8 pins, comprises positive and negative pins of a relay coil, a pair of normally open contacts, a pair of normally closed contacts and a pair of common end contacts, and has a very good isolation effect with signals.

After a coil of the first relay U1 is connected in series with the first PNP type triode Q1, two ends of the coil of the relay are connected in parallel with a first freewheeling diode D1, one end of the first PNP type triode Q1 is connected with a power supply +5V, a grid electrode of the first PNP type triode Q1 is connected with a relay control IO port P23 of the MCU control unit, meanwhile, the first PNP type triode Q1 is connected in series with a second resistor R2, and the first resistor R1 serves as a pull-up resistor of the IO port.

After a coil of the second relay U2 is connected in series with the second PNP type triode Q2, two ends of the coil of the relay are connected in parallel with a second freewheeling diode D2, one end of the second PNP type triode Q2 is connected with a power supply +5V, a grid electrode of the second PNP type triode Q2 is connected with a relay control IO port P22 of the MCU control unit, meanwhile, the second PNP type triode Q2 is connected in series with a fourth resistor R4, and the third resistor R3 is used as a pull-up resistor of the IO port.

After a coil of the third relay U3 is connected in series with the third PNP type triode Q3, two ends of the relay coil are connected in parallel with a third freewheeling diode D3, one end of the third PNP type triode Q3 is connected with a power supply +5V, a grid electrode of the third PNP type triode Q3 is connected with a relay control IO port P21 of the MCU control unit, meanwhile, the third PNP type triode Q3 is connected in series with a sixth resistor R6, and the fifth resistor R5 is used as a pull-up resistor of the IO port.

The first path of analog signal channel is input from the normally closed contact of the first relay U1, is connected with the common end contact of the first relay U1, passes through the normally closed contact of the third relay U3, and outputs signals from the common end contact of the third relay U3, and is a P23 port of the MCU control unit sends a high level to the first relay U1, and simultaneously a P21 port sends a high level to the third relay U3.

The second path of analog signal channel is input from the normally open contact of the first relay U1, is connected with the common end contact of the first relay U1, passes through the normally closed contact of the third relay U3, and outputs signals from the common end contact of the third relay U3, and the conduction condition is that the port P23 of the MCU control unit sends a low level to the first relay U1, and the port P21 sends a high level to the third relay.

The third analog signal channel is input from the normally closed contact of the second relay U2, is connected with the common end contact of the second relay U2, passes through the normally open contact of the third relay U3, and outputs signals from the common end contact of the third relay U3, and the conduction condition is that the port P22 of the MCU control unit sends a high level to the second relay U2, and the port P21 sends a low level to the third relay U3.

The fourth analog signal channel is input from the normally open contact of the second relay, is connected with the common end contact of the second relay, and outputs a signal from the normally open contact of the third relay U3 and the common end contact of the third relay U3, and the conduction condition is that the port P22 of the MCU control unit sends a low level to the first relay U1, and the port P21 sends a low level to the third relay U3.

The technical scheme based on the corresponding technical scheme is as follows: also includes a signal strobe indicating circuit. The signal gating indicating circuit consists of four light emitting diodes and a third load resistor. The four light emitting diodes are respectively a fourth light emitting diode D4, a fifth light emitting diode D5, a sixth light emitting diode D6 and a seventh light emitting diode D7. The third load resistor includes an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, and a fourteenth resistor R14. The fourth light emitting diode D4 and the eleventh resistor R11 are connected in series between the +5V power supply and the P24 pin of the MCU control unit. The fifth light emitting diode D5 and the twelfth resistor R12 are connected in series between the +5V power supply and the P25 pin of the MCU control unit. The sixth light emitting diode D6 and the thirteenth resistor R13 are connected in series between the +5V power supply and the P26 pin of the MCU control unit. The seventh light emitting diode D7 and the fourteenth resistor R14 are connected in series between the +5V power supply and the P27 pin of the MCU control unit.

The control method of the logic system for controlling the on-off of the 4 paths of signals by the 3 relays comprises the following steps:

firstly, C language programming of a singlechip. When a signal channel is selected, a case selection statement is employed.

Second, the data sending unit 0x01 represents the IN1 signal channel, the IO pin P23 of the MCU control unit outputs high level to turn off the first PNP triode Q1, and at this time, there is no voltage across the coil of the first relay U1, so the first relay U1 does not work, its normally closed contact is closed with the common contact, the IN1 branch is turned on, the fourth light emitting diode D4 is assigned as 0, and the lighting represents the IN1 path gating. Meanwhile, an IO pin P21 of the MCU control unit outputs high level to cut off the third PNP triode Q3, and at the moment, no voltage exists at two ends of a coil of the third relay U3, so that the third relay U3 does not work, a normally closed contact of the third relay U3 is closed with a common end contact, an OUT branch is conducted, and the first analog signal channel is conducted.

Third, the data sending unit 0x02 represents an IN2 signal channel, an IO pin P23 of the MCU control unit outputs a low level to turn on a first PNP triode Q1, and at this time, the voltage across the coil of the first relay U1 is 5V, so the first relay U1 starts to operate, its normally closed contact is opened, the normally open contact is closed with the common end contact, the IN2 branch is turned on, the fifth light emitting diode D5 is assigned a value of 0, and the lighting represents the IN2 path gating. Meanwhile, an IO pin P21 of the MCU control unit outputs high level to cut off the third PNP triode Q3, and at the moment, no voltage exists at two ends of a coil of the third relay U3, so that the third relay U3 does not work, a normally closed contact of the third relay U3 is closed with a common end contact, an OUT branch circuit is conducted, and a second path of signal channel is conducted.

And fourthly, the data sending unit 0x03 represents an IN3 signal channel, an IO pin P22 of the MCU control unit outputs high level to cut off the second PNP triode Q2, no voltage exists at two ends of a coil of the second relay U2 at the moment, so that the second relay U2 does not work, a normally closed contact of the second relay U2 is closed with a common end contact, an IN3 branch is conducted, a sixth light emitting diode D6 is assigned as 0, and the light is on to represent IN3 channel gating. Meanwhile, an IO pin P21 of the MCU control unit outputs low level to enable the third PNP triode Q3 to be conducted, and the voltage at two ends of a coil of the third relay U3 is 5V at the moment, so that the third relay U3 starts to work, the normally closed contact is disconnected, the normally open contact and the common end contact are closed, the OUT branch is conducted, and the third signal channel is conducted.

And fifthly, the data sending unit 0x04 represents an IN4 signal channel, an IO pin P22 of the MCU control unit outputs low level to enable the second PNP triode Q2 to be conducted, at the moment, the voltage at two ends of a coil of the second relay U2 is 5V, so that the second relay U2 starts to work, a normally closed contact of the second relay Q2 is disconnected, the normally open contact and a common end contact are closed, an IN4 branch is conducted, the seventh light emitting diode D7 is assigned to be 0, and the light is on to represent the IN4 channel gating. Meanwhile, an IO pin P21 of the MCU control unit outputs low level to enable the third PNP triode Q3 to be conducted, the voltage at two ends of a coil of the third relay U3 is 5V, so that the third relay U3 starts to work, the normally closed contact is disconnected, the normally open contact is closed with the common end contact, the OUT branch is conducted, and the fourth signal channel is conducted.

The invention has the following beneficial effects: (1) the circuit is simple and convenient to implement, the acquisition and control of four paths of signals are realized by adopting three signal relays based on the single chip microcomputer, the communication with an upper computer is conveniently completed, the signal input of a plurality of instruments and equipment is controlled, the accurate control of the input signals of the equipment is realized, namely, one path of signals is selected to be controlled according to the acquisition of analog signals of the appointed instruments and the four paths of signals, and the control efficiency and the accuracy among the equipment are greatly improved.

(2) The invention can be connected to a computer through a USB data line, and a user sends data through the upper computer to carry out remote control and accurate control on the input and output of equipment signals.

(3) The invention realizes the gating control of four paths of analog signals by using three signal relays, thereby greatly saving the cost.

(4) The four-path signal is selected by the invention, the plug interface connector is not required to be switched, the interface is protected from being damaged easily, and the service durability of equipment is greatly improved.

(5) The relay in the invention adopts a signal relay with the model number of G6J-2P-Y-DC5V, and the isolation effect with signals is very good. The control voltage is 5V, and the contact form is as follows: DPDT. The signal relay has 8 pins, including the positive negative pole pin of relay coil, a pair of normally open contact, a pair of normally closed contact and a pair of public end contact.

(6) The control method of the logic system for controlling the 3 relays to gate the 4 paths of signals based on the single chip microcomputer realizes the expansion of signal channels through the cascade connection between the relay contacts, and similarly, the logic system for controlling the on-off of the 4N paths of signals by using 3N relays can be realized, wherein N is a natural number, and the application prospect is wide.

Drawings

Fig. 1 is a block diagram of a logic system structure of the present invention, in which 3 signal relays control the on/off of 4 signals.

Fig. 2 is a circuit schematic of the present invention.

Fig. 3 is a schematic diagram of an amplifying circuit of the MCU control unit of fig. 2.

Fig. 4 is an amplifying circuit schematic diagram of the relay logic control circuit of fig. 2.

Fig. 5 is a logic method diagram of 3 relays controlling 4 signals according to the present invention.

Fig. 6 is a schematic diagram of an amplifying circuit of the USB power interface circuit in fig. 2.

Fig. 7 is a schematic diagram of an amplifying circuit of the USB to TTL level shifting circuit in fig. 2.

Fig. 8 is a truth table of a logic system for controlling the on-off of 4 signals by 3 signal relays according to the invention (0 and 1 represent high and low levels, and X represents nothing to do with the level of the port P2 of the single chip microcomputer).

FIG. 9 is a verification chart of the results of the invention measured on the gated input/output port with a multimeter ohmic contact under the condition that the four signals are respectively gated. (

contacts

2 and 7 are normally closed contact pairs,

contacts

4 and 5 are normally open contact pairs,/indicating the relay contacts operating state is arbitrary).

The reference numbers in the drawings are:

the MCU control unit 1 is provided with a MCU control unit,

the logic control circuit 2 of the relay is provided with a relay logic control circuit,

a USB power interface circuit 3 for supplying power to the USB device,

a USB to TTL level conversion circuit 4,

a signal is input to and output from the interface unit 5,

the signal-gating indication circuit 6 is arranged,

reset circuit 10, reset button 100.

Detailed Description

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present invention, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

(example 1)

Referring to fig. 1 to 7, the logic system for controlling the on/off of 4 paths of signals by 3 relays of the invention comprises an MCU control unit 1, a relay logic control circuit 2, a USB power interface circuit 3, a USB to TTL level conversion circuit 4, a signal input/output interface unit 5 and a signal gating indication circuit 6.

The MCU control unit 1 adopts a low-power consumption and high-performance CMOS 8-bit microcontroller with the model of STC89C52 and an 8K byte system programmable Flash memory. The MCU control unit 1 is configured to perform access control on the relay logic control circuit 2. The MCU control unit 1 is provided with a first crystal oscillator circuit and a reset circuit 10.

The first crystal oscillator circuit comprises a second capacitor C2, a third capacitor C3 and a first crystal oscillator Y1. The first crystal oscillator circuit is used for providing a clock signal for the MCU control unit 1. A first crystal oscillator Y2 of 11.0592MHz is connected between pins X1 and X2 of the MCU control unit 1, a second load capacitor C2 is connected to a pin X1, a third load capacitor C3 is connected to a pin X2, and the first crystal oscillator Y1 provides a required clock signal.

The reset circuit 10 includes a reset button 100, a first load resistor, and a fourth polarity capacitor C4. The reset circuit 10 is used for resetting a program counter of the MCU control unit 1 to allow the MCU control unit 1 to stably operate. The first load resistor includes a seventh resistor R7 and an eighth resistor R8. The reset button 100 is electrically connected between the seventh resistor R7 and the positive terminal of the fourth polarity capacitor C4, and the seventh resistor R7 is electrically connected to the negative terminal of the fourth polarity capacitor C4. One end of the eighth resistor R8 is grounded, and the other end is electrically connected to the negative electrode of the fourth polarity capacitor C4. The positive electrode of the fourth polarity capacitor C4 is connected with a +5V power supply.

The USB power interface circuit 3 includes a USB female socket M1, a second load resistor, a tenth capacitor C10, an eleventh polarity capacitor C11, and a ninth light emitting diode D9.

The USB female socket M1 adopts a Micro USB female socket, and a Micro USB connector is smaller than standard USB and Mini USB connectors, so that the space is saved, the plugging life and the strength are 10000 times, and the blind plugging structural design is realized. The Micro USB standard supports the OTG function of the current USB, namely under the condition that a host computer is not available, data transmission can be directly realized between portable devices, the USB standard is compatible with USB1.1 and USB 2.0, data transmission and charging are provided, and the Micro USB standard is wide in universality and convenient to use. The Micro USB plug end has 5 functional pins, is respectively: VBUS (power supply plus 5V), D- (data line minus), D + (data line plus), ID (two interfaces, which are connected to a line and not connected to a ground line), and GND (signal ground), and the ID pin is not required in this embodiment. An eleventh polar capacitor C11 of the power interface circuit 3 adopts an aluminum electrolytic capacitor, has the functions of filtering and energy storage, and can stably supply power to the PC. The ninth led D9 is used as a power-on indicator light of the power interface circuit to prompt the user that the system is powered on. The tenth capacitor C10 is connected in parallel with the eleventh polarity capacitor C11. VBUS is electrically connected to the positive electrode of the eleventh polarity capacitor C11 and the tenth capacitor C10; the negative pole of the eleventh polarity capacitor C11 is grounded. The second load resistor includes a ninth resistor R9 and a tenth resistor R10. D-is electrically connected to one end of a tenth resistor R10. D + is electrically connected to one end of the ninth resistor R9.

The USB to TTL level shifter circuit 4 includes a level shifter chip G1, in this embodiment, the level shifter chip G1 is CH340G, and is a USB bus adapter chip to implement USB to serial port, USB to IrDA infrared or USB to print port. When the single chip microcomputer serial port (TTL level) wants to communicate with the computer serial port (USB level), the communication can be realized only if the level logics of the single chip microcomputer serial port and the computer serial port are the same. In this embodiment, the CH340G chip is configured to convert the USB level received by the USB female socket M1 into a TTL level that can be identified by the MCU control unit 1. The USB to TTL level shifter circuit 4 is provided with a second oscillator circuit for providing a clock signal to the CH340G chip, and the second oscillator circuit is provided at the XI and XO pins of the CH340G chip. The second crystal oscillator circuit comprises a fifth capacitor C5, a sixth capacitor C6 and a second crystal oscillator Y2.

The UD + pin of the CH340G is connected with the D + pin of MICROUSB, and the UD-pin is connected with the D-pin of MICROUSB. The transmission pin TXD and the reception pin RXD of the CH340G chip are connected to the reception pin RXD and the transmission pin TXD of the MCU control unit 1, respectively. The receiving pin RXD of the MCU control unit 1 is connected with the TXD pin of the CH340G chip through a backward diode D8, and the backward diode D8 adopts 1N4148, so that current is prevented from flowing into a rear-stage circuit through the pin and charging a capacitor of the rear stage, voltage with certain amplitude of the rear stage is prevented, and cold starting of a downloading program of the MCU control unit 1 is influenced.

The principle of the USB to TTL level conversion circuit 4 is as follows: the CH340G chip has built-in USB bus pull-up resistor and on-chip signal terminal, and UD + and UD-pins should be connected to the USB bus directly. CH340G has built-in power-on reset circuitry. During operation, CH340G needs to provide a 12MHz clock signal on pin XI. Typically, this clock signal is provided by connecting a 12MHz second crystal Y2 between pin XI and pin XO, a fifth load capacitor C5 at pin XI, and a sixth load capacitor C6 at pin XO, with the second crystal Y2 built in to provide the required clock signal. When an external oscillator is used to feed a clock signal into the XI pin, the XO pin is left floating. CH340G supports 5V operation, when 5V operation is used, a 5V voltage is provided to the VCC pin.

The signal gating indication circuit 6 is composed of four light emitting diodes and a third load resistor. The four light emitting diodes are respectively a fourth light emitting diode D4, a fifth light emitting diode D5, a sixth light emitting diode D6 and a seventh light emitting diode D7. The third load resistor includes an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, and a fourteenth resistor R14. The fourth light emitting diode D4 and the eleventh resistor R11 are connected in series between the +5V power supply and the pin P24 of the MCU control unit 1. The fifth light emitting diode D5 and the twelfth resistor R12 are connected in series between the +5V power supply and the pin P25 of the MCU control unit 1. The sixth light emitting diode D6 and the thirteenth resistor R13 are connected in series between the +5V power supply and the pin P26 of the MCU control unit 1. The seventh light emitting diode D7 and the fourteenth resistor R14 are connected in series between the +5V power supply and the P27 pin of the MCU control unit 1. The specific implementation mode is completed by downloading the program to the MCU control unit 1, and the user only needs to transmit the data unit on the upper computer to observe. After a certain path of signal is gated, the light emitting diode corresponding to the path of signal emits light to indicate a user that the path of signal is successfully gated: the IN1 signal channel is gated, the fourth LED D4 is on; the IN2 signal channel is gated, and the fifth LED D5 is on; the IN3 signal channel is gated, and the sixth LED D6 is on; the IN4 signal path is gated on and the seventh LED D7 is illuminated.

The signal input and output interface unit 5 is composed of 6 90-degree bent SMA connector female seats, and the 6 SMA connector female seats are sequentially divided into a first SMA connector female seat P1, a second SMA connector female seat P2, a third SMA connector female seat P3, a fourth SMA connector female seat P4, a fifth SMA connector female seat P5 and a sixth SMA connector female seat P6. The first SMA joint female seat P1, the second SMA joint female seat P2, the third SMA joint female seat P3 and the fourth SMA joint female seat P4 are used as input interfaces of four-path signals, the fifth SMA joint female seat P5 is used as an output interface of the signals, and the sixth SMA joint female seat P6 is used as a power supply interface capable of independently supplying power. The SMA joint female seat is used for connecting an antenna, a filter, an AD converter and other instrument equipment to realize analog signal input and output.

The relay logic control circuit 2 includes 3 relays, and the 3 relays are divided into a first relay U1, a second relay U2, and a third relay U3. The 3 relays all adopt the signal relay with the ohm dragon model number of G6J-2P-Y-DC5V, the signal relay is a small-specification signal relay specially used for processing analog signals, the control voltage of the signal relay is 5V, and the contact form is as follows: DPDT. The signal relay has 8 pins, comprises positive and negative pins of a relay coil, a pair of normally open contacts, a pair of normally closed contacts and a pair of common end contacts, and has a very good isolation effect with signals.

After a coil of the first relay U1 is connected in series with the first PNP type triode Q1, two ends of the coil of the relay are connected in parallel with a first freewheeling diode D1, one end of the first PNP type triode Q1 is connected with a power supply +5V, a grid electrode of the first PNP type triode Q1 is connected with a relay control IO port P23 of the MCU control unit 1, and meanwhile, the first PNP type triode Q1 is connected in series with a second resistor R2, and the first resistor R1 serves as a pull-up resistor of the IO port.

After a coil of the second relay U2 is connected in series with the second PNP type triode Q2, two ends of the coil of the relay are connected in parallel with a second freewheeling diode D2, one end of the second PNP type triode Q2 is connected with a power supply +5V, a grid electrode of the second PNP type triode Q2 is connected with a relay control IO port P22 of the MCU control unit 1, meanwhile, the second PNP type triode Q2 is connected in series with a fourth resistor R4, and the third resistor R3 serves as a pull-up resistor of the IO port.

After a coil of the third relay U3 is connected in series with the third PNP type triode Q3, two ends of the relay coil are connected in parallel with a third freewheeling diode D3, one end of the third PNP type triode Q3 is connected with a power supply +5V, a grid electrode of the third PNP type triode Q3 is connected with a relay control IO port P21 of the MCU control unit 1, and meanwhile, the third PNP type triode Q3 is connected in series with a sixth resistor R6, and the fifth resistor R5 is used as a pull-up resistor of the IO port.

The first path of analog signal channel is input from the normally closed contact of the first relay U1, is connected with the common end contact of the first relay U1, passes through the normally closed contact of the third relay U3, and outputs signals from the common end contact of the third relay U3, and is that the port P23 of the MCU control unit 1 sends a high level to the first relay U1, and the port P21 sends a high level to the third relay U3.

The second path of analog signal channel is input from the normally open contact of the first relay U1, is connected with the common end contact of the first relay U1, passes through the normally closed contact of the third relay U3, and outputs signals from the common end contact of the third relay U3, and the conduction condition is that the port P23 of the MCU control unit 1 sends a low level to the first relay U1, and the port P21 sends a high level to the third relay.

The third analog signal channel is input from the normally closed contact of the second relay U2, is connected with the common end contact of the second relay U2, passes through the normally open contact of the third relay U3, and outputs a signal from the common end contact of the third relay U3, and the conduction condition is that the port P22 of the MCU control unit 1 sends a high level to the second relay U2, and the port P21 sends a low level to the third relay U3.

The fourth analog signal channel is input from the normally open contact of the second relay, is connected with the common end contact of the second relay, and outputs a signal from the normally open contact of the third relay U3, and then the signal is output from the common end contact of the third relay U3, and the conduction condition is that the port P22 of the MCU control unit 1 sends a low level to the first relay U1, and the port P21 sends a low level to the third relay U3.

Referring to fig. 8 and 9, the method for controlling a logic system in which 3 relays control the on/off of 4 signals according to the present invention comprises the following steps:

Secondly, the data sending unit 0x01 represents an IN1 signal channel, an IO pin P23 of the MCU control unit 1 outputs high level to cut off a first PNP triode Q1, no voltage exists at two ends of a coil of a first relay U1 at the moment, so that the first relay U1 does not work, a normally closed contact of the first relay U1 is closed with a common end contact, an IN1 branch is conducted, a fourth light emitting diode D4 is assigned to be 0, and the light is on to represent IN1 channel gating; meanwhile, an IO pin P21 of the MCU control unit 1 outputs high level to cut off the third PNP triode Q3, and at the moment, no voltage exists at two ends of a coil of the third relay U3, so that the third relay U3 does not work, a normally closed contact of the third relay U3 is closed with a common end contact, an OUT branch is conducted, and the first analog signal channel is conducted.

Thirdly, the data sending unit 0x02 represents an IN2 signal channel, an IO pin P23 of the MCU control unit 1 outputs low level to enable a first PNP triode Q1 to be conducted, at the moment, the voltage at two ends of a coil of a first relay U1 is 5V, so that the first relay U1 starts to work, a normally closed contact of the first relay U1 is disconnected, the normally open contact is closed with a common end contact, an IN2 branch is conducted, a fifth light emitting diode D5 is assigned to be 0, and the light represents IN2 path gating; meanwhile, an IO pin P21 of the MCU control unit 1 outputs high level to cut off the third PNP triode Q3, and at the moment, no voltage exists at two ends of a coil of the third relay U3, so that the third relay U3 does not work, a normally closed contact of the third relay U3 is closed with a common end contact, an OUT branch circuit is conducted, and a second path of signal channel is conducted.

Fourthly, the data sending unit 0x03 represents an IN3 signal channel, an IO pin P22 of the MCU control unit 1 outputs high level to cut off a second PNP triode Q2, no voltage exists at two ends of a coil of a second relay U2 at the moment, so that the second relay U2 does not work, a normally closed contact of the second relay U2 is closed with a common end contact, an IN3 branch is conducted, a sixth light emitting diode D6 is assigned to be 0, and the light is on to represent IN3 channel gating; meanwhile, the IO pin P21 of the MCU control unit 1 outputs low level to enable the third PNP triode Q3 to be conducted, and the voltage at two ends of the coil of the third relay U3 is 5V at the moment, so that the third relay U3 starts to work, the normally closed contact is disconnected, the normally open contact is closed with the common end contact, the OUT branch is conducted, and the third signal channel is conducted.

Fifthly, the data sending unit 0x04 represents an IN4 signal channel, an IO pin P22 of the MCU control unit 1 outputs low level to enable a second PNP triode Q2 to be conducted, at the moment, the voltage at two ends of a coil of a second relay U2 is 5V, so that the second relay U2 starts to work, a normally closed contact of the second relay U2 is disconnected, the normally open contact is closed with a common end contact, an IN4 branch is conducted, a seventh light emitting diode D7 is assigned to be 0, and the light is on to represent IN4 path gating; meanwhile, the IO pin P21 of the MCU control unit 1 outputs low level to enable the third PNP triode Q3 to be conducted, the voltage at two ends of the coil of the third relay U3 is 5V, so that the third relay U3 starts to work, the normally closed contact is disconnected, the normally open contact is closed with the common end contact, the OUT branch is conducted, and the fourth signal channel is conducted.

The invention adopts a 5V direct current power supply, a user can complete the power supply and communication of the invention by the PC machine through only one USB data line, and the upper computer can control the signal of the instrument and equipment which the user wants to work to be input into other equipment by only sending some simple data characters, thereby saving a lot of unnecessary troubles and greatly improving the efficiency. The invention can realize remote control and accurate control on the transmission signal of the equipment, also protects the precise instrument and equipment, and has practical application value in industry. The invention realizes the expansion of signal channels through the cascade connection between the relay contacts, and similarly, the invention can also realize a logic system for controlling the on-off of 4N paths of signals by using 3N relays, wherein N is a natural number.

The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention, and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A logic system for controlling the on-off of 4 paths of signals by 3 relays is characterized in that: the device comprises an MCU control unit, a relay logic control circuit, a USB power interface circuit, a USB-to-TTL level conversion circuit and a signal input/output interface unit; the MCU control unit is used for carrying out access control on the relay logic control circuit; the USB-to-TTL level conversion circuit is used for converting the USB level received by the USB power interface circuit into the TTL level which can be identified by the MCU control unit; the signal input/output interface unit is used for connecting an antenna or a filter or an AD converter to realize the input and output of analog signals; the relay logic control circuit comprises 3 relays, and the 3 relays are divided into a first relay U1, a second relay U2 and a third relay U3; 3 signal relay is all adopted to individual relay, signal relay control voltage is 5V, and the contact form is: a DPDT; the signal relay is provided with 8 pins, including positive and negative pins of a relay coil, a pair of normally open contacts, a pair of normally closed contacts and a pair of common end contacts;

after a coil of the first relay U1 is connected in series with a first PNP type triode Q1, two ends of the coil of the relay are connected in parallel with a first freewheeling diode D1, one end of the first PNP type triode Q1 is connected with a power supply +5V, a grid electrode of the first PNP type triode Q1 is connected with a relay control IO port P23 of the MCU control unit, and meanwhile, the first PNP type triode Q1 is connected in series with a second resistor R2, and the first resistor R1 is used as a pull-up resistor of the IO port;

after a coil of the second relay U2 is connected in series with a second PNP type triode Q2, two ends of the coil of the relay are connected in parallel with a second freewheeling diode D2, one end of the second PNP type triode Q2 is connected with a power supply +5V, a grid electrode of the second PNP type triode Q2 is connected with a relay control IO port P22 of the MCU control unit, and meanwhile, the second PNP type triode Q2 is connected in series with a fourth resistor R4, and the third resistor R3 is used as a pull-up resistor of the IO port;

after a coil of the third relay U3 is connected in series with a third PNP type triode Q3, two ends of the coil of the relay are connected in parallel with a third freewheeling diode D3, one end of the third PNP type triode Q3 is connected with a power supply +5V, a grid electrode of the third PNP type triode Q3 is connected with a relay control IO port P21 of the MCU control unit, and meanwhile, the third PNP type triode Q3 is connected in series with a sixth resistor R6, and a fifth resistor R5 is used as a pull-up resistor of the IO port;

the first path of analog signal channel is input from the normally closed contact of the first relay U1, is connected with the common end contact of the first relay U1, passes through the normally closed contact of the third relay U3, and outputs a signal from the common end contact of the third relay U3, and is a P23 port of the MCU control unit sends a high level to the first relay U1, and meanwhile, a P21 port sends a high level to the third relay U3;

the second path of analog signal channel is input from the normally open contact of the first relay U1, is connected with the common end contact of the first relay U1, passes through the normally closed contact of the third relay U3, and outputs signals from the common end contact of the third relay U3 under the condition that the P23 port of the MCU control unit sends a low level to the first relay U1 and the P21 port sends a high level to the third relay;

the third analog signal channel is input from the normally closed contact of the second relay U2, is connected with the common end contact of the second relay U2, passes through the normally open contact of the third relay U3, and outputs a signal from the common end contact of the third relay U3 under the condition that the P22 port of the MCU control unit sends a high level to the second relay U2 and the P21 port sends a low level to the third relay U3;

2. The logic system for controlling the on-off of 4 signals by 3 relays according to claim 1, wherein: the MCU control unit is provided with a first crystal oscillator circuit and a reset circuit; the first crystal oscillator circuit is used for providing a clock signal for the MCU control unit; the reset circuit is used for resetting a program counter of the MCU control unit and enabling the MCU control unit to work stably.

3. The logic system for controlling the on-off of 4 signals by 3 relays according to claim 1, wherein: the USB power interface circuit comprises a USB female socket M1, a tenth capacitor C10, an eleventh polar capacitor C11 and a ninth light-emitting diode D9; the USB female socket M1 adopts a Micro USB female socket; an eleventh polar capacitor C11 of the power interface circuit adopts an aluminum electrolytic capacitor, has the functions of filtering and energy storage and can stably supply power to the PC; the ninth led D9 is used as a power-on indicator light of the power interface circuit to prompt the user that the system is powered on.

4. The logic system for controlling the on-off of 4 signals by 3 relays according to claim 1, wherein: the USB-to-TTL level conversion circuit comprises a level conversion chip G1 which is a conversion chip of a USB bus and realizes the conversion of USB to a serial port, the conversion of USB to IrDA infrared or the conversion of USB to a printing port; the level conversion chip G1 is used to convert the USB level received by the USB power interface circuit into a TTL level that can be recognized by the MCU control unit.

5. The logic system for controlling the on-off of 4 signals by 3 relays according to claim 4, wherein: the USB-to-TTL level conversion circuit is provided with a second crystal oscillator circuit, and the second crystal oscillator circuit is used for providing a clock signal for the level conversion chip G1; the level conversion chip G1 adopts a chip with the model CH 340G; the UD + pin of the CH340G is connected with the D + pin of MICRO USB, and the UD-pin is connected with the D-pin of MICRO USB; a transmission pin TXD and a receiving pin RXD of the CH340G chip are respectively connected with a receiving pin RXD and a transmission pin TXD of the MCU control unit; the receiving pin RXD of the MCU control unit is connected with the TXD pin of the CH340G chip through a backward diode D8, and the backward diode D8 adopts 1N4148, so that current is prevented from flowing into a rear-stage circuit through the pin and charging a capacitor of the rear stage, voltage with certain amplitude of the rear stage is prevented, and cold starting of a downloading program of the MCU control unit is influenced.

6. The logic system for controlling the on/off of 4 signals by 3 relays according to one of claims 1 to 5, wherein: the signal gating indicating circuit is also included; the signal gating indicating circuit consists of four light emitting diodes and a third load resistor; the four light emitting diodes are respectively a fourth light emitting diode D4, a fifth light emitting diode D5, a sixth light emitting diode D6 and a seventh light emitting diode D7; the third load resistor comprises an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13 and a fourteenth resistor R14; the fourth light emitting diode D4 and the eleventh resistor R11 are connected in series between the +5V power supply and the P24 pin of the MCU control unit; the fifth light emitting diode D5 and the twelfth resistor R12 are connected in series between the +5V power supply and the P25 pin of the MCU control unit; the sixth light emitting diode D6 and the thirteenth resistor R13 are connected in series between the +5V power supply and the P26 pin of the MCU control unit; the seventh light emitting diode D7 and the fourteenth resistor R14 are connected in series between the +5V power supply and the P27 pin of the MCU control unit.

7. A control method of a logic system for controlling the on-off of 4 signals by the 3 relays of claim 6 comprises the following steps:

firstly, C language programming of a singlechip, and selecting a statement by adopting case when a signal channel is selected;

the data sending unit 0x01 represents an IN1 signal channel, an IO pin P23 of the MCU control unit outputs high level to cut off a first PNP triode Q1, no voltage exists at two ends of a coil of a first relay U1 at the moment, so that a first relay U1 does not work, a normally closed contact of the first relay U1 is closed with a common end contact, an IN1 branch is conducted, a fourth light emitting diode D4 is assigned to be 0, and the light is on to represent the IN1 path gating; meanwhile, an IO pin P21 of the MCU control unit outputs high level to cut off the third PNP triode Q3, and at the moment, no voltage exists at two ends of a coil of the third relay U3, so that the third relay U3 does not work, a normally closed contact of the third relay U3 is closed with a common end contact, an OUT branch is conducted, and a first analog signal channel is conducted;

thirdly, the data sending unit 0x02 represents an IN2 signal channel, an IO pin P23 of the MCU control unit outputs low level to enable a first PNP triode Q1 to be conducted, at the moment, the voltage at two ends of a coil of a first relay U1 is 5V, so that the first relay U1 starts to work, a normally closed contact of the first relay U1 is disconnected, the normally open contact and a common end contact are closed, an IN2 branch is conducted, a fifth light emitting diode D5 is assigned with 0, and the light represents the IN2 path gating; meanwhile, an IO pin P21 of the MCU control unit outputs high level to cut off the third PNP triode Q3, and at the moment, no voltage exists at two ends of a coil of the third relay U3, so that the third relay U3 does not work, a normally closed contact of the third relay U3 is closed with a common end contact, an OUT branch circuit is conducted, and a second path of signal channel is conducted;

fourthly, the data sending unit 0x03 represents an IN3 signal channel, an IO pin P22 of the MCU control unit outputs high level to cut off a second PNP triode Q2, no voltage exists at two ends of a coil of a second relay U2 at the moment, so that a second relay U2 does not work, a normally closed contact of the second relay U2 is closed with a common end contact, an IN3 branch is conducted, a sixth light emitting diode D6 is assigned to be 0, and the light is on to represent IN3 channel gating; meanwhile, an IO pin P21 of the MCU control unit outputs a low level to enable a third PNP triode Q3 to be conducted, and the voltage at two ends of a coil of a third relay U3 is 5V, so that the third relay U3 starts to work, a normally closed contact is disconnected, a normally open contact and a common end contact are closed, an OUT branch is conducted, and a third signal channel is conducted;

fifthly, the data sending unit 0x04 represents an IN4 signal channel, an IO pin P22 of the MCU control unit outputs low level to enable a second PNP triode Q2 to be conducted, at the moment, the voltage at two ends of a coil of a second relay U2 is 5V, so that the second relay U2 starts to work, a normally closed contact of the second relay Q2 is disconnected, the normally open contact is closed with a common end contact, an IN4 branch is conducted, a seventh light emitting diode D7 is assigned to be 0, and the light is on to represent the IN4 channel gating; meanwhile, an IO pin P21 of the MCU control unit outputs low level to enable the third PNP triode Q3 to be conducted, the voltage at two ends of a coil of the third relay U3 is 5V, so that the third relay U3 starts to work, the normally closed contact is disconnected, the normally open contact is closed with the common end contact, the OUT branch is conducted, and the fourth signal channel is conducted.