CN110022064A - It is a kind of to eliminate the slope compensation circuit influenced on current-mode reducing transformer load capacity - Google Patents
It is a kind of to eliminate the slope compensation circuit influenced on current-mode reducing transformer load capacity Download PDFInfo
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- CN110022064A CN110022064A CN201910247031.XA CN201910247031A CN110022064A CN 110022064 A CN110022064 A CN 110022064A CN 201910247031 A CN201910247031 A CN 201910247031A CN 110022064 A CN110022064 A CN 110022064A
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- current
- nmos tube
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- slope
- tube
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The present invention relates to technical field of integrated circuits, disclose a kind of slope compensation circuit that can be eliminated and influence on current-mode reducing transformer load capacity.Including ramp voltage generating circuit, slope current generation circuit, circuit mirror current and sample circuit；In the electrical voltage point A ramped up in the slope current generation circuit connection ramp voltage generating circuit, first slope ascending current is generated；The circuit mirror current and the cooperation of slope current generation circuit, generate mirror image second ramp up electric current；The sample circuit samples the DC component of ramp voltage generating circuit and is converted into electric current using sample/hold circuit (including transmission gate and capacitor).Using technical solution of the present invention, the DC component of ramp voltage is sampled, the influence of the DC component is eliminated in final slope compensation current, to while guaranteeing that subharmonic oscillation does not occur for circuit, the maximum load capacity for not influencing the buck converter, optimizes the load capacity of converter.
Description
Technical field
Can eliminate the present invention relates to technical field of integrated circuits, especially one kind influences current-mode reducing transformer load capacity
Slope compensation circuit.
Background technique
In the buck converter of Peak Current Mode, need to be added slope compensation to prevent circuit from subharmonic oscillation occurs
Stability problem.
In subsequent conditioning circuit, the overturning point of pulsewidth modulation (PWM) comparator is traditionally arranged to be:
Ieao=Islope+Isense
Wherein, IeaoFor the output electric current of error amplifier ea, IsenseFor the sample rate current of inductive current, IslopeFor slope
Compensate electric current.Since the maximum output current of EA has the upper limit, slope compensation current IslopeBigger, inductive current is sampled
Peak value it is smaller, therefore corresponding load current also just it is smaller.What the slope compensation of circuit needed mainly compensates a slope,
And traditional slope compensation circuit can all introduce biggish DC component.So traditional slope compensation technology (no matter using
Segmented compensation or nonlinear compensation) in, as long as introducing slope compensation, the maximum belt that will affect current-mode reducing transformer carries energy
Power.
Existing portion of techniques improves traditional slope compensation circuit, can be according to the difference of duty ratio to slope
The amount of compensation is dynamically adjusted.But this improvement, still can be in slope compensation mainly for the promotion in terms of stability
DC component is introduced to some extent, does not eliminate influence of the slope compensation to load capacity.
Summary of the invention
The technical problems to be solved by the present invention are: in view of the above problems, providing one kind can eliminate to electric current
The slope compensation circuit that mould reducing transformer load capacity influences.
The technical solution adopted by the invention is as follows: a kind of can eliminate mends the slope that current-mode reducing transformer load capacity influences
Repay circuit, including ramp voltage generating circuit, slope current generation circuit, circuit mirror current and sample circuit；
The slope current generation circuit includes the second NMOS tube and first resistor, and the second NMOS tube grid connection is oblique
In the electrical voltage point A ramped up in the voltage generation circuit of slope, the second NMOS tube source electrode connects first resistor, and described second
The source electrode and drain electrode of NMOS tube has first slope ascending current；The circuit mirror current and slope current generation circuit are matched
It closes, generate mirror image second ramps up electric current；
The sample circuit includes transmission gate, the second capacitor, third NMOS tube, second resistance, in the voltage ramped up
Point A connection transmission gate reconnects the second capacitor, and the transmission gate is controlled by control signal and reverse signal, the control signal with
Reverse signal sample/save operation by transmission gate and the second capacitance versus voltage point A, the transmission gate and the second capacitor it
Between Node connectedness third NMOS tube grid, described second ramp up electric current and slope compensation current connect together after connect
Source electrode to the drain electrode of third NMOS tube, the third NMOS tube connects second resistance, the second resistance and first resistor
Match, the DC component of slope compensation current when the electric current for passing through third NMOS tube is PWM comparator overturning in reducing transformer.
Further, the ramp voltage generating circuit includes the first NMOS tube, the 4th NMOS tube, charging current and first
Capacitor, the source electrode ground connection of first NMOS tube, the drain electrode of first NMOS tube is connected with the source electrode of the 4th NMOS tube, described
Charging current connection first capacitor is grounded again, and the grid of first NMOS tube is connected between charging current and first capacitor
Electrical voltage point A, the 4th NMOS tube are switching tube, and the grid connection control signal Singal_2 of the 4th NMOS tube is each
The 4th NMOS tube is turned off when upper tube is opened, and is first capacitor charging by charging current.
Further, first NMOS tube, the second NMOS tube are identical with the size of third NMOS tube, and domain matches.
Further, the circuit mirror current includes the first PMOS tube and the second PMOS tube, first PMOS tube
Source electrode connects charging current, and the drain and gate of first PMOS tube is shorted and is separately connected the drain electrode and the of the second NMOS tube
The grid of two PMOS tube, the source electrode of second PMOS tube connect charging current, and the drain electrode of second PMOS tube connects third
The drain electrode of NMOS tube.
Compared with prior art, having the beneficial effect that using technical solution of the present invention by adopting the above technical scheme, to oblique
The DC component of slope voltage is sampled, and the influence of the DC component is eliminated in final slope compensation current, thus protecting
While subharmonic oscillation does not occur for card circuit, the maximum load capacity of the buck converter is not influenced, optimizes converter
Load capacity.
Detailed description of the invention
Fig. 1 is the structural representation that the present invention can eliminate the slope compensation circuit influenced on current-mode reducing transformer load capacity
Figure.
Specific embodiment
The present invention is described further with reference to the accompanying drawing.
The one kind provided according to the present invention can eliminate the slope compensation circuit influenced on current-mode reducing transformer load capacity, such as
Shown in Fig. 1, including ramp voltage generating circuit 1, slope current generation circuit, circuit mirror current 2 and sample circuit；
The slope current generation circuit includes the second NMOS tube MN2 and first resistor R1, the second NMOS tube grid
In the electrical voltage point A ramped up, first electricity of the second NMOS tube MN2 source electrode connection in MN2 connection ramp voltage generating circuit
R1 is hindered, the source electrode and drain electrode of the second NMOS tube MN2 has first slope ascending current I1；Because of the second source NMOS tube MN2
The B point voltage follow A point of pole rises, therefore electric current I1=VB/ R1 is also in ramp up, the circuit mirror current 2 and slope electricity
Generation circuit cooperation is flowed, the electric current I of mirror image is generated2It also is in ramp up；
The sample circuit includes transmission gate TG, the second capacitor C2, third NMOS tube MN3, second resistance R2, on slope
Electrical voltage point A connection transmission gate TG the second the capacitor C2, the transmission gate TG of reconnection risen is by control signal Signal_1 and reversely
Signal Signal_1 ' control, the control signal Signal_1 and reverse signal Signal_1 ' pass through the electricity of transmission gate TG and second
Hold C2 electrical voltage point A is carried out to sample/save operation, the 3rd NMOS of Node connectedness between the transmission gate TG and the second capacitor C2
The grid of pipe MN3, described second ramps up electric current I2With slope compensation current IslopeThe 3rd NMOS is connected to after connecting together
The source electrode of the drain electrode of pipe MN3, the third NMOS tube MN3 connects second resistance R2, the second resistance R2 and first resistor R1
Matching, passes through the electric current I of third NMOS tube MN33The direct current of slope compensation current when being overturn for PWM comparator in reducing transformer
Component.Slope compensation current IslopeFor the electric current for eventually entering into PWM.
Because of Islope=I3-I2, I2Electric current is in the electric current ramped up, I3For fixed current, so what is finally generated is oblique
Slope compensates electric current IslopeTo complete the slope of circuit after being superimposed with error amplifier EA output electric current in the electric current of ramp down
Compensation.Simultaneously as the grid end of third NMOS tube MN3 samples the DC component of ramp voltage, therefore compare in PWM
When device is overturn, IslopeElectric current will not be to inductive current sampling electric current IsenseMaximum value have an impact, thus would not also influence
The load capacity of converter.In the structure that above-described embodiment uses, the sample/hold circuit (electricity of transmission gate TG and second has been used
Hold C2), electric current is sampled and be converted to by the DC component to ramp voltage, is substantially eliminated in traditional slope compensation
Influence to maximum load capacity.
As an embodiment of the present invention, the ramp voltage generating circuit 1 includes the first NMOS tube MN1, the 4th
NMOS tube MN4, charging current I0It is grounded with the source electrode of first capacitor C1, the first NMOS tube MN1, first NMOS tube
The drain electrode of MN1 is connected with the source electrode of the 4th NMOS tube MN4, the charging current I0Connection first capacitor C1 is grounded again, and described the
The grid of one NMOS tube MN1 is connected to charging current I0The electrical voltage point A, the 4th NMOS tube MN4 of C1 between first capacitor
For switching tube, the grid connection control signal Singal_2 of the 4th NMOS tube MN4 is to turn off the when upper tube is opened every time
Four NMOS tube MN4, pass through charging current I0For first capacitor C1 charging, control signal Singal_2 prolongs after the shutdown of each upper tube
The a bit of time opens the 4th NMOS tube MN4 late, is substantially discharged first capacitor C1, and until next upper tube is opened, beginning is next
A circulation.
As an embodiment of the present invention, the size phase of first NMOS tube, the second NMOS tube and third NMOS tube
Together, and domain matches.
As an embodiment of the present invention, the circuit mirror current 2 includes the first PMOS tube MP1 and the second PMOS tube
The source electrode of MP2, the first PMOS tube MP1 connect charging current I0, the drain and gate short circuit of the first PMOS tube MP1 is simultaneously
It is separately connected drain electrode and the grid of the second PMOS tube MP2 of the second NMOS tube MN2, the source electrode connection of the second PMOS tube MP2
Charging current I0, the drain electrode of the drain electrode connection third NMOS tube MN3 of the second PMOS tube MP2.
The invention is not limited to specific embodiments above-mentioned.The present invention, which expands to, any in the present specification to be disclosed
New feature or any new combination, and disclose any new method or process the step of or any new combination.If this
Field technical staff is altered or modified not departing from the unsubstantiality that spirit of the invention is done, should belong to power of the present invention
The claimed range of benefit.
Claims (4)
1. one kind can eliminate the slope compensation circuit influenced on current-mode reducing transformer load capacity, which is characterized in that including slope
Voltage generation circuit, slope current generation circuit, circuit mirror current and sample circuit；
The slope current generation circuit includes the second NMOS tube and first resistor, the second NMOS tube grid connection slope electricity
In the electrical voltage point A ramped up in pressure generation circuit, the second NMOS tube source electrode connects first resistor, second NMOS tube
Source electrode and drain electrode have first slope ascending current；The circuit mirror current and the cooperation of slope current generation circuit, generate
The second of mirror image ramps up electric current；
The sample circuit includes transmission gate, the second capacitor, third NMOS tube, second resistance, is connected in the electrical voltage point A ramped up
It connects transmission gate and reconnects the second capacitor, the transmission gate is controlled by control signal and reverse signal, the control signal and reversely
Signal carries out sampling/saving operation by transmission gate and the second capacitance versus voltage point A, between the transmission gate and the second capacitor
The grid of Node connectedness third NMOS tube, described second ramp up electric current and slope compensation current connect together after be connected to
The source electrode of the drain electrode of three NMOS tubes, the third NMOS tube connects second resistance, and the second resistance matches with first resistor, makes
The DC component of slope compensation current when the electric current that third NMOS tube must be flowed through is PWM comparator overturning in reducing transformer.
2. the slope compensation circuit influenced on current-mode reducing transformer load capacity, feature can be eliminated as described in claim 1
It is, the ramp voltage generating circuit includes the first NMOS tube, the 4th NMOS tube, charging current and first capacitor, and described the
The source electrode of one NMOS tube is grounded, and the drain electrode of first NMOS tube is connected with the source electrode of the 4th NMOS tube, and the charging current connects
It connects first capacitor to be grounded again, the grid of first NMOS tube is connected to the electrical voltage point A between charging current and first capacitor, institute
Stating the 4th NMOS tube is switching tube, and the grid connection control signal Singal_2 of the 4th NMOS tube is to open every time in upper tube
When turn off the 4th NMOS tube, by charging current be first capacitor charge.
3. the slope compensation circuit influenced on current-mode reducing transformer load capacity, feature can be eliminated as claimed in claim 2
It is, first NMOS tube, the second NMOS tube are identical with the size of third NMOS tube, and domain matches.
4. the slope compensation circuit influenced on current-mode reducing transformer load capacity, feature can be eliminated as claimed in claim 3
It is, the circuit mirror current includes the first PMOS tube and the second PMOS tube, and the source electrode of first PMOS tube connects charging
The drain and gate of electric current, first PMOS tube is shorted and is separately connected drain electrode and the grid of the second PMOS tube of the second NMOS tube
Pole, the source electrode of second PMOS tube connect charging current, the drain electrode of the drain electrode connection third NMOS tube of second PMOS tube.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910247031.XA CN110022064B (en) | 2019-03-29 | 2019-03-29 | Slope compensation circuit capable of eliminating influence on loading capacity of current step-down transformer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910247031.XA CN110022064B (en) | 2019-03-29 | 2019-03-29 | Slope compensation circuit capable of eliminating influence on loading capacity of current step-down transformer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110022064A true CN110022064A (en) | 2019-07-16 |
| CN110022064B CN110022064B (en) | 2020-07-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910247031.XA Active CN110022064B (en) | 2019-03-29 | 2019-03-29 | Slope compensation circuit capable of eliminating influence on loading capacity of current step-down transformer |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114285251A (en) * | 2021-12-24 | 2022-04-05 | 西安理工大学 | Circuit for improving carrying capacity of switching power supply |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080218142A1 (en) * | 2007-02-17 | 2008-09-11 | Osamu Uehara | Current detector circuit and current mode switching regulator |
| CN101674069A (en) * | 2009-10-14 | 2010-03-17 | 美芯晟科技（北京）有限公司 | Slope generating circuit |
| CN101674085A (en) * | 2008-09-10 | 2010-03-17 | 中国科学院半导体研究所 | Sampling hold circuit applied to analogue-to-digital converter |
| CN202435271U (en) * | 2012-01-20 | 2012-09-12 | 彩优微电子(昆山)有限公司 | Slope compensation circuit |
-
2019
- 2019-03-29 CN CN201910247031.XA patent/CN110022064B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080218142A1 (en) * | 2007-02-17 | 2008-09-11 | Osamu Uehara | Current detector circuit and current mode switching regulator |
| CN101674085A (en) * | 2008-09-10 | 2010-03-17 | 中国科学院半导体研究所 | Sampling hold circuit applied to analogue-to-digital converter |
| CN101674069A (en) * | 2009-10-14 | 2010-03-17 | 美芯晟科技（北京）有限公司 | Slope generating circuit |
| CN202435271U (en) * | 2012-01-20 | 2012-09-12 | 彩优微电子(昆山)有限公司 | Slope compensation circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114285251A (en) * | 2021-12-24 | 2022-04-05 | 西安理工大学 | Circuit for improving carrying capacity of switching power supply |
| CN114285251B (en) * | 2021-12-24 | 2024-05-17 | 西安理工大学 | Circuit for improving load capacity of switching power supply |
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| Publication number | Publication date |
|---|---|
| CN110022064B (en) | 2020-07-14 |
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