CN109995386B - Radio frequency signal output device - Google Patents
Radio frequency signal output device Download PDFInfo
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- CN109995386B CN109995386B CN201910246820.1A CN201910246820A CN109995386B CN 109995386 B CN109995386 B CN 109995386B CN 201910246820 A CN201910246820 A CN 201910246820A CN 109995386 B CN109995386 B CN 109995386B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B2001/0408—Circuits with power amplifiers
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Abstract
The invention discloses a radio frequency signal output device, which comprises a control module, wherein the control module is connected with a control end of a nested pulse signal generation module; the first output end of the nested pulse signal generating module is connected with the control end of the radio frequency switch; the second output end of the nested pulse signal generating module is connected with the control end of the high-voltage power supply; the signal input end of the radio frequency switch is connected with a signal source, and the signal output end of the radio frequency switch is connected with the input end of the pre-amplifier; the output end of the front-stage amplifier is connected with the input end of the pulse traveling wave tube, and the output end of the pulse traveling wave tube is used as the output end of the whole radio frequency signal output device; the high-voltage power supply is electrically connected with the pulse traveling wave tube. The invention can eliminate the deterioration of rising edge and falling edge caused by the high-voltage power supply modulation circuit and realize the optimization of the rising edge and the falling edge of the output radio-frequency pulse signal of the traveling wave tube pulse power amplifier.
Description
Technical Field
The invention relates to the field of power amplifiers, in particular to a radio frequency signal output device.
Background
At present, the output of the high-power pulse radio frequency signals at home and abroad is mainly realized by a traveling wave tube pulse power amplifier, but the rising edge and the falling edge of the radio frequency pulse signals output by the traveling wave tube pulse power amplifier are longer, and along with the increasing and stricter requirements on the rising edge and the falling edge time of the radio frequency high-power pulse signals output by the traveling wave tube pulse power amplifier in a communication system, the rising edge and the falling edge of the radio frequency pulse signals output by the traveling wave tube pulse power amplifier are optimized to be solved.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides the radio frequency signal output device which solves the problems of longer rising edge and falling edge time of the radio frequency pulse signal output by the existing traveling wave tube.
In order to achieve the aim of the invention, the invention adopts the following technical scheme:
the radio frequency signal output device comprises a control module, wherein the control module is connected with a control end of the nested pulse signal generation module; the first output end of the nested pulse signal generating module is connected with the control end of the radio frequency switch; the second output end of the nested pulse signal generating module is connected with the control end of the high-voltage power supply; the signal input end of the radio frequency switch is connected with a signal source, and the signal output end of the radio frequency switch is connected with the input end of the pre-amplifier; the output end of the front-stage amplifier is connected with the input end of the pulse traveling wave tube, and the output end of the pulse traveling wave tube is used as the output end of the whole radio frequency signal output device; the high-voltage power supply is electrically connected with the pulse traveling wave tube.
Further, the control module comprises a chip U4 with the model of EP2C8T144I8, a chip U1 with the model of SPX3819M5-L-1-2, a chip U3 with the model of SP1117-3.3, a chip U6 with the model of PDL03-12S05, a chip U5 with the model of EPCS4SI8, a chip U11 with the model of 24LC64, a chip Y1 with the model of SCXI-7050DFA-50MHZ and a pin J1 with the specification of 5x 2;
pin 2 of the chip U6 is respectively connected with one end of the capacitor C2 and one end of the capacitor C39 and is used as an access end of an external power supply anode; pin 3 of the chip U6 is connected with one end of the capacitor C42; pin 1 of the chip U6 is respectively connected with the other end of the capacitor C42, the other end of the capacitor C39 and the other end of the capacitor C2 and is used as an access end of an external power supply negative electrode; pin 7 of the chip U6 is connected with one end of the capacitor C40 and grounded; the pin 6 of the chip U6 is connected with the other end of the capacitor C40 and is used as a 5V power supply output end;
pin 3 of the chip U3 is connected with the 5V power supply output end and one end of the capacitor C5 respectively; the other end of the capacitor C5 is respectively connected with the pin 1 of the chip U3 and one end of the capacitor C35; pin 2 of the chip U3 is connected with the other end of the capacitor C35 and is used as a 3.3V power supply output end;
the pin 1 of the chip U1 is respectively connected with the pin 3 of the chip U1, one end of the capacitor C1 and the 3.3V power supply output end; the pin 2 of the chip U1 is connected with the other end of the capacitor C1 and grounded; pin 5 of the chip U1 is respectively connected with a grounding capacitor C33 and a grounding capacitor C34 and is used as a 1.2V power supply output end;
pin 5, pin 23, pin 29, pin 116, pin 127, pin 138, pin 77, pin 95, pin 102, pin 46, pin 54 and pin 66 of chip U4 are all connected to a 3.3V power supply output; pin 26, pin 50, pin 62, pin 81, pin 124 and pin 131 of chip U4 are all connected to the 1.2V power output; pin 6, pin 19, pin 27, pin 33, pin 39, pin 49, pin 56, pin 61, pin 68, pin 78, pin 80, pin 98, pin 105, pin 111, pin 117, pin 123, pin 128, pin 130, and pin 140 of chip U4 are all grounded;
pin 35 and pin 107 of chip U4 are both connected to the 1.2V power output; pin 37 of chip U4 is connected to one end of resistor R10 and one end of capacitor C7, respectively; the other end of the resistor R10 is connected with a 1.2V power supply output end; the other end of the capacitor C7 is respectively connected with the grounding resistor R33 and the pin 38 of the chip U4; pin 109 of chip U4 is connected to one end of resistor R34 and one end of capacitor C26, respectively; the other end of the resistor R34 is connected with the 1.2V power supply output end; the other end of the resistor R26 is respectively connected with the grounding resistor R35 and the pin 110 of the chip U4; pin 36 and pin 34 of chip U4 are connected to ground; pin 106 and pin 108 of chip U4 are connected to ground;
pin 132, pin 133 and pin 134 of chip U4 are respectively connected to pin 7, pin 6 and pin 5 of chip U11; pin 142 of chip U4 is grounded, and pin 144 of chip U4 is connected to ground capacitor C44; pin 1, pin 2, pin 3 and pin 4 of chip U11 are all grounded; pin 8 of the chip U11 is respectively connected with a 3.3V power supply output end and a grounding capacitor C49;
the pin 40 of the chip U4 is grounded, the pin 67 of the chip U4 is connected with one end of the resistor R14, and the other end of the resistor R14 is respectively connected with one end of the resistor R13 and the grounded capacitor C3; the other end of the resistor R13 is connected with the 3.3V power supply output end; pin 88, pin 89, pin 90, pin 91, pin 22, pin 21 and pin 18 of chip U4 are all connected to ground; pin 15 of chip U4 is connected with pin 3 of chip Y1 through resistor R11; pin 2 of the chip Y1 is grounded, and pin 4 of the chip Y1 is connected with the 3.3V power supply output end;
pin 13 of chip U4 is connected with pin 9 of pin J1 and one end of resistor R8 respectively, and the other end of resistor R8 is connected with 3.3V power supply output end; pin 10 of chip U4 is connected to pin 3 of pin J1; pin 12 of chip U4 is connected to pin 1 of pin J1 and ground resistor R6, respectively; pin 11 of chip U4 connects pin 5 of pin J1 and one end of resistor R7 separately, another end of resistor R7 connects 3.3V power output end; pin 2 and pin 10 of pin J1 are grounded, and pin 4 of pin J1 is connected with the 3.3V power supply output end; pin 14 of chip U4 is connected to pin 2 of chip U5; pin 85 and pin 84 of chip U4 are connected to ground; pin 16 of chip U4 is connected with ground resistor R2; pin 15 of chip U4 is connected to pin 6 of chip U5; 83 of the chip U4 is connected with the 3.3V power supply output end through a resistor R3; pin 20 of chip U4 is connected with 3.3V power supply output end through resistor R4; pin 82 of chip U4 is connected with the 3.3V power supply output end through resistor R5; pin 4 of chip U5 is grounded; the pin 3 of the chip U5 is respectively connected with the pin 7 of the chip U5, the pin 8 of the chip U5, the grounding capacitor C31 and the 3.3V power supply output end;
pin 76 of chip U4 is connected to ground capacitor C43; pin 1 of chip U4 is connected to pin 5 of chip U5; pin 2 of chip U4 is connected to pin 1 of chip U5; pin 4 of chip U4 is grounded.
Further, the pin 83 of the chip U4 is further connected to one end of a resistor R9, the other end of the resistor R9 is connected to the negative electrode of the light emitting diode LED2, and the positive electrode of the light emitting diode LED2 is connected to the 3.3V power output end.
Further, the 3.3V power output end is also connected with one end of a resistor R1, the other end of the resistor R1 is connected with the positive electrode of the light emitting diode LED1, and the negative electrode of the light emitting diode LED1 is grounded.
Further, the 3.3V power output end is further connected to one end of the capacitor C17, one end of the capacitor C18, one end of the capacitor C19, one end of the capacitor C8, one end of the capacitor C9, one end of the capacitor C10, one end of the capacitor C11, one end of the capacitor C12, one end of the capacitor C13, one end of the capacitor C14, one end of the capacitor C15, and one end of the capacitor C16, respectively; the other end of the capacitor C8 is respectively connected with the other end of the capacitor C19, the other end of the capacitor C10, the other end of the capacitor C11, the other end of the capacitor C12, the other end of the capacitor C13, the other end of the capacitor C14, the other end of the capacitor C15, the other end of the capacitor C16, the other end of the capacitor C17, the other end of the capacitor C18 and the other end of the capacitor C19, and the other end of the capacitor C18 is connected with the ground.
Further, the 1.2V power output end is further connected to one end of the capacitor C20, one end of the capacitor C21, one end of the capacitor C22, one end of the capacitor C23, one end of the capacitor C24, one end of the capacitor C25, one end of the capacitor C29 and one end of the capacitor C30, respectively; the other end of the capacitor C20 is connected to the other end of the capacitor C21, the other end of the capacitor C22, the other end of the capacitor C23, the other end of the capacitor C24, the other end of the capacitor C25, the other end of the capacitor C29 and the other end of the capacitor C30, respectively, and is grounded.
Further, the model of the nested pulse signal generating module is SWSPM-2PPSG-1.
Further, the radio frequency switch is of the type TSDR0218M.
Further, the model of the high-voltage power supply is SWD3-11K8P1C600-1.
Further, the model of the front-stage amplifier is RTTWQ0618-28, and the model of the pulse traveling wave tube is BM-8172.
The beneficial effects of the invention are as follows: the device is provided with the nested pulse signal generating module for outputting through the control module, so that the pre-amplifier outputs the modulated pulse radio frequency signal to be nested in the grid opening time of the pulse traveling wave tube, further, the deterioration of the rising edge and the falling edge brought by the high-voltage power modulating circuit is eliminated, and the optimization of the rising edge and the falling edge of the output radio frequency pulse signal of the traveling wave tube pulse power amplifier can be finally realized.
Drawings
FIG. 1 is a block diagram of the structure of the present invention;
FIG. 2 is a peripheral circuit diagram of the chip U1;
fig. 3 is a peripheral circuit diagram of the chip U3:
FIG. 4 is a peripheral circuit diagram of the chip U6;
fig. 5 is a peripheral circuit diagram of the LED 1;
fig. 6 is a peripheral circuit diagram of the LED 2;
FIG. 7 is a peripheral circuit diagram of chip Y1;
FIG. 8 is a peripheral circuit diagram of the chip U5;
FIG. 9 is a peripheral circuit diagram of pin header J1;
FIG. 10 is a first portion peripheral circuit diagram of chip U4;
FIG. 11 is a second partial peripheral circuit diagram of the chip U4;
FIG. 12 is a third partial peripheral circuit diagram of the chip U4;
fig. 13 is a fourth partial peripheral circuit diagram of the chip U4;
fig. 14 is a fifth partial peripheral circuit diagram of the chip U4;
FIG. 15 is a sixth partial peripheral circuit diagram of the chip U4;
fig. 16 is a seventh partial peripheral circuit diagram of the chip U4;
fig. 17 is an eighth partial peripheral circuit diagram of the chip U4;
fig. 18 is a ninth partial peripheral circuit diagram of the chip U4;
FIG. 19 is a peripheral circuit diagram of the chip U11;
FIG. 20 is a peripheral circuit diagram of the U4 pin 67 of the chip;
FIG. 21 is a 3.3V power supply external circuit diagram;
FIG. 22 is a 1.2V power supply external circuit diagram;
fig. 23 is a timing diagram of the rising and falling edge optimization of the output rf pulse signal of the traveling wave tube pulse power amplifier.
Detailed Description
The following description of the embodiments of the present invention is provided to facilitate understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and all the inventions which make use of the inventive concept are protected by the spirit and scope of the present invention as defined and defined in the appended claims to those skilled in the art.
As shown in fig. 1, the radio frequency signal output device comprises a control module, wherein the control module is connected with a control end of the nested pulse signal generating module; the first output end of the nested pulse signal generating module is connected with the control end of the radio frequency switch; the second output end of the nested pulse signal generating module is connected with the control end of the high-voltage power supply; the signal input end of the radio frequency switch is connected with a signal source, and the signal output end of the radio frequency switch is connected with the input end of the pre-amplifier; the output end of the front-stage amplifier is connected with the input end of the pulse traveling wave tube, and the output end of the pulse traveling wave tube is used as the output end of the whole radio frequency signal output device; the high-voltage power supply is electrically connected with the pulse traveling wave tube.
As shown in fig. 2, 3, 4, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, and 19, the control module includes a chip U4 of model EP2C8T144I8, a chip U1 of model SPX3819M5-L-1-2, a chip U3 of model SP1117-3.3, a chip U6 of model PDL03-12S05, a chip U5 of model EPCS4SI8, a chip U11 of model 24LC64, a chip Y1 of model SCXI-7050DFA-50MHZ, and a pin J1 of a specification of 5x 2;
pin 2 of the chip U6 is respectively connected with one end of the capacitor C2 and one end of the capacitor C39 and is used as an access end of an external power supply anode; pin 3 of the chip U6 is connected with one end of the capacitor C42; pin 1 of the chip U6 is respectively connected with the other end of the capacitor C42, the other end of the capacitor C39 and the other end of the capacitor C2 and is used as an access end of an external power supply negative electrode; pin 7 of the chip U6 is connected with one end of the capacitor C40 and grounded; the pin 6 of the chip U6 is connected with the other end of the capacitor C40 and is used as a 5V power supply output end;
pin 3 of the chip U3 is connected with the 5V power supply output end and one end of the capacitor C5 respectively; the other end of the capacitor C5 is respectively connected with the pin 1 of the chip U3 and one end of the capacitor C35; pin 2 of the chip U3 is connected with the other end of the capacitor C35 and is used as a 3.3V power supply output end;
the pin 1 of the chip U1 is respectively connected with the pin 3 of the chip U1, one end of the capacitor C1 and the 3.3V power supply output end; the pin 2 of the chip U1 is connected with the other end of the capacitor C1 and grounded; pin 5 of the chip U1 is respectively connected with a grounding capacitor C33 and a grounding capacitor C34 and is used as a 1.2V power supply output end;
pin 5, pin 23, pin 29, pin 116, pin 127, pin 138, pin 77, pin 95, pin 102, pin 46, pin 54 and pin 66 of chip U4 are all connected to a 3.3V power supply output; pin 26, pin 50, pin 62, pin 81, pin 124 and pin 131 of chip U4 are all connected to the 1.2V power output; pin 6, pin 19, pin 27, pin 33, pin 39, pin 49, pin 56, pin 61, pin 68, pin 78, pin 80, pin 98, pin 105, pin 111, pin 117, pin 123, pin 128, pin 130, and pin 140 of chip U4 are all grounded;
pin 35 and pin 107 of chip U4 are both connected to the 1.2V power output; pin 37 of chip U4 is connected to one end of resistor R10 and one end of capacitor C7, respectively; the other end of the resistor R10 is connected with a 1.2V power supply output end; the other end of the capacitor C7 is respectively connected with the grounding resistor R33 and the pin 38 of the chip U4; pin 109 of chip U4 is connected to one end of resistor R34 and one end of capacitor C26, respectively; the other end of the resistor R34 is connected with the 1.2V power supply output end; the other end of the resistor R26 is respectively connected with the grounding resistor R35 and the pin 110 of the chip U4; pin 36 and pin 34 of chip U4 are connected to ground; pin 106 and pin 108 of chip U4 are connected to ground;
pin 132, pin 133 and pin 134 of chip U4 are respectively connected to pin 7, pin 6 and pin 5 of chip U11; pin 142 of chip U4 is grounded, and pin 144 of chip U4 is connected to ground capacitor C44; pin 1, pin 2, pin 3 and pin 4 of chip U11 are all grounded; pin 8 of the chip U11 is respectively connected with a 3.3V power supply output end and a grounding capacitor C49;
the pin 40 of the chip U4 is grounded, the pin 67 of the chip U4 is connected with one end of the resistor R14, and the other end of the resistor R14 is respectively connected with one end of the resistor R13 and the grounded capacitor C3; the other end of the resistor R13 is connected with the 3.3V power supply output end; pin 88, pin 89, pin 90, pin 91, pin 22, pin 21 and pin 18 of chip U4 are all connected to ground; pin 15 of chip U4 is connected with pin 3 of chip Y1 through resistor R11; pin 2 of the chip Y1 is grounded, and pin 4 of the chip Y1 is connected with the 3.3V power supply output end;
pin 13 of chip U4 is connected with pin 9 of pin J1 and one end of resistor R8 respectively, and the other end of resistor R8 is connected with 3.3V power supply output end; pin 10 of chip U4 is connected to pin 3 of pin J1; pin 12 of chip U4 is connected to pin 1 of pin J1 and ground resistor R6, respectively; pin 11 of chip U4 connects pin 5 of pin J1 and one end of resistor R7 separately, another end of resistor R7 connects 3.3V power output end; pin 2 and pin 10 of pin J1 are grounded, and pin 4 of pin J1 is connected with the 3.3V power supply output end; pin 14 of chip U4 is connected to pin 2 of chip U5; pin 85 and pin 84 of chip U4 are connected to ground; pin 16 of chip U4 is connected with ground resistor R2; pin 15 of chip U4 is connected to pin 6 of chip U5; 83 of the chip U4 is connected with the 3.3V power supply output end through a resistor R3; pin 20 of chip U4 is connected with 3.3V power supply output end through resistor R4; pin 82 of chip U4 is connected with the 3.3V power supply output end through resistor R5; pin 4 of chip U5 is grounded; the pin 3 of the chip U5 is respectively connected with the pin 7 of the chip U5, the pin 8 of the chip U5, the grounding capacitor C31 and the 3.3V power supply output end;
pin 76 of chip U4 is connected to ground capacitor C43; pin 1 of chip U4 is connected to pin 5 of chip U5; pin 2 of chip U4 is connected to pin 1 of chip U5; pin 4 of chip U4 is grounded.
As shown in fig. 6, the pin 83 of the chip U4 is further connected to one end of a resistor R9, the other end of the resistor R9 is connected to the negative electrode of the light emitting diode LED2, and the positive electrode of the light emitting diode LED2 is connected to the 3.3V power output end.
As shown in fig. 5, the 3.3V power output end is further connected to one end of a resistor R1, and the other end of the resistor R1 is connected to the positive electrode of the light emitting diode LED1, and the negative electrode of the light emitting diode LED1 is grounded.
As shown in fig. 21, the 3.3V power output terminal is further connected to one end of the capacitor C17, one end of the capacitor C18, one end of the capacitor C19, one end of the capacitor C8, one end of the capacitor C9, one end of the capacitor C10, one end of the capacitor C11, one end of the capacitor C12, one end of the capacitor C13, one end of the capacitor C14, one end of the capacitor C15, and one end of the capacitor C16, respectively; the other end of the capacitor C8 is respectively connected with the other end of the capacitor C19, the other end of the capacitor C10, the other end of the capacitor C11, the other end of the capacitor C12, the other end of the capacitor C13, the other end of the capacitor C14, the other end of the capacitor C15, the other end of the capacitor C16, the other end of the capacitor C17, the other end of the capacitor C18 and the other end of the capacitor C19, and the other end of the capacitor C18 is connected with the ground.
As shown in fig. 22, the 1.2V power output terminal is further connected to one end of the capacitor C20, one end of the capacitor C21, one end of the capacitor C22, one end of the capacitor C23, one end of the capacitor C24, one end of the capacitor C25, one end of the capacitor C29, and one end of the capacitor C30, respectively; the other end of the capacitor C20 is connected to the other end of the capacitor C21, the other end of the capacitor C22, the other end of the capacitor C23, the other end of the capacitor C24, the other end of the capacitor C25, the other end of the capacitor C29 and the other end of the capacitor C30, respectively, and is grounded.
In one embodiment of the invention, the model of the nested pulse signal generating module is SWSPM-2PPSG-1. The radio frequency switch is of the type TSDR0218M. The model of the high-voltage power supply is SWD3-11K8P1C600-1. The model of the front-stage amplifier is RTTWQ0618-28, and the model of the pulse traveling wave tube is BM-8172.
As shown in fig. 23, in a specific use process, the control module controls the time interval between the rising edges and the falling edges of two paths of pulses of the nested pulse generating module to generate a nested pulse signal, wherein the nested pulse signal comprises an inner pulse signal and an outer pulse signal, the inner pulse signal is connected to the control end of the radio frequency switch, and the signal source input radio frequency continuous wave signal is modulated into a radio frequency pulse signal. The outside pulse signal is connected to the control end of the high-voltage power supply and used for modulating the grid voltage output of the high-voltage power supply, so that the high-voltage power supply is used for supplying power to the pulse traveling wave tube, the modulated pulse radio frequency signal output by the pre-amplifier is nested in the grid opening time of the pulse traveling wave tube, and the optimization of the rising edge and the falling edge of the radio frequency pulse signal output by the pulse power amplifier of the traveling wave tube is further realized.
In summary, the control module sets the output of the nested pulse signal generating module, so that the pre-amplifier output modulated pulse radio frequency signal is nested in the gate turn-on time of the pulse traveling wave tube, thereby eliminating the deterioration of rising edge and falling edge caused by the high-voltage power modulating circuit, and finally realizing the optimization of the rising edge and the falling edge of the output radio frequency pulse signal of the traveling wave tube pulse power amplifier.
Claims (10)
1. A radio frequency signal output device, characterized in that: the device comprises a control module, wherein the control module is connected with a control end of the nested pulse signal generation module; the first output end of the nested pulse signal generating module is connected with the control end of the radio frequency switch; the second output end of the nested pulse signal generating module is connected with the control end of the high-voltage power supply; the signal input end of the radio frequency switch is connected with a signal source, and the signal output end of the radio frequency switch is connected with the input end of the pre-amplifier; the output end of the pre-amplifier is connected with the input end of the pulse traveling wave tube, and the output end of the pulse traveling wave tube is used as the output end of the whole radio frequency signal output device; the high-voltage power supply is electrically connected with the pulse traveling wave tube;
the control module is used for realizing generation of nested pulse signals by controlling the time interval between the rising edges and the falling edges of two paths of pulses of the nested pulse generation module, wherein the nested pulse signals comprise inner side pulse signals and outer side pulse signals, the inner side pulse signals are connected to the control end of the radio frequency switch, and the radio frequency continuous wave signals input by the signal source are modulated into radio frequency pulse signals; the outside pulse signal is connected to the control end of the high-voltage power supply and used for modulating the grid voltage output of the high-voltage power supply, so that the high-voltage power supply is modulated to supply power to the pulse traveling wave tube, the modulated pulse radio frequency signal output by the pre-amplifier is nested in the grid opening time of the pulse traveling wave tube, and the optimization of the rising edge and the falling edge of the radio frequency pulse signal output by the pulse power amplifier of the traveling wave tube is further realized.
2. The radio frequency signal output device according to claim 1, wherein: the control module comprises a chip U4 with the model of EP2C8T144I8, a chip U1 with the model of SPX3819M5-L-1-2, a chip U3 with the model of SP1117-3.3, a chip U6 with the model of PDL03-12S05, a chip U5 with the model of EPCS4SI8, a chip U11 with the model of 24LC64, a chip Y1 with the model of SCXI-7050DFA-50MHZ and a pin J1 with the specification of 5x 2;
the pin 2 of the chip U6 is respectively connected with one end of the capacitor C2 and one end of the capacitor C39 and is used as an access end of an external power supply anode; pin 3 of the chip U6 is connected with one end of a capacitor C42; the pin 1 of the chip U6 is respectively connected with the other end of the capacitor C42, the other end of the capacitor C39 and the other end of the capacitor C2 and is used as an access end of an external power supply negative electrode; the pin 7 of the chip U6 is connected with one end of the capacitor C40 and grounded; the pin 6 of the chip U6 is connected with the other end of the capacitor C40 and is used as a 5V power supply output end;
the pin 3 of the chip U3 is respectively connected with the 5V power supply output end and one end of the capacitor C5; the other end of the capacitor C5 is respectively connected with the pin 1 of the chip U3 and one end of the capacitor C35; the pin 2 of the chip U3 is connected with the other end of the capacitor C35 and is used as a 3.3V power supply output end;
the pin 1 of the chip U1 is respectively connected with the pin 3 of the chip U1, one end of the capacitor C1 and the 3.3V power supply output end; the pin 2 of the chip U1 is connected with the other end of the capacitor C1 and grounded; pin 5 of the chip U1 is respectively connected with a grounding capacitor C33 and a grounding capacitor C34 and is used as a 1.2V power supply output end;
pin 5, pin 23, pin 29, pin 116, pin 127, pin 138, pin 77, pin 95, pin 102, pin 46, pin 54 and pin 66 of the chip U4 are all connected with a 3.3V power supply output terminal; the pin 26, the pin 50, the pin 62, the pin 81, the pin 124 and the pin 131 of the chip U4 are all connected with a 1.2V power supply output end; pin 6, pin 19, pin 27, pin 33, pin 39, pin 49, pin 56, pin 61, pin 68, pin 78, pin 80, pin 98, pin 105, pin 111, pin 117, pin 123, pin 128, pin 130 and pin 140 of the chip U4 are all grounded;
the pin 35 and the pin 107 of the chip U4 are both connected with a 1.2V power supply output end; the pin 37 of the chip U4 is respectively connected with one end of the resistor R10 and one end of the capacitor C7; the other end of the resistor R10 is connected with a 1.2V power supply output end; the other end of the capacitor C7 is respectively connected with the grounding resistor R33 and the pin 38 of the chip U4; the pin 109 of the chip U4 is connected to one end of the resistor R34 and one end of the capacitor C26 respectively; the other end of the resistor R34 is connected with a 1.2V power supply output end; the other end of the resistor R26 is respectively connected with a grounding resistor R35 and a pin 110 of the chip U4; the pin 36 and the pin 34 of the chip U4 are connected with each other and grounded; the pin 106 and the pin 108 of the chip U4 are connected with each other and grounded;
pin 132, pin 133 and pin 134 of the chip U4 are respectively and correspondingly connected with pin 7, pin 6 and pin 5 of the chip U11; the pin 142 of the chip U4 is grounded, and the pin 144 of the chip U4 is connected with the grounding capacitor C44; pin 1, pin 2, pin 3 and pin 4 of the chip U11 are all grounded; the pin 8 of the chip U11 is respectively connected with a 3.3V power supply output end and a grounding capacitor C49;
the pin 40 of the chip U4 is grounded, the pin 67 of the chip U4 is connected with one end of the resistor R14, and the other end of the resistor R14 is respectively connected with one end of the resistor R13 and the grounding capacitor C3; the other end of the resistor R13 is connected with a 3.3V power supply output end; pin 88, pin 89, pin 90, pin 91, pin 22, pin 21 and pin 18 of the chip U4 are all connected to ground; pin 15 of the chip U4 is connected to pin 3 of the chip Y1 through a resistor R11; the pin 2 of the chip Y1 is grounded, and the pin 4 of the chip Y1 is connected with a 3.3V power supply output end;
the pin 13 of the chip U4 is respectively connected with the pin 9 of the pin J1 and one end of the resistor R8, and the other end of the resistor R8 is connected with the 3.3V power supply output end; pin 10 of the chip U4 is connected with pin 3 of pin J1; the pin 12 of the chip U4 is respectively connected with the pin 1 of the pin J1 and the ground resistor R6; the pin 11 of the chip U4 is respectively connected with the pin 5 of the pin J1 and one end of the resistor R7, and the other end of the resistor R7 is connected with the 3.3V power supply output end; pin 2 and pin 10 of pin J1 are grounded, and pin 4 of pin J1 is connected with a 3.3V power supply output end; the pin 14 of the chip U4 is connected with the pin 2 of the chip U5; the pin 85 and the pin 84 of the chip U4 are connected and grounded; the pin 16 of the chip U4 is connected with a grounding resistor R2; the pin 15 of the chip U4 is connected with the pin 6 of the chip U5; 83 of the chip U4 is connected with the 3.3V power supply output end through a resistor R3; the pin 20 of the chip U4 is connected with the 3.3V power supply output end through a resistor R4; the pin 82 of the chip U4 is connected with the 3.3V power supply output end through a resistor R5; the pin 4 of the chip U5 is grounded; the pin 3 of the chip U5 is respectively connected with the pin 7 of the chip U5, the pin 8 of the chip U5, the grounding capacitor C31 and the 3.3V power supply output end;
pin 76 of the chip U4 is connected to ground capacitor C43; the pin 1 of the chip U4 is connected with the pin 5 of the chip U5; the pin 2 of the chip U4 is connected with the pin 1 of the chip U5; and a pin 4 of the chip U4 is grounded.
3. The radio frequency signal output device according to claim 2, wherein: the pin 83 of the chip U4 is also connected with one end of a resistor R9, the other end of the resistor R9 is connected with the cathode of the light emitting diode LED2, and the anode of the light emitting diode LED2 is connected with the 3.3V power supply output end.
4. The radio frequency signal output device according to claim 2, wherein: the 3.3V power supply output end is also connected with one end of a resistor R1, the other end of the resistor R1 is connected with the anode of the light emitting diode LED1, and the cathode of the light emitting diode LED1 is grounded.
5. The radio frequency signal output device according to claim 2, wherein: the 3.3V power supply output end is also respectively connected with one end of a capacitor C17, one end of a capacitor C18, one end of a capacitor C19, one end of a capacitor C8, one end of a capacitor C9, one end of a capacitor C10, one end of a capacitor C11, one end of a capacitor C12, one end of a capacitor C13, one end of a capacitor C14, one end of a capacitor C15 and one end of a capacitor C16; the other end of the capacitor C8 is respectively connected with the other end of the capacitor C19, the other end of the capacitor C10, the other end of the capacitor C11, the other end of the capacitor C12, the other end of the capacitor C13, the other end of the capacitor C14, the other end of the capacitor C15, the other end of the capacitor C16, the other end of the capacitor C17, the other end of the capacitor C18 and the other end of the capacitor C19, and the other end of the capacitor C is connected with the ground.
6. The radio frequency signal output device according to claim 2, wherein: the 1.2V power supply output end is also respectively connected with one end of a capacitor C20, one end of a capacitor C21, one end of a capacitor C22, one end of a capacitor C23, one end of a capacitor C24, one end of a capacitor C25, one end of a capacitor C29 and one end of a capacitor C30; the other end of the capacitor C20 is respectively connected with the other end of the capacitor C21, the other end of the capacitor C22, the other end of the capacitor C23, the other end of the capacitor C24, the other end of the capacitor C25, the other end of the capacitor C29 and the other end of the capacitor C30 and is grounded.
7. The radio frequency signal output device according to claim 1, wherein: the model of the nested pulse signal generating module is SWSPM-2PPSG-1.
8. The radio frequency signal output device according to claim 1, wherein: the radio frequency switch is of a model TSDR0218M.
9. The radio frequency signal output device according to claim 1, wherein: the model of the high-voltage power supply is SWD3-11K8P1C600-1.
10. The radio frequency signal output device according to claim 1, wherein: the model of the pre-amplifier is RTTWQ0618-28, and the model of the pulse traveling wave tube is BM-8172.
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