CN109993685A - A kind of GPU server - Google Patents
A kind of GPU server Download PDFInfo
- Publication number
- CN109993685A CN109993685A CN201910233692.7A CN201910233692A CN109993685A CN 109993685 A CN109993685 A CN 109993685A CN 201910233692 A CN201910233692 A CN 201910233692A CN 109993685 A CN109993685 A CN 109993685A
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- Prior art keywords
- pcie
- connector
- gpu
- pcie connector
- connect
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/18—Packaging or power distribution
- G06F1/183—Internal mounting support structures, e.g. for printed circuit boards, internal connecting means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/20—Cooling means
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
Abstract
The present invention relates to server technology fields, a kind of GPU server is provided, including the mainboard being arranged in lower space and the GPU plate, PCIE switch and the PCIE slot that are arranged in upper space, communication between mainboard and GPU plate is realized by the PCIE connector and corresponding cable of setting card edge, to realize the free switching between different GPU topologys, a kind of server architecture of elasticity is formed.
Description
Technical field
The present invention relates to server technology field, specially a kind of GPU server.
Background technique
Currently, graphics processor (Graphics Processing Unit, GPU) has powerful computation capability,
It can be used as coprocessor, improve the operational performance of server system.So that it is widely used in high-performance calculation, deep learning
Equal fields.Usually, different GPU topologys has a respective merits and demerits, and different features determines that they different are answered
Use scene.The conversion that different topology how is realized in limited server space, is that GPU server design person first has to consider
The problem of.
Since server space is limited, GPU server is higher to power supply, cooling requirements in addition, is generally difficult to take into account framework
Variability and server stability.So many GPU servers of industry are all to save space by fixed GPU topology, bring
The stability of server.But to pass through UPI (Ultra Path Interconnect) when GPU exchanging visit, speed will receive shadow
It rings.
Summary of the invention
In order to overcome the defect of the prior art as indicated above, the present inventor has made intensive studies this, is paying
After a large amount of creative works, so as to complete the present invention.
Specifically, the technical problems to be solved by the present invention are: providing a kind of GPU server, it is intended to solve existing skill
GPU server is all to save space by fixed GPU topology in art, brings the stability of server, but GPU exchanging visit Shi Yaojing
UPI is crossed, the technical issues of speed will receive influence.
In order to solve the above technical problems, the technical scheme is that
A kind of GPU server, including the mainboard that is arranged in lower space and the GPU plate being arranged in upper space,
PCIE switch and PCIE slot；
The mainboard is equipped with the first CPU and the 2nd CPU, is communicated and is connected by UPI between the first CPU and the 2nd CPU
It connects, the first PCIE connector, the 2nd PCIE connector, the 3rd PCIE connector and the 4th PCIE is equipped in the space the lower part 1U
Connector, wherein the first PCIE connector and the 2nd PCIE connector are connect with the first CPU, the third
PCIE connector and the 4th PCIE connector are connect with second central processing unit；
The GPU plate includes the first GPU, the 2nd GPU, the 3rd GPU, the 4th GPU, the 5th GPU, the 6th GPU, the 7th GPU
And the 8th GPU, the PCIE slot include the first PCIE slot, the 2nd PCIE slot, the 3rd PCIE slot and the 4th
PCIE slot, PCIE switch include the first PCIE switch and the 2nd PCIE switch, equipped with the in the space the top 3U
Five PCIE connectors, the 6th PCIE connector, the 7th PCIE connector, the 8th PCIE connector, the 9th PCIE connector, the tenth
PCIE connector, the 11st PCIE connector and the 12nd PCIE connector, wherein the first PCIE switch respectively with
First GPU, the 2nd GPU, the 3rd GPU, the 4th GPU, the 5th PCIE connector, the connection of the 6th PCIE connector, described the
Two PCIE switch respectively with the 5th GPU, the 6th GPU, the 7th GPU, the 8th GPU, the 11st PCIE connector and
The connection of 12 PCIE connectors, the 7th PCIE connector are connect with the first PCIE slot, the 8th PCIE connection
Device is connect with the 2nd PCIE slot, and the 9th PCIE connector is connect with the 3rd PCIE slot, and the described tenth
PCIE connector is connect with the 4th PCIE slot；
The PCIE connector in PCIE connector and upper space in the lower space is interconnected by cable.
As an improvement scheme, the mainboard is arranged in the heat dissipation wind channel of the lower space；
The GPU plate is arranged in the heat dissipation wind channel of the upper space.
As an improvement scheme, each PCIE connector in the lower space is arranged at card edge；
Each PCIE connector in the upper space is arranged at card edge.
As an improvement scheme, the mainboard, the first PCIE connector, the 2nd PCIE connector, the 3rd PCIE connect
It connects device and the 4th PCIE connector is arranged in the space 1U of lower part；
The GPU plate, PCIE switch, PCIE slot, the 5th PCIE connector, the 6th PCIE connector, the 7th PCIE
Connector, the 8th PCIE connector, the 9th PCIE connector, the tenth PCIE connector, the 11st PCIE connector and the tenth
Two PCIE connectors are arranged in the space 3U of top.
As an improvement scheme, the first PCIE connection connect with the 5th PCIE connector, the described 6th
PCIE connector is connect with the 7th PCIE connector, and the 2nd PCIE connector connect connection with the 8th PCIE,
The 3rd PCIE connector is connect with the 9th PCIE connector, the tenth PCIE connector and the 11st PCIE
Connector connection, the 4th PCIE connector are connect with the 12nd PCIE connector.
As an improvement scheme, the first PCIE connection connect with the 5th PCIE connector, the described 6th
PCIE connector is connect with the 7th PCIE connector, and the 3rd PCIE connector and the 8th PCIE connector connect
It connects, the 4th PCIE connector is connect with the 9th PCIE connector, the tenth PCIE connector and the described 11st
The connection of PCIE connector, the 2nd PCIE connector are connect with the 12nd PCIE connector.
As an improvement scheme, the first PCIE connection connect with the 5th PCIE connector, described second
PCIE connector is connect with the 7th PCIE connector, and the 3rd PCIE connection is connect with the 8th PCIE connector,
The 4th PCIE connector is connect with the 9th PCIE connector, the tenth PCIE connector and the 11st PCIE
Connector connection, the 6th PCIE connector are connect with the 12nd PCIE connector.
In embodiments of the present invention, GPU server includes the mainboard being arranged in lower space and is arranged in upper space
Interior GPU plate, PCIE switch and PCIE slot, the communication between mainboard and GPU plate are connected by the PCIE of setting card edge
It connects device and corresponding cable is realized, to realize the free switching between different GPU topologys, form a kind of server of elasticity
Framework.
Detailed description of the invention
It, below will be to specific in order to illustrate more clearly of the specific embodiment of the invention or technical solution in the prior art
Embodiment or attached drawing needed to be used in the description of the prior art are briefly described.In all the appended drawings, similar element
Or part is generally identified by similar appended drawing reference.In attached drawing, each element or part might not be drawn according to actual ratio.
Fig. 1 is the structural schematic diagram for the GPU server that the embodiment of the present invention one provides；
Fig. 2 is the structural schematic diagram of GPU server provided by Embodiment 2 of the present invention；
Fig. 3 is the structural schematic diagram for the GPU server that the embodiment of the present invention three provides；
Wherein, the first CPU of 1-, 2- the first PCIE connector of the 2nd CPU, 3-, the 2nd PCIE connector of 4-, the 3rd PCIE of 5-
Connector, the 4th PCIE connector of 6-, 7- the first GPU, 8- the 2nd GPU, 9- the 3rd GPU, 10- the 5th GPU of the 4th GPU, 11-,
12- the 6th GPU, 13- the 7th GPU, 14- the first PCIE slot of the 8th GPU, 15-, the 2nd PCIE slot of 16-, the 3rd PCIE of 17-
Slot, the 4th PCIE slot of 18-, the first PCIE switch of 19-, the 2nd PCIE switch of 20-, the 5th PCIE connector of 21-,
The 6th PCIE connector of 22-, the 7th PCIE connector of 23-, the 8th PCIE connector of 24-, the 9th PCIE connector of 25-, 26-
Ten PCIE connectors, the 11st PCIE connector of 27-, the 12nd PCIE connector of 28-.
Specific embodiment
It is described in detail below in conjunction with embodiment of the attached drawing to technical solution of the present invention.Following embodiment is only used for
Clearly illustrate of the invention, technical solution, therefore be only used as example, and cannot be used as a limitation and limit protection model of the invention
It encloses.
Fig. 1 to Fig. 3 respectively illustrates the structural schematic diagram of GPU server provided in an embodiment of the present invention, for the ease of saying
It is bright, part related to the embodiment of the present invention is only gived in figure.
GPU server includes the mainboard being arranged in lower space and the GPU plate being arranged in upper space, PCIE switching
Device and PCIE slot；
The mainboard is equipped with the first CPU 1 and the 2nd CPU 2, passes through between the first CPU 1 and the 2nd CPU 2
UPI communication connection is equipped with the first PCIE connector 3, the 2nd PCIE connector 4, the 3rd PCIE connection in the space the lower part 1U
Device 5 and the 4th PCIE connector 6, wherein the first PCIE connector 3 and the 2nd PCIE connector 4 with the first CPU
1 connection, the 3rd PCIE connector 5 and the 4th PCIE connector 6 are connect with the 2nd CPU 2；
The GPU plate includes the first GPU 7, the 2nd GPU 8, the 3rd GPU 9, the 4th GPU 10, the 5th GPU the 11, the 6th
GPU 12, the 7th GPU 13 and the 8th GPU 14, the PCIE slot include the first PCIE slot 15, the 2nd PCIE slot
16, the 3rd PCIE slot 17 and the 4th PCIE slot 18, PCIE switch include the first PCIE switch 19 and the 2nd PCIE
Switch 20 is equipped with the 5th PCIE connector 21, the 6th PCIE connector 22, the 7th PCIE connector in the space the top 3U
23, the 8th PCIE connector 24, the 9th PCIE connector 25, the tenth PCIE connector 26, the 11st PCIE connector 27 and
12nd PCIE connector 28, wherein the first PCIE switch 19 respectively with the first GPU 7, the 2nd GPU 8,
Three GPU 9, the 4th GPU 10, the 5th PCIE connector 21, the connection of the 6th PCIE connector 22, the 2nd PCIE switch 20
Respectively with the 5th GPU 11, the 6th GPU 12, the 7th GPU 13, the 8th GPU 14, the 11st PCIE connector 27 and
The connection of 12nd PCIE connector 28, the 7th PCIE connector 23 are connect with the first PCIE slot, and the described 8th
PCIE connector 24 is connect with the 2nd PCIE slot 16, and the 9th PCIE connector 25 connects with the 3rd PCIE slot
It connects, the tenth PCIE connector 26 is connect with the 4th PCIE slot 18；
The PCIE connector in PCIE connector and upper space in the lower space is interconnected by cable.
In this embodiment, the first PCIE slot 15, the 2nd PCIE slot 16, the 3rd PCIE slot 17 and the 4th
PCIE slot 18 is for inserting external equipment.
In embodiments of the present invention, mainboard is arranged in the heat dissipation wind channel of the lower space；
The GPU plate is arranged in the heat dissipation wind channel of the upper space；
To improve the heat dissipation effect of GPU server, the system stability of GPU server is improved.
In embodiments of the present invention, each PCIE connector in the lower space is arranged at card edge；
Each PCIE connector in the upper space is arranged at card edge；
Each PCIE connector is high-speed PCI E connector, and is arranged in card edge position, and operator is convenient for
Scene plug, provides convenience for operator.
In embodiments of the present invention, which is the server of 4U structure, for other kinds of server,
It is similar to design framework；
Wherein, mainboard, the first PCIE connector 3, the 2nd PCIE connector 4, the 3rd PCIE connector 5 and the 4th PCIE
Connector 6 is arranged in the space 1U of lower part；
The GPU plate, PCIE switch, PCIE slot, the 5th PCIE connector 21, the 6th PCIE connector the 22, the 7th
PCIE connector 23, the 8th PCIE connector 24, the 9th PCIE connector 25, the tenth PCIE connector 26, the 11st PCIE connect
It connects device 27 and the 12nd PCIE connector 28 is arranged in the space 3U of top.
In embodiments of the present invention, as shown in Figure 1, the first PCIE connection and the 5th PCIE connector 21 connect
It connects, the 6th PCIE connector 22 is connect with the 7th PCIE connector 23, the 2nd PCIE connector 4 and described the
Eight PCIE connections connection, the 3rd PCIE connector 5 are connect with the 9th PCIE connector 25, the tenth PCIE connection
Device 26 is connect with the 11st PCIE connector 27, the 4th PCIE connector 6 and the 12nd PCIE connector 28
Connection；
In the GPU topological structure, the first PCIE switch 19 is hung on the first CPU 1, and the 2nd PCIE switch 20 is hung
On the 2nd CPU 2, cpu resource can be made full use of, this topological structure is applied to GPU cloud scene.
As shown in Fig. 2, the first PCIE connection is connect with the 5th PCIE connector 21, the 6th PCIE connection
Device 22 is connect with the 7th PCIE connector 23, and the 3rd PCIE connector 5 is connect with the 8th PCIE connector 24,
The 4th PCIE connector is connect with the 9th PCIE connector 25, the tenth PCIE connector 26 and the described 11st
PCIE connector 27 connects, and the 2nd PCIE connector 4 is connect with the 12nd PCIE connector.
In the topological structure, the first PCIE switch 19 and the 2nd PCIE switch 20 are hung under the first CPU 1, and two
The GPU on side is not needed when exchanging visits through UPI, improves access speed, the typical case scene of this topology be deep learning with
Training.
As shown in figure 3, the first PCIE connection is connect with the 5th PCIE connector 21, the 2nd PCIE connector 4
It being connect with the 7th PCIE connector 23, the 3rd PCIE connection is connect with the 8th PCIE connector 24, and described
Four PCIE connectors 6 are connect with the 9th PCIE connector 25, the tenth PCIE connector 26 and the 11st PCIE
Connector 27 connects, and the 6th PCIE connector 22 is connect with the 12nd PCIE connector 28；
The exchanging visit path for the GPU that the topological structure is further simplified, the GPU on both sides exchange visits and need to only be switched by two-stage PCIE
Device, needs not move through CPU, and this topology is applied under certain special deep learning scenes.
In embodiments of the present invention, in the server system of 4U, mainboard is located at the lower part space 1U, and GPU plate is located at top
The space 3U, PCIE connector are respectively positioned on the position of card edge, and the switching of different topology is only by between transformation two boards card
Cable interconnection can be realized.CPU board and GPU plate are located at lower/upper two heat dissipation wind channels, improve the stability of system.
The above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；Although referring to aforementioned each reality
Applying example, invention is explained in detail, those skilled in the art should understand that: it still can be to aforementioned each
Technical solution documented by embodiment is modified, or equivalent substitution of some or all of the technical features；And
These are modified or replaceed, the range for technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution,
It should all cover within the scope of the claims and the description of the invention.
Claims (7)
1. a kind of GPU server, which is characterized in that including the mainboard being arranged in lower space and be arranged in upper space
GPU plate, PCIE switch and PCIE slot；
The mainboard is equipped with the first CPU and the 2nd CPU, passes through UPI communication connection, institute between the first CPU and the 2nd CPU
It states and is equipped with the first PCIE connector, the 2nd PCIE connector, the 3rd PCIE connector and the 4th PCIE connection in the space 1U of lower part
Device, wherein the first PCIE connector and the 2nd PCIE connector are connect with the first CPU, and the 3rd PCIE connects
It connects device and the 4th PCIE connector is connect with second central processing unit；
The GPU plate include the first GPU, the 2nd GPU, the 3rd GPU, the 4th GPU, the 5th GPU, the 6th GPU, the 7th GPU and
8th GPU, the PCIE slot include that the first PCIE slot, the 2nd PCIE slot, the 3rd PCIE slot and the 4th PCIE are inserted
Slot, PCIE switch include the first PCIE switch and the 2nd PCIE switch, are equipped with the 5th PCIE in the space the top 3U
Connector, the 6th PCIE connector, the 7th PCIE connector, the 8th PCIE connector, the 9th PCIE connector, the tenth PCIE connect
Connect device, the 11st PCIE connector and the 12nd PCIE connector, wherein the first PCIE switch is respectively with described
One GPU, the 2nd GPU, the 3rd GPU, the 4th GPU, the 5th PCIE connector, the connection of the 6th PCIE connector, the 2nd PCIE
Switch respectively with the 5th GPU, the 6th GPU, the 7th GPU, the 8th GPU, the 11st PCIE connector and the 12nd
The connection of PCIE connector, the 7th PCIE connector connect with the first PCIE slot, the 8th PCIE connector and
The 2nd PCIE slot connection, the 9th PCIE connector are connect with the 3rd PCIE slot, and the tenth PCIE connects
Device is connect to connect with the 4th PCIE slot；
The PCIE connector in PCIE connector and upper space in the lower space is interconnected by cable.
2. GPU server according to claim 1, which is characterized in that dissipating for the lower space is arranged in the mainboard
In hot-flow flue；
The GPU plate is arranged in the heat dissipation wind channel of the upper space.
3. GPU server according to claim 2, which is characterized in that each PCIE connector in the lower space
It is arranged at card edge；
Each PCIE connector in the upper space is arranged at card edge.
4. GPU server according to claim 3, which is characterized in that the mainboard, the first PCIE connector, second
PCIE connector, the 3rd PCIE connector and the 4th PCIE connector are arranged in the space 1U of lower part；
The GPU plate, PCIE switch, PCIE slot, the 5th PCIE connector, the 6th PCIE connector, the 7th PCIE connection
Device, the 8th PCIE connector, the 9th PCIE connector, the tenth PCIE connector, the 11st PCIE connector and the 12nd
PCIE connector is arranged in the space 3U of top.
5. GPU server according to claim 4, which is characterized in that the first PCIE connection and the 5th PCIE
Connector connection, the 6th PCIE connector are connect with the 7th PCIE connector, the 2nd PCIE connector and institute
The 8th PCIE connection connection is stated, the 3rd PCIE connector is connect with the 9th PCIE connector, and the tenth PCIE connects
It connects device to connect with the 11st PCIE connector, the 4th PCIE connector is connect with the 12nd PCIE connector.
6. GPU server according to claim 4, which is characterized in that the first PCIE connection and the 5th PCIE
Connector connection, the 6th PCIE connector are connect with the 7th PCIE connector, the 3rd PCIE connector and institute
The connection of the 8th PCIE connector is stated, the 4th PCIE connector is connect with the 9th PCIE connector, the tenth PCIE
Connector is connect with the 11st PCIE connector, and the 2nd PCIE connector and the 12nd PCIE connector connect
It connects.
7. GPU server according to claim 4, which is characterized in that the first PCIE connection and the 5th PCIE
Connector connection, the 2nd PCIE connector connect with the 7th PCIE connector, the 3rd PCIE connection with it is described
The connection of 8th PCIE connector, the 4th PCIE connector are connect with the 9th PCIE connector, and the tenth PCIE connects
It connects device to connect with the 11st PCIE connector, the 6th PCIE connector is connect with the 12nd PCIE connector.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910233692.7A CN109993685A (en) | 2019-03-26 | 2019-03-26 | A kind of GPU server |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910233692.7A CN109993685A (en) | 2019-03-26 | 2019-03-26 | A kind of GPU server |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109993685A true CN109993685A (en) | 2019-07-09 |
Family
ID=67131661
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910233692.7A Withdrawn CN109993685A (en) | 2019-03-26 | 2019-03-26 | A kind of GPU server |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109993685A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113064850A (en) * | 2021-04-09 | 2021-07-02 | 中科可控信息产业有限公司 | Topology detection processing method and device, server and readable storage medium |
| CN117333348A (en) * | 2023-12-01 | 2024-01-02 | 苏州元脑智能科技有限公司 | Circuit board of graphic processor and server system |
-
2019
- 2019-03-26 CN CN201910233692.7A patent/CN109993685A/en not_active Withdrawn
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113064850A (en) * | 2021-04-09 | 2021-07-02 | 中科可控信息产业有限公司 | Topology detection processing method and device, server and readable storage medium |
| CN117333348A (en) * | 2023-12-01 | 2024-01-02 | 苏州元脑智能科技有限公司 | Circuit board of graphic processor and server system |
| CN117333348B (en) * | 2023-12-01 | 2024-02-20 | 苏州元脑智能科技有限公司 | Circuit board of graphic processor and server system |
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| PB01 | Publication | ||
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| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20190709 |
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| WW01 | Invention patent application withdrawn after publication |