CN109981112B - Partial cyclic redundancy check assisted sequencing statistical decoding method - Google Patents

Abstract

The invention discloses a partial Cyclic Redundancy Check (CRC) assisted sequencing statistical decoding method, which is suitable for soft-decision decoding of low-density parity check (LDPC) codes with information bits meeting CRC. Before decoding, forming a system generator matrix according to a generator polynomial of cyclic redundancy check, and dividing the matrix into two parts, wherein one part is used for detecting a decoding result, and the other part is used for assisting decoding; multiplying a part of CRC generating matrix of the auxiliary decoding by a generating matrix of the low-density parity check code to obtain a joint generating matrix; the decoding process mainly adopts an iterative sequencing statistical decoding (BP-OSD) method, and a joint generation matrix is used as a coding matrix in an OSD algorithm. After decoding is finished, performing CRC (cyclic redundancy check) on information bits of the code words, and if the information bits meet the CRC, outputting the code as decoding; otherwise, the decoding is judged to be failed. The method greatly enhances the error correction performance of the LDPC code while keeping the CRC error detection function.

Description

Partial cyclic redundancy check assisted sequencing statistical decoding method

Technical Field

The invention belongs to the technical field of decoding of channel error correction coding, and particularly relates to the technical field of decoding of channel error correction coding.

Background

1. Cyclic redundancy check code

Cyclic Redundancy Check (CRC) is a very important error detection code, which is not only simple in coding, but also low in false judgment probability. The CRC is essentially that an input sequence with length K generates a check code (CRC code) with length L according to a certain rule, and adds the check code to the back of the original sequence to form a new sequence with length K + L to be transmitted. The receiving end checks the received sequence according to the same rule, and then can find out whether the data transmission is error. This rule is called "generator polynomial" in the theory of error control. The primary role of the CRC is to detect whether there are errors in the transmitted data block, but there is no ability to correct the errors themselves. The method comprises the following implementation steps:

let the input sequence length be K, expressed as a binary polynomial:

the generator polynomial of the cyclic redundancy check is expressed as:

the encoding step of the transmitting end can be expressed as:

step 1: l zeros are added at the tail of the input sequence, and the corresponding binary polynomial is expressed as x ^L a(x)；

Step 2: dividing x by a generator polynomial g (x) ^L a (x), obtaining a remainder p (x), wherein the binary sequence with the length of L corresponding to the remainder p (x) is CRC;

and step 3: association x ^L a (x) and p (x) to obtain a code polynomial x ^L a (x) + p (x), the binary sequence with length K + L corresponding to the formula is the coded sequence added with CRC.

When decoding, the receiving end only needs to divide the binary polynomial corresponding to the received sequence by the same g (x). If the remainder is zero, it represents that there is no error in the data transmission process, and the last L bit of the received sequence is removed to obtain the original input sequence; otherwise, it indicates that the data transmission is in error.

2. Low density parity check code

2.1 brief introduction to

A Low Density Parity Check (LDPC) code is a relatively special linear block code, the particularity of which is that the number of 1's in its parity check matrix is much smaller than the number of 0's, called sparsity, also called low density. The check matrix and the code word of the LDPC code satisfy the following relational expression, wherein theta is an all-zero column vector:

HC ^T mod 2＝θ。

2.2 encoding of Low Density parity check codes

The LDPC code is encoded as follows

The first step is as follows: in order to solve the generator matrix G conveniently, so that the check bits can be conveniently decoded during encoding, any check matrix H can be linearly transformed into a typical check matrix H 'by an algorithm, such as a gaussian elimination algorithm, the number of columns of the check matrix H or H' represents the length of a codeword, and the number of rows represents the number of parity bits. A typical check matrix H' is shown by the following equation:

H′＝[P ^T |I]；

the typical check matrix H' can be divided into two parts, one part is a unit matrix I, and the other part P ^T Is a transposed matrix of the P matrix.

The second step: and then, the typical check matrix H' can be used for constructing a generator matrix G shown as the following formula:

G＝[I|P]；

the typical generator matrix G constructed by using the typical check matrix H' may also be divided into two parts, one of which is a unit matrix I and the other is a P matrix.

The third step: during block coding, source bits U are grouped according to the number of rows of a generated matrix G, and the number of source bits included in each group is the number of rows of the generated matrix G. And multiplying each group of the output code words with the generator matrix G modulo 2 to obtain the coded output code words, and forming an output code word sequence by each group of the output code words according to the grouping sequence.

Wherein the ith group U _i Output code word C obtained by multiplying with generator matrix G _i Comprises the following steps:

C _i ＝U _i G＝[U _i |u _i P]

wherein: each group outputting a code word C _i Includes two parts, one of which is the group of source bits U _i The result multiplied by the unit matrix I in the typical generator matrix G is called a system bit; another part U _i P is the set of source bits U _i The result of the multiplication with the P matrix in the exemplary generator matrix G is called a check bit.

2.3 two-plot representation

Any check matrix of the low-density parity check code can be converted into a corresponding binary (Tanner) graph, variable nodes and check nodes are identifiers after the check matrix is converted into the Tanner graph, the variable nodes correspond to columns of the check matrix, and the check nodes correspond to rows of the check matrix.

By checking matrix H _4×8 For example, where V and S identify the corresponding variable node and check node, respectively:

the transformed Tanner graph is shown in FIG. 1, and has 8 variable nodes v ₁ ，v ₂ …v ₈ 4 check nodes s ₁ ，s ₂ …s ₄ . Check nodes are identified by boxes, variable nodes by circles, check nodes and bit nodes with a cross element of 1 connecting corresponding rows and columns, e.g. v ₁ And s ₁ 、v ₁ And s ₂ Thus, many cycles are formed in the Tanner graph, for example, s is marked by a thick line ₁ 、v ₃ 、s ₃ And v ₇ 。

2.4 iterative soft-decision decoding of low-density parity-check codes

In the decoding method of LDPC code, the iterative soft decision decoding method based on bipartite graph, namely BP decoding, has good error rate performance, taking the standard sum-product decoding method as an example, the main steps of decoding are as follows:

defining the bipartite graph variable node and check node set corresponding to the matrix of the low-density parity check code as V = { V = _n ，n∈[1，N]}，S＝{s _m， m∈[1，M]}; defining variable node v _n Participating check node set A (n) = { j, h _j，n =1, and is included in the check node s _m Variable node set B (m) = { i, h = _m，i =1}; defining the removal of check nodes s in the check node set A (n) _m Define the removed variable node v in the variable node set B (m) _n Node set B (m) \\ n, code sequence C = { C = _n ,n∈[1,N]}；

The first step is as follows: initialization: BPSK modulated signal x _n ＝1-2c _n ，n∈[1,N]Zero mean variance σ ² Obtaining a received signal sequence Y = { Y) according to the Gaussian white noise channel _n |y _n ＝x _n +w _n ，n∈[1，N]In which w _n Is zero mean variance σ ² White gaussian noise signal, initial variable node v _n ,n∈[1,N]To check node s _m ,m∈[1,M]Outputting information

And obtaining a sequence C according to the symbol hard judgment of the signal in Y ⁰ Simultaneously initiating cumulative likelihood ratio data for each variable node

And starting iterative decoding when the iteration times t = 1;

the second step is that: and (3) updating information output of the check nodes and the variable nodes: each check node s _m Outputting information of variable nodes of the (k-1) th iteration

Calculating the t-th iteration node s according to the following formula _m To variable node v _n The information that is output is transmitted to the user,

each variable node v _n Outputting information in a participating verification mode

Add as variable node v _n To check node s _m The output of the computer is processed by the computer,

the third step: output of the t-th iteration: each variable node v _n All participating check nodes s _m Output of m ∈ A (n)

Adding as the total output of the variable nodes of the current iteration

The fourth step: according to each variable section of the current iterationOutput information of a dot

Making symbol hard judgment according to the following formula to obtain an output sequence C ^t ，

If the sequence satisfies all check equations, the iterative decoding result is used as the final decoding output

Meanwhile, the decoding of the frame is terminated, otherwise, if the current iteration time t does not reach the maximum iteration time, the iterative decoding is continued, the iteration time is increased by one, and the step is skipped to the second step;

for longer irregular LDPC codes, BP decoding can achieve performance close to the Shannon limit. However, in practical application, the system often adopts code blocks with medium and short lengths, and bipartite graphs corresponding to LDPC codes with limited lengths no longer have the gradual loop-free characteristic, so that BP decoding and Maximum Likelihood Decoding (MLD) decoding still have a large gap in the situation.

2.5 cumulative likelihood ratio-based LDPC code iterative sequencing statistical decoding method

The Ordered Statistics Decoding (OSD) method is also a soft decision decoding that was earlier applied to linear block codes, applicable to short codes with certain algebraic structures. For the LDPC code with a certain random structure, the length of which is usually over 100, OSD decoding cannot be performed in a high-order process, and therefore the error correction performance of the LDPC code also does not reach the performance of Maximum Likelihood Decoding (MLD). By using soft information output of iterative decoding and using OSD decoding with lower order to assist BP decoding, the error correction capability of the LDPC code can be obviously improved. Since the complexity of the OSD decoding method is proportional to N ² And the output soft information of each iteration is subjected to OSD decoding treatment, so that a lot of time delay is added to each iteration, and the high-speed decoding characteristic of the LDPC code is damaged. If OSD decoding is started in a certain iteration in the middle of BP decoding, the oscillation phenomenon exists in the soft information output by the current iterationThe performance gain obtained by OSD decoding is small. The accumulated likelihood ratio information is decoded by using the initial section of iteration, so that the oscillation phenomenon can be partially overcome, and the amplitude of the accumulated likelihood ratio is more effective reliability measurement information.

The OSD method for assisting BP decoding specifically comprises the following steps:

the first step is as follows: at the t-th output of iterative decoding, the total output of the variable nodes of the current iteration is

Accumulating the accumulated likelihood ratio output of each node until now according to the following formula, wherein the parameter alpha is more than or equal to 0 and less than or equal to 1 and is a weighting coefficient:

with different selection schemes of the parameter α, there are several different implementation forms: firstly, if alpha is not changed along with the change of iteration times t, the process of likelihood ratio accumulation is similar to the first-order IIR filtering processing of each iteration output likelihood ratio; secondly, if the parameter alpha is 1 or 0 all the time, the accumulation process is equivalent to completely adding the outputs or only selecting the current likelihood ratio output as the reliability sequencing basis; finally, if the iteration times of alpha in certain fixed intervals are zero, and alpha epsilon (0, 1) is satisfied in other times, the accumulation process is equivalent to FIR filtering processing of fixed orders on the output likelihood ratio among the iteration intervals;

the second step: outputting likelihood ratio obtained by iterative decoding as reliability information of each bit

As ordering basis for ordering statistical decoding according to the absolute value of reliability information

In the order from big to small, a sort pi is made for the corresponding columns of the nodes and the generating matrix ₁ To obtain a new node sequenceπ ₁ (V) sum generating matrix π ₁ (G)；

The third step: the new generator matrix is removed by Gaussian elimination, and due to the correlation characteristic between the generator matrix columns, the columns need to be rearranged for the second time by pi ₂ Finally, a new generator matrix is obtained

And node sequence

The fourth step: a node sequence pi ₂ (π ₁ (V)) the first N-K-L' nodes according to

Makes a hard decision on the symbol:

obtaining an information sequence

Traversing and turning the first N-K-L' information bit symbols with the order of s, namely selecting all possible 0-s bit combinations to share

Performing bit flipping to obtain P _s Information sequence

Respectively corresponding to the generated matrix

Multiplying to obtain a codeword

Rearranging for two more times to obtain all P _s A code word:

the fifth step: for is to

Using the initial received sequence Y and its hard decision sequence C ⁰ Comparing Euclidean distances, and reserving the code word with the minimum Euclidean distance as the output of the sequencing statistical decoding

Final decoded output

The LDPC code iterative sequencing statistical decoding method based on the accumulated likelihood ratio is to accumulate the output likelihood ratios of iterative decoding of fixed times and perform OSD decoding processing on the basis. In the BP iterative decoding process, the accumulation of the likelihood ratio and the OSD decoding process are completed at the same time, and no additional time delay is added. Based on several fixed OSD decoding of the cumulative likelihood ratio, the performance of BP decoding can be obviously improved.

The OSD decoding process can be extended from zero order to first, second and third orders, and as the order increases, the error correction performance gradually increases, and the OSD decoding complexity also increases at the order level. Under the condition of the limit of OSD decoding calculation amount allowed by the system, partial mixed-order OSD processing is carried out on nodes with different reliability degrees, and the method is a better compromise scheme between decoding performance and implementation complexity.

Disclosure of Invention

The technical problem is as follows: the invention aims to provide a partial cyclic redundancy check assisted sequencing statistical decoding method, which utilizes the LDPC code information bits to meet the cyclic redundancy check characteristic, carries out OSD decoding on the LDPC code after the iterative decoding is finished, wherein an inverse coding matrix is a combined matrix of a partial generation matrix of the cyclic redundancy check and a generation matrix of an LDPC system, and finishes OSD decoding with better performance under the condition of not increasing the time delay of the whole decoding of the system.

The technical scheme is as follows:

a partial cyclic redundancy check assisted sequencing statistical decoding method is characterized in that: the method specifically comprises the following steps:

systematic generator matrix G for defining low density parity check code _LDPC And system check matrix H _LDPC The corresponding set of bipartite graph variable nodes is V = { V = _n ,n∈[1,N]}; information sequence m = { m _k ,k∈[1,K]Comprises K-L bit information bits and L bit cyclic redundancy check bits, the generator polynomial of the L bit cyclic redundancy check is

Coding sequence C = { C _n ,n∈[1,N]And satisfies C = m · G _LDPC ；

Step 1, initialization: the generator polynomial of the L-bit cyclic redundancy check is expressed in the form of a generator matrix of (K-L) multiplied by K:

and (3) carrying out Gaussian elimination based on linear transformation on the generated matrix, converting the previous A = K-L column into a unit matrix, and obtaining a system form of the cyclic redundancy check generated matrix:

G' _CRC ＝[I _A×A |P _A×L ]；

the corresponding system form check matrix is:

the partial generator matrix using the L '(0. Ltoreq. L'. Ltoreq.L) bit cyclic redundancy check is:

wherein, A ' = K-L ', G ' _CRC Represented as a set of column vectors g ₁ ,g ₂ ,g ₃ ,…,g _K-1 ,g _K Is then P _A×L 'is G' _CRC The matrix consisting of the last L' columns, i.e. P _A×L ′＝{g _K-L′+1 ,g _K-L′+2 ,…,g _K-1 ,g _K }; then the a' × N joint generator matrix of the partial cyclic redundancy check and low density parity check code is:

G＝G″ _CRC ×G _LDPC ；

BPSK modulation signal x _n ＝1-2c _n ，n∈[1,N]Zero mean variance σ ² Obtaining a received signal sequence Y = { Y) according to the Gaussian white noise channel _n |y _n ＝x _n +w _n ，n∈[1,N]In which w _n Is zero mean variance σ ² The corresponding hard decision sequence is recorded as

Step 2, adopting an iterative decoding method based on belief propagation to the received signal sequence Y, such as a standard or corrected sum-product decoding method or a simplified minimum sum decoding method; the iteration times are recorded as t, and the likelihood ratio output of each variable node in each iteration is

Accumulating the accumulated likelihood ratio output up to now according to the following equation

Wherein the cumulative likelihood ratio is initially all zero, the parameter alpha, alpha is more than or equal to 0 and less than or equal to 1 is a preset weighting coefficient,

performing symbol hard judgment on the output information of each variable node of the current iteration according to the following formula to obtain an output sequence C ^t ：

If the sequence satisfies all check equations and the first K bits of the sequence satisfy cyclic redundancy check, that is:

wherein, theta is an all-zero vector; the iterative decoding result will be output as the final decoding

Simultaneously terminating the decoding of the frame; otherwise, if the current iteration time t does not reach the maximum iteration time t _max If yes, continuing iterative decoding, updating the output of the accumulated likelihood ratio, adding one to the iteration times, t + +, and repeating the step 2;

step 3, if the iterative decoding reaches the maximum iterative times t _max Then all check equations still can not be satisfied, and the likelihood ratio accumulated by each iteration in iterative decoding is utilized to output

As reliability information of each bit, according to the absolute value of the cumulative likelihood ratio at each node

In descending order, a sort pi is made for the nodes and the corresponding columns of the joint generating matrix ₁ To obtain a new node sequence pi ₁ (V) sum generating matrix π ₁ (G) (ii) a Gauss-canceling new generator matrix due to correlation between generator matrix columnsRequiring a second rearrangement of the columns by π ₂ And finally obtaining a new generating matrix:

and the corresponding node sequence pi ₂ (π ₁ (V)); will node sequence pi ₂ (π ₁ (V)) the first N-K-L' nodes according to

Makes a hard decision on the symbol:

obtaining an information sequence

Traversing and turning the first N-K-L' information bit symbols with the order of s, namely selecting all possible 0-s bit combinations to share

Bit flipping to obtain P _s A sequence of information

Respectively corresponding to the generated matrix

Multiplying to obtain a codeword

Rearranging for two more times to obtain all P _s Individual code words:

to pair

Using the initial received sequence Y and its hard decision sequence C ⁰ Comparing Euclidean distances, and reserving the code word with the minimum Euclidean distance as the output of the sequencing statistical decoding

For the first K bits of the output sequence, i.e. the information bit m _OSD And performing CRC check, namely:

H' _CRC m _OsD mod 2＝θ；

the final decoded output is satisfied as above

If not, outputting a decision error which can not finish decoding to the upper stage.

Has the advantages that: the beneficial effects of the invention are mainly embodied in the following aspects:

1) The cyclic redundancy check is divided into two parts of functions, one part of the cyclic redundancy check has the function of feeding back an error detection result to an upper-level system, and the other part of the cyclic redundancy check assists OSD error correction, so that the decoding performance is further improved.

2) The joint generation matrix of the cyclic redundancy check auxiliary and the LDPC can be determined in the initialization stage, and compared with the common OSD decoding, the method does not bring extra time delay and computational complexity.

3) Under the condition that BP iterative decoding can not obtain correct output, the performance of the original high-order OSD can be obtained by using CRC to assist low-order OSD decoding, the operation complexity caused by the high-order OSD is avoided, and the decoding performance is ensured.

Drawings

FIG. 1 (a) is a schematic diagram of the connection of check nodes and variable nodes;

FIG. 1 (b) is a schematic diagram of a variable node connected to a check node participating therein;

FIG. 1 (c) is a schematic diagram of a check node connected to a variable node contained therein;

FIG. 2 is a flowchart of a CRC-assisted iterative statistical sequencing decoding method;

FIG. 3 is a process flow diagram of an OSD decoding method;

FIG. 4 is a graph of frame error rate and decision error rate for a 5G defined BG-2 base matrix constructed 2/3 rate (360, 240) LDPC code, partially CRC assisted BP-OSD decoding, over an AWGN channel;

FIG. 5 is a graph of frame error rate and rate of false positives for a (180, 120) LDPC code under partial CRC assisted BP-OSD decoding and different order BP-OSD decoding.

All the symbols note:

CRC: cyclic redundancy check;

OSD: a sequencing statistical decoding method;

BP: a belief propagation decoding algorithm;

n: a total code block length of the LDPC code;

k: the information bit length of the LDPC code;

w: maximum iteration times of BP decoding;

r: code rate of the LDPC code;

l: total length of CRC;

l': a partial CRC length to assist decoding;

s: the order of the OSD;

v _n : an nth variable node;

s _m : the mth check node;

inversely coding the obtained code word;

code words obtained by twice rearrangement after inverse coding;

performing two times of sequencing and finishing the joint generation matrix of Gaussian elimination;

g: a joint generating matrix formed by a part of CRC generating matrix and LDPC generating matrix;

v: and (5) variable node collection.

Detailed Description

The invention is further described below with reference to the accompanying drawings:

the invention aims at providing a sorting statistical decoding method assisted by partial cyclic redundancy check, which is characterized in that for a low-density parity check code of which one information bit meets the cyclic redundancy check, a system generator matrix is formed according to a generator polynomial of the cyclic redundancy check, and the matrix is divided into two parts, wherein one part is used for detecting a decoding result, and the other part is used for assisting decoding; multiplying a part of CRC generating matrix of the auxiliary decoding by a generating matrix of the low-density parity check code to obtain a joint generating matrix; in the iterative decoding process, node reliability is defined according to the amplitude of the likelihood ratio accumulated value output by all variable nodes through iteration, the nodes and the columns of the joint generation matrix are sorted in a descending order according to the reliability, and the matrix after the column sorting is subjected to Gaussian elimination; combining a joint system generation matrix obtained by Gaussian elimination, and coding the sequenced reliable node information sequences to obtain a group of candidate code words; if the iterative decoding does not obtain the final output, selecting and receiving the code with the minimum sequence Euclidean distance from each group of candidate code words; performing CRC on the information bits of the code, and if the information bits of the code meet the CRC, outputting the code as decoding; otherwise, the decoding is judged to be failed. The error correction performance of the LDPC code is greatly enhanced while the CRC error detection function is kept.

Fig. 1 (a) is a diagram of a bipartite graph structure of an LDPC code, i.e., a connection diagram of check nodes and variable nodes, where the variable nodes and the check nodes are denoted as v and s, respectively. FIG. 1 (b) is a variable node v _n And the connection schematic of the check nodes participating in the check nodes and the likelihood ratio information transmitted between the nodes. FIG. 1 (c) shows a check node s _m Node connection schematic with variable contained therein, and nodeLikelihood ratio information of the transfer.

Fig. 2 is a flow chart of a partial CRC assisted BP-OSD decoding method. Calculating a joint generating matrix in advance according to the generating matrix of the LDPC code and the generating polynomial of the CRC, and initializing a coding sequence; after each BP decoding iteration, accumulating and storing likelihood ratios, judging whether a hard judgment sequence of a current result simultaneously meets a check matrix and CRC, if so, outputting the result, and otherwise, continuing to iterate until the iteration times reach a preset maximum value; and performing OSD decoding on the accumulated likelihood ratio, wherein the inverse coding matrix selects a pre-calculated joint generation matrix, and finally, the output of the OSD decoding is taken as an output result.

FIG. 3 is a diagram for sorting the input accumulated likelihood ratios, i.e., the reliability, in the order from high to low, and only the indexes may be sorted to save the storage and the computation amount; and performing Gaussian elimination on the sequenced joint generating matrix from left to right, if linearly related columns (namely all zero columns) appear, putting the columns and corresponding node values to the end of the matrix, sequentially shifting the rest columns forward by one bit, and finally obtaining the corresponding system generating matrix by the newly sequenced joint generating matrix. And (4) performing coding and Euclidean moment calculation by using the sequenced sequence and the generator matrix, and reserving the corresponding code word with the minimum Euclidean moment.

FIG. 4 is a graph of frame error rate performance and corresponding CRC error decision for a 5G defined BG-2 base matrix constructed 2/3 rate (360, 240) LDPC code, partially CRC assisted BP-OSD decoding under an AWGN channel. As can be seen from the figure, when the 16-bit CRC auxiliary decoding is selected, the performance is about 0.08dB better than that of the common first-order BP-OSD algorithm and about 0.2dB better than that of the common BP algorithm; meanwhile, the residual 8-bit CRC can judge the correctness of decoding and feed back to the upper level, and the omission factor is controlled within 1%.

FIG. 5 is a graph of the frame error rate performance of the partial CRC-assisted BP-OSD algorithm for a 2/3 rate (180, 120) LDPC code in an AWGN channel. As can be seen from comparison, at K =120, the 16-bit CRC-assisted 1 st BP-OSD decoding has a performance equivalent to that of the conventional 2 nd BP-OSD decoding, but the decoding efficiency of the former is much higher than that of the latter, for example, at 2.5dB, the 16-bit CRC-assisted 1 st BP-OSD decoding rate is about 5.6 ms/frame, and the decoding rate of the conventional 2 nd BP-OSD is about 55 ms/frame, which is nearly ten times higher.

The invention aims at the LDPC codes with 2/3 code rate (360, 240) and 2/3 code rate (180, 120) constructed by BG-2 base matrix defined in 5G protocol to implement partial CRC-assisted sequencing statistical decoding, taking the LDPC codes with 2/3 code rate (360, 240) as an example, each code word and decoding parameter are set as follows:

N＝360,K＝240,R＝2/3,W＝100,L＝24；

g(D)＝D ²⁴ +D ²³ +D ¹⁸ +D ¹⁷ +D ¹⁴ +D ⁿ +D ¹⁰

+D ⁷ +D ⁶ +D ⁵ +D ⁴ +D ³ +D+1；

according to the definition of the cyclic code, the generator polynomial of the CRC is converted into a generator matrix of 216 × 240 in size, and is cancelled into a systematic generator matrix by gaussian cancellation. Taking L' =16 as an example, the 16-bit CRC generation matrix is composed of a 224 × 224 unit matrix, an 8 × 8 all-zero matrix, and a 216 × 8 matrix P, where the matrix P is composed of the last 8 columns of the system generation matrix.

The 16-bit CRC generator matrix is multiplied by the LDPC system generator matrix of 240 × 360 in size to obtain a CRC-LDPC joint matrix, which is to be used as an inverse coding matrix of the OSD method.

The system adopts binary phase shift keying BPSK modulation to obtain a sending sequence, and the sending sequence is transmitted through an additive white Gaussian noise AWGN channel, and a receiving end demodulates the sending sequence to obtain a reliability sequence represented by a logarithmic natural ratio.

Adopting standard sum-product iterative (BP) decoding to the received sequence, judging whether the decoding is correct or not through an LDPC check matrix and a CRC check matrix, and if so, directly outputting the decoding; otherwise, OSD decoding is carried out.

The OSD decoding method is as described above, and the difference is only in the replacement of the inverse coding matrix. The OSD decoding output result still needs CRC check, the number of actually used check bits is only 24-16=8 bits, the check and error detection capability is reduced compared with the complete CRC-24, but the error rate can still reach below 1%, as shown by the dotted line in fig. 4 and 5. If the result can meet the CRC check, outputting a decoding result; otherwise, outputting decoding failure, requesting retransmission to the upper level, and the like.

The invention has the main innovation points that the error detection capability of the information bit CRC is reserved, and meanwhile, the error correction performance is improved; the adopted mode is not to use the CRC error detection capability to assist in judging and selecting codes, but uses a part of CRC matrixes and generator matrixes to multiply to generate a combined generator matrix to replace a reverse coding matrix in OSD decoding; from the experimental results, the decoding performance is improved without increasing the complexity of the system.

Claims (1)

1. A partial cyclic redundancy check assisted sequencing statistical decoding method is characterized in that: the method specifically comprises the following steps:

systematic generator matrix G for defining low density parity check code _LDPC And system check matrix H _LDPC The corresponding set of bipartite graph variable nodes is V = { V = _n ,n∈[1,N]}; information sequence m = { m _k ,k∈[1,K]Comprises K-L bit information bits and L bit cyclic redundancy check bits, the generator polynomial of the L bit cyclic redundancy check is

Coding sequence C = { C _n ,n∈[1,N]And satisfies C = m · G _LDPC ；

Step 1, initialization: the generator polynomial of the L-bit cyclic redundancy check is expressed in the form of a generator matrix of (K-L) multiplied by K:

and (3) carrying out Gaussian elimination based on linear transformation on the generated matrix, converting the previous A = K-L column into a unit matrix, and obtaining a system form of the cyclic redundancy check generated matrix:

G′ _CRC ＝[I _A×A |P _A×L ]；

the corresponding system form check matrix is:

the partial generator matrix using the L '(0. Ltoreq. L'. Ltoreq.L) bit cyclic redundancy check is:

wherein, A ' = K-L ', G ' _CRC Represented as a set of column vectors g ₁ ,g ₂ ,g ₃ ,…,g _K-1 ,g _K Is then P _A×L′ Is G' _CRC The matrix consisting of the last L' columns, i.e. P _A×L′ ＝{g _K-L′+1 ,g _K-L′+2 ,…,g _K-1 ,g _K }; then the a' × N joint generator matrix of the partial cyclic redundancy check and low density parity check code is:

G＝G″ _CRC ×G _LDPC ；

BPSK modulation signal x _n ＝1-2c _n ，n∈[1,N]Zero mean variance σ ² Obtaining a received signal sequence Y = { Y) according to the Gaussian white noise channel _n |y _n ＝x _n +w _n ，n∈[1,N]In which w _n Is zero mean variance σ ² The corresponding hard decision sequence is recorded as

Step 2, adopting an iterative decoding method based on belief propagation to the received signal sequence Y, such as a standard or corrected sum-product decoding method or a simplified minimum sum decoding method; the iteration times are recorded as t, and the likelihood ratio output of each variable node in each iteration is

Adding up to the previous accumulation according toProduct-likelihood ratio output

Wherein the cumulative likelihood ratio is initially all zero, the parameter alpha, alpha is more than or equal to 0 and less than or equal to 1 is a preset weighting coefficient,

performing symbol hard judgment on the output information of each variable node of the current iteration according to the following formula to obtain an output sequence C ^t ：

If the sequence satisfies all check equations and the first K bits of the sequence satisfy cyclic redundancy check, that is:

wherein, theta is an all-zero vector; the iterative decoding result will be the final decoding output

Simultaneously terminating the decoding of the frame; otherwise, if the current iteration time t does not reach the maximum iteration time t _max If yes, continuing iterative decoding, updating the output of the accumulated likelihood ratio, adding one to the iteration times, t + +, and repeating the step 2;

step 3, if the iterative decoding reaches the maximum iterative times t _max All check equations still can not be satisfied, and likelihood ratio output accumulated by each iteration in iterative decoding is utilized

As reliability information of each bit, according to the absolute value of the cumulative likelihood ratio at each node

In descending order, a sort pi is made for the nodes and the corresponding columns of the joint generating matrix ₁ To obtain a new node sequence pi ₁ (V) sum generating matrix π ₁ (G) (ii) a Gaussian elimination is carried out on a new generator matrix, and due to the correlation characteristic between generator matrix columns, a second-time column rearrangement of pi is required ₂ And finally obtaining a new generating matrix:

and the corresponding node sequence pi ₂ (π ₁ (V)); will node sequence pi ₂ (π ₁ (V)) the first N-K-L' nodes according to

Makes a hard decision on the symbol:

obtaining an information sequence

Traversing and turning the first N-K-L' information bit symbols with the order of s, namely selecting all possible 0-s bit combinations to share

Performing bit flipping to obtain P _s A sequence of information

Respectively corresponding to the generated matrix

Multiplying to obtain a codeword

Rearrangement twice to obtain all P _s Individual code words:

for is to

Using the initial received sequence Y and its hard decision sequence C ⁰ Comparing Euclidean distances, and reserving the code word with the minimum Euclidean distance as the output of the sequencing statistical decoding

For the first K bits of the output sequence, i.e. the information bit m _OSD Performing CRC check, namely:

H′ _CRC m _OSD mod 2＝θ；

the final decoding output is satisfied by the above formula

If not, outputting a decision error which can not finish decoding to the upper stage.

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