CN113055024B - Correction decoding method for short-block long-low-code-rate LDPC code of 5G-NR system - Google Patents
Correction decoding method for short-block long-low-code-rate LDPC code of 5G-NR system Download PDFInfo
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- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
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- H03M13/1128—Judging correct decoding and iterative stopping criteria other than syndrome check and upper limit for decoding iterations
Abstract
The invention relates to the technical field of decoding, in particular to a correction decoding method for a short block long low-code-rate LDPC code of a 5G-NR system, and provides a correction decoding method aiming at the layer-flattening problem of the decoding performance of the short block long low-code-rate LDPC code of the 5G-NR system. When the error code word output by the conventional iterative decoder, namely the Cyclic Redundancy Check (CRC) of the output information bit sequence is not satisfied, through a lookup table, a cyclic correction mode is used, namely the decoding bit at the specified position is overturned, the maximum repetition time is Z (the expansion factor of the LDPC code in a 5G-NR system), and the CRC detection is carried out on the overturning result every time, so that the output information bit sequence is satisfied. The method effectively reduces the decoding error floor of the short block long low-bit-rate LDPC code of the 5G-NR system under the condition of slightly increasing the algorithm complexity.
Description
Technical Field
The invention relates to the technical field of decoding, in particular to a correction decoding method for a short-block long-low-code-rate LDPC code of a 5G-NR system.
Background
LDPC codes, i.e., low-Density Parity-Check (LDPC) codes, have been a research hotspot for over 20 years because they have outstanding performance close to shannon limit. It was first proposed by Gallager in the last 60 s and was re-discovered by Mackey et al in the last 90 s after Turbo codes and iterative decoding appeared. Because the LDPC code decoding algorithm has the characteristics of low complexity, flexible structure, high-speed parallel decoding and the like, the LDPC code decoding algorithm is widely applied to the fields of storage, wiFi, wiMax, digital broadcast television, optical fiber communication, deep space communication and the like. In 2016, the LDPC code was adopted as a coding scheme for enhancing data services in a mobile broadband scenario by a fifth generation mobile communication technology.
The (N, K) LDPC code is a type of linear block code, and has a code length of N and a number of information bits of K. LDPC codes are described by a check matrix H of size M × N. Any code word of the LDPC code and the corresponding check matrix H are mutually in a zero space.
The prototype graph is a small bipartite graph composed of a variable node and a check node set, and the corresponding bilateral adjacency matrix is called a prototype graph matrix (base matrix) of code words and is counted as H b . Quasi-cyclic (QC) LDPC, which is commonly used in the industry, is one of the prototype graph codes. When primitive graph base matrix H b When each element in the LDPC code is replaced by a Z multiplied by Z cyclic shift matrix, an LDPC code of a QC structure is obtained, wherein shift parameters are generally called offset values, and therefore a plurality of offset value matrixes can be expanded. For a single run size M b ×N b The offset matrix of (2) is subjected to Z expansion to obtain an LDPC code check matrix H,the block array of the H matrix is a unit permutation array or a full zero array with the size of Z multiplied by Z. The 3GPP defines two prototype graph matrixes BG1 and BG2 of QC structure for the LDPC code, each prototype graph matrix is composed of a set of 8 offset value matrixes, and each offset value matrix supports a group of expansion factors.
Gallager introduces LDPC codes and gives two iterative decoding algorithms: hard decision and soft decision decoding algorithms. The hard decision decoding algorithm is the current bit flipping algorithm, and has low decoding complexity but poor performance. The soft decision decoding algorithm is mainly based on a belief propagation decoding algorithm proposed by MacKay and the like, the performance is superior to that of a bit flipping algorithm, but the complexity is high, and hardware is difficult to realize. On the basis of the above, a Normalized Minimum Sum (NMS) algorithm and an Offset Minimum Sum (OMS) algorithm are proposed, and a better compromise is achieved between decoding performance and computational complexity, wherein the NMS algorithm is most widely applied.
The error correction capability of LDPC codes is limited by the stop-set and trapping-set. When a special low-weight error pattern occurs, decoding errors may result.
3GPP defines two primitive graph matrixes BG1 and BG2 of QC structure for LDPC code, 16 rows in the middle of BG2 structure do not adopt quasi-orthogonal design similar to BG1, and short code length and low code rate scene can have better performance.
Disclosure of Invention
The invention aims to solve the technical problem that the error floor of the conventional iterative decoding method of the short block long low-bit-rate LDPC code of the 5G-NR system cannot meet the requirement of the communication system on the decoding performance, and provides a correction decoding method for the short block long low-bit-rate LDPC code of the 5G-NR system. The method is based on a conventional iterative decoding algorithm, and performs cyclic correction on error code words output by conventional iterative decoding, so that the error floor of the short-block long-low-code-rate LDPC code of the 5G-NR system is effectively reduced. In the aspect of complexity, the maximum repetition time of the cyclic correction algorithm is the expansion factor Z of the LDPC code of the 5G-NR system, and basically has no influence on the complexity of the whole algorithm under the condition of high signal-to-noise ratio of error floor.
The invention relates to a correction decoding method for a short block long low code rate LDPC code of a 5G-NR system, which carries out Cyclic Redundancy Check (CRC) on an output information bit sequence output by a conventional iterative decoder, when the CRC does not meet the requirement, the decoding bit at a specified position is overturned by using a cyclic correction mode through a lookup table, the maximum repetition time is Z, namely an expansion factor of the LDPC code, and the CRC is carried out on the overturning result every time, so that the information bit sequence is output. The method reduces the error floor of decoding under the condition of slightly increasing the complexity of the algorithm. The conventional iterative decoder includes a belief propagation algorithm and a min-sum algorithm.
The LDPC code of the 5G-NR system includes an M b ×N b Base check matrix H b And a spreading factor Z, the whole check matrix H is a binary matrix with M multiplied by N dimensions, M = M b xZ is the number of rows in the matrix, N = N b xZ is the number of matrix columns; number d of non-zero elements per row in the test matrix H c Representing row weights, i.e. the degree of check nodes, the number d of non-zero elements per column in the check matrix H s Representing the degree of column weight, namely variable nodes; v. of n Represents the nth variable node, c m Representing the mth check node.
Adding CRC coding bits with the length of 24 to the source message sequence before coding to form an information bit sequence, and recording the information bit sequence as c = [ c ] 1 ,c 2 ,…,c K ]K is the length of the information bit sequence; forming LDPC code words through LDPC coding, and marking as w = [ w 1 ,w 2 ,…,w N ]According to the basic check matrix H b Structure and spreading factor Z, LDPC coded codeword division into N b Sub-blocks of length Z, the sub-block number being 1,2 b (ii) a A (n) is a variable node v n Set of participating check nodes, B (m) check node c m A collection of contained variable nodes, B (m) \ n is a dividend node v n B (m) set of (1); l is nm 、L mn Are respectively variable nodes v n To check node c m Information and check nodes c m Information transferred to variable node vn; BPSK modulation is adopted, x = [ x1, x2, \ 8230;, xN]Wherein xn =1-2 xwn, n ∈ [1,N ]]Over an AWGN channel; receiving a sequence y = [ y1, y2, \8230;, yN]Where yn = xn + zn, n ∈ [1,n]And zn isAn independent gaussian random variable with a value of 0 and a variance of 2.
The maximum number of cyclic correction is Z, namely the expansion factor of the LDPC code; selecting L subblocks from Nb encoded subblocks, the selected subblock number set being p = { pn ∈ [0, \8230;, nb-1]N =1, 2.. Multidot.l., each subblock has one flip bit selected, and the set of starting positions of the L flip bits in the subblock is denoted as q = { qn e [0, \ 8230;, Z-1]N =1,2,. 1, L }; sign (x) denotes taking the sign bit for x,
the correction decoding method for the LDPC code with the short block length and the low code rate in the 5G-NR system specifically comprises the following steps:
s101, after the decoding of the conventional iterative decoder is finished, outputting the hard decision decoding generated by iteration, and sequentially executing the step S102, wherein an information bit sequence in a decoding result is marked as c'.
S102, CRC detection is carried out on the information sequence c' output by decoding: the information bit sequence c' is divided by the CRC coding polynomial, and if the division is complete, the CRC check is satisfied, and S105 is performed. The CRC detection is not satisfied because the CRC cannot be divided, and S103 is sequentially executed with the number of initialization cycles z =0.
S103, analyzing a basic check matrix of the BG2 code of the 5G protocol according to the theory of the stop set and the trapping set to obtain a BG2 code turning block and a turning bit table; looking up a table through an expansion factor Z of the LDPC code to obtain a sub-block sequence number set p of an LDPC code block where a bit to be turned is positioned and an initial position set q of the turning bit in the sub-block, and according to a formula
r n,z ＝p n ×Z+(q n + Z) mod Z +1 where p n ∈p，q n ∈q，n＝1,…,L
Wherein mod is a modular operation to obtain an actual bit position set r to be flipped z ＝{r n,z ∈[1,…,N]N =1, \ 8230;, L }, and in the decoded output information bit sequence c', the set r is based on the bit flip positions z Selecting corresponding bits to flip, forming a new decoding result c ", z = z +1, and sequentially performing step S104.
S104, performing CRC detection on the decoding result c' obtained by turning, if the CRC detection is met or the maximum cycle number Z is more than or equal to Z, terminating the decoding, sequentially executing the step S105, if the CRC detection is not met and the cycle number Z is less than Z, and returning to execute the step S103;
s105, ending the decoding and outputting the information bit sequence.
Has the advantages that:
1) Aiming at the problem that the error floor of the short block long low-bit-rate LDPC code of the 5G-NR system cannot meet the requirement of the communication system, the invention circularly corrects the information bit sequence obtained by conventional iterative decoding, and effectively reduces the error floor of the short block long low-bit-rate LDPC code of the 5G-NR system.
2) The invention aims at the error flat scene, namely only carries out the correction operation of limited cycle overturn on the high signal-to-noise ratio decoding process. The complexity of the whole algorithm is basically not influenced, and the realization complexity and the decoding performance are well balanced.
Drawings
FIG. 1 is a flow chart of the present invention.
FIG. 2 shows BG2-17-7-Z224 codes (N) b ＝17,M b =7,z = 224) NMS algorithm and correction algorithm simulation frame error rate graph.
FIG. 3 shows BG2-22-12-Z96 codes (N) b ＝22,M b =12,z = 96) NMS algorithm and correction algorithm simulation frame error rate graph.
Detailed Description
Specifically, as shown in fig. 1, the modified decoding method for the short-block long-low-bit-rate LDPC code of the 5G-NR system of the present invention includes the following steps:
s101, selecting an NMS algorithm in this embodiment, as a conventional iterative decoding algorithm.
S1011, iteratively initializing: initializing iteration times K =0, and setting the maximum iteration times as K _ MAX; for each variable node v n ，n∈[1,N](ii) a Initialization:
wherein β is a constant fixed multiplicative correction factor;
is the initial input approximate likelihood ratio information,
is a variable node to each connected check node c m (m ∈ A (n)) transmitted initial information.
S1012，k＝k+1。
S1013, updating check nodes: for each check node c m (m∈[1,M]) Using the information transferred from the corresponding variable node generated in the (k-1) th iteration
Updating the check node to the corresponding variable node v n (n ∈ B (m)) transmitted information
5bit uniform quantization treatment is carried out:
where α is a correction factor, and n' is a variable node set included in the check node cm except the variable node vn.
S1014, updates the output likelihood ratio information: for each variable node v n (n∈[1,N]) According to information conveyed from the corresponding check node
Initial input likelihood ratio information corresponding to the variable node
Calculate the variable node v n (n∈[1,N]) Output likelihood ratio information of
Carrying out 7-bit uniform quantization treatment:
s1015, hard decision of variable nodes: for each variable node v n (n∈[1,N]) Making hard decisions and calculating syndromes S k ：
S k ＝w k H T
S1016, if
Or K = K _ MAX, the decoding is finished, and the code word is output
Execution S1018); otherwise, S1017 is sequentially performed.
S1017, updating variable nodes: for each variable node v n (n∈[1,N]) Using a corresponding check node c m (m ∈ A (n)) transmitted information
And the variable node v calculated in step S104 n (n∈[1,N]) Output likelihood ratio information of
Calculating the variable node to the connected check nodes c m (m ∈ A (n)) transmitted information
After the calculation is completed, execution returns to S1012.
And S1018, outputting the hard decision decoding generated by iteration, and sequentially executing the step S102, wherein an information bit sequence in a decoding result is marked as c'.
S102, CRC detection: generator polynomial G for use in CRC coding 24 (x) Checking at GF (2)
rem(c 0 ×x K-1 +c 1 ×x K-2 +···+c K-1 ,G 24 (x))＝0
The information bit sequence c' in the decoding result is divided by the CRC coding polynomial, and if the division is complete, the CRC check is satisfied, and S105 is performed. The CRC detection is not satisfied because the CRC detection cannot be performed, the number of initialization cycles z =0, and step S103 is executed.
And S103, analyzing the basic check matrix of the BG2 code of the 5G protocol according to the theory of the stop set and the trapping set to obtain a BG2 code turning block and a turning bit table. Looking up a table through an expansion factor Z of the LDPC code to obtain a sub-block sequence number set p of an LDPC code block where a bit to be turned is positioned and an initial position set q of the turning bit in the sub-block, and according to a formula
r n,z ＝p n ×Z+(q n + Z) mod Z +1 where p n ∈p，q n ∈q，n＝1,…,L
Wherein mod is a modulo operation to obtain the actual set r of bit positions to be flipped z ＝{r n,z ∈[1,…,N]N =1, \ 8230;, L }, and in the decoded output information bit sequence c', the set r is based on the bit flip positions z Selecting corresponding bits to flip, forming a new decoding result c ", z = z +1, and sequentially performing step S104.
S104, performing CRC detection on the decoding result c' obtained by turning, stopping decoding when the CRC detection is met or the maximum cycle number Z is more than or equal to Z, sequentially executing the step S105, and returning to the step S103 when the CRC detection is not met and the cycle number Z is less than Z;
s105, ending the decoding and outputting the information bit sequence.
In the following, the present invention is further described with reference to the accompanying drawings, in this embodiment, BG2-17-7-224 codes and BG2-22-12-96 codes are selected as implementation objects, each element x in the BG2-17-7-224 codes and BG2-22-12-96 code basic check matrix represents a permutation matrix or a full zero matrix with a dimension Z × Z, and if the element is-1, the permutation matrix or the full zero matrix is the full zero matrix; otherwise, the unit array right cyclic shift array with the offset equal to x is adopted; and during simulation, the first 2Z coded bits need to be subjected to punching transmission processing after being coded according to a 5G protocol.
Fig. 2 is a frame error rate performance curve simulated by respectively adopting an NMS decoding algorithm and the modified decoding method for the short block long low rate LDPC code of the 5G-NR system described in the present invention for BG2-N17-M7-Z224 codes (Nb =17, mb =7, Z = 224). Table 1 shows a BG2-N17-M7-Z224 code basic check matrix, wherein the maximum iteration times of a decoder are all set to be 50 times; NMS correction factor β =0.875; adopting an AWGN channel for simulation; the first 448 bits punctured transmission; the correction method flips the block number and flips the bit number as shown in table 3.
TABLE 1, BG2-N17-M7-Z224 code base check matrix (Nb =17, mb =7, Z = 224)
| 72 | 110 | 23 | 181 | -1 | -1 | 95 | -1 | -1 | 8 | 1 | 0 | -1 | -1 | -1 | -1 | -1 |
| 53 | -1 | -1 | 156 | 115 | 156 | 115 | 200 | 29 | 31 | -1 | 0 | 0 | -1 | -1 | -1 | -1 |
| 152 | 131 | -1 | 46 | 191 | -1 | -1 | -1 | 91 | -1 | 0 | -1 | 0 | 0 | -1 | -1 | -1 |
| -1 | 185 | 6 | -1 | 36 | 124 | 124 | 110 | 156 | 133 | 1 | -1 | -1 | 0 | -1 | -1 | -1 |
| 200 | 16 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 101 | -1 | -1 | 0 | -1 | -1 |
| 185 | 138 | -1 | -1 | -1 | 170 | -1 | 219 | -1 | -1 | -1 | 193 | -1 | -1 | -1 | 0 | -1 |
| 123 | -1 | -1 | -1 | -1 | 55 | -1 | 31 | -1 | 222 | -1 | 209 | -1 | -1 | -1 | -1 | 0 |
Fig. 3 is a frame error rate performance curve simulated by respectively adopting an NMS decoding algorithm and the modified decoding method for the short block long low code rate LDPC code of the 5G-NR system described in the present invention for BG2-22-12-Z96 codes (Nb =22, mb =12, Z = 96). Wherein, the maximum iteration times of the decoder are all set to be 50 times; NMS correction factor β =0.875; simulating by adopting an AWGN channel; a first 192 bit punctured transmission; the sequence number of the turning block and the sequence number of the turning bit in the correction method are shown in table 3.
TABLE 2 BG2-N22-M12-Z96 code-based check matrix (N) b ＝22，M b ＝12，Z＝96)
| 78 | 1 | 70 | 66 | -1 | -1 | 71 | -1 | -1 | 76 | 0 | 0 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 |
| 27 | -1 | -1 | 36 | 48 | 92 | 31 | 91 | 89 | 3 | -1 | 0 | 0 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 |
| 25 | 18 | -1 | 21 | 14 | -1 | -1 | -1 | 18 | -1 | 1 | -1 | 0 | 0 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 |
| -1 | 40 | 79 | -1 | 17 | 72 | 27 | 22 | 28 | 90 | 0 | -1 | -1 | 0 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 |
| 72 | 74 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 29 | -1 | -1 | 0 | -1 | -1 | -1 | -1 | -1 | -1 | -1 |
| 10 | 44 | -1 | -1 | -1 | 25 | -1 | 80 | -1 | -1 | -1 | 48 | -1 | -1 | -1 | 0 | -1 | -1 | -1 | -1 | -1 | -1 |
| 33 | -1 | -1 | -1 | -1 | 92 | -1 | 4 | -1 | 49 | -1 | 88 | -1 | -1 | -1 | -1 | 0 | -1 | -1 | -1 | -1 | -1 |
| -1 | 80 | -1 | -1 | -1 | 90 | -1 | 16 | -1 | -1 | -1 | 6 | -1 | 47 | -1 | -1 | -1 | 0 | -1 | -1 | -1 | -1 |
| 22 | 70 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 56 | -1 | -1 | -1 | -1 | -1 | 0 | -1 | -1 | -1 |
| -1 | 28 | -1 | -1 | -1 | -1 | -1 | -1 | 36 | -1 | 89 | 82 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 0 | -1 | -1 |
| 59 | 8 | -1 | -1 | -1 | -1 | 22 | 52 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 0 | -1 |
| 32 | -1 | -1 | -1 | -1 | -1 | -1 | 92 | -1 | 78 | -1 | -1 | -1 | 58 | -1 | -1 | -1 | -1 | -1 | -1 | -1 | 0 |
TABLE 3 BG2 code flipping Block and flipping bits
As shown in FIG. 2 and FIG. 3, for BG2-N17-M7-Z224 codes, the error floor of the correction decoding method and NMS decoding method for the short block length low code rate LDPC code of the 5G-NR system is reduced to about 1/3; for BG2-22-12-Z96 codes, the error level of the correction decoding method and the NMS decoding method for the short block length low code rate LDPC codes of the 5G-NR system is reduced to about 1/8.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and amendments can be made without departing from the principle of the present invention, and these modifications and amendments should also be considered as the protection scope of the present invention.
Claims (2)
1. The correction decoding method for the LDPC code with the short block length and the low code rate in the 5G-NR system is characterized in that the LDPC code in the 5G-NR system comprises an M b ×N b Base check matrix H b And a spreading factor Z, the coding check matrix H being a binary matrix of dimension M × N, M = M b xZ is the number of rows in the matrix, N = N b xXZ is the number of matrix columns;
adding CRC coding bits with the length of 24 to the source message sequence before coding to form an information bit sequence, and recording the information bit sequence as c = [ c ] 1 ,c 2 ,…,c K ]K is the length of the information bit sequence; forming LDPC code words through LDPC coding, and recording as w = [ w = 1 ,w 2 ,…w n …,w N ]According to the basic check matrix H b Structure and spreading factor Z, LDPC coded codeword division into N b Sub-blocks of length Z with serial number of 1,2 b (ii) a Using BPSK modulation, x = [ x ] 1 ,x 2 ,…x n …,x N ]Wherein x is n ＝1–2×w n ,n∈[1,N]Over an AWGN channel; reception sequence y = [ y ] 1 ,y 2 ,…y n …,y N ]Wherein y is n ＝x n +z n ，n∈[1,N]，z n Is a mean of 0 and a variance of σ 2 Independent gaussian random variables of (a); the maximum number of times of cyclic correction is Z, namely the expansion factor of the LDPC code; in N b L subblocks are selected from the coding subblocks, and the selected subblock number set is marked as p = { p = n ∈[0,…,N b -1]N =1, 2.,. L }, one flip bit per subblock being selected, the L flip bits having a set of starting positions q = { q } within the subblock n ∈[0,…,Z-1],n＝1,2,...,L}；
The correction decoding method for the LDPC code with the short block length and the low code rate of the 5G-NR system specifically comprises the following steps:
s101, after the decoding of the conventional iterative decoder is finished, outputting the hard decision decoding generated by iteration, and sequentially executing the step S102, wherein an information bit sequence in a decoding result is marked as c';
s102, CRC detection is carried out on the decoded output information sequence c': dividing the information bit sequence c 'by a CRC coding polynomial, if the information bit sequence c' can be divided completely, the CRC detection is satisfied, and S105 is executed; the method comprises the following steps that (1) the data cannot be evenly divided, CRC detection is not met, the number of initialization circulation times z =0, and S103 is sequentially executed;
s103, analyzing a basic check matrix of the BG2 code of the 5G protocol according to the theory of the stop set and the trapping set to obtain a BG2 code turning block and a turning bit table; looking up a table through an expansion factor Z of the LDPC code to obtain a sub-block sequence number set p of the LDPC code block where the bit to be turned is positioned and an initial position set q of the turning bit in the sub-block, and according to a formula
r n,z ＝p n ×Z+(q n + Z) mod Z +1 where p n ∈p，q n ∈q，n＝1,…,L
Wherein mod is a modular operation to obtain an actual bit position set r to be flipped z ＝{r n,z ∈[1,…,N]N =1, \8230;, L }, and in the information bit sequence c' output by decoding, the set r is set according to the bit flip positions z Selecting corresponding bits to invert to form a new decoding result c ", z = z +1, and sequentially executing step S104;
s104, performing CRC detection on the decoding result c' obtained by turning, if the CRC detection is met or the maximum cycle number Z is more than or equal to Z, terminating the decoding, sequentially executing the step S105, if the CRC detection is not met and the cycle number Z is less than Z, returning to execute the step S103;
s105, ending the decoding and outputting the information bit sequence.
2. The modified decoding method of 5G-NR system short-block long-low-rate LDPC code according to claim 1, wherein the regular iterative decoder comprises a belief propagation algorithm and a minimum sum algorithm.
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