CN109979803B - Transverse ordered GaN (gallium nitride) micron line array and preparation method thereof - Google Patents
Transverse ordered GaN (gallium nitride) micron line array and preparation method thereof Download PDFInfo
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Abstract
The invention discloses a transverse ordered GaN microwire array, which comprises: the GaN nanowire array comprises a substrate (1) and a GaN nanowire array, wherein the included angle between the axial direction of the GaN nanowire (4) and the plane where the substrate (1) is located is not more than 15 degrees, and the preparation method comprises the following steps: (A) forming a mask layer (2) on a substrate (1); (B) etching the mask layer (2) to form a pattern, and etching the pattern to form a groove; (C) and growing a transverse ordered GaN micron line array in the groove. The invention utilizes the heteroepitaxial characteristics of GaN materials on different crystal faces of silicon and prepares a transversely ordered GaN micron line array on a silicon pattern substrate on the premise of not introducing any catalyst. The method can prepare crystals with high quality and large aspect ratio, and the characteristics of density, size and the like are flexible and adjustable.
Description
Technical Field
The invention belongs to the technical field of semiconductor materials, and particularly relates to a transverse ordered GaN nanowire array and a preparation method thereof.
Background
Due to the difficulty of heteroepitaxy, most of GaN micro-nanowires reported at present are micro-nanowire arrays perpendicular to the substrate surface or disordered micro-nanowire networks, and have limitations in the aspect of practical application. On one hand, although bottom electrical contact can be solved by adopting a conductive substrate when a device is manufactured, the micro-nano structure with the three-dimensional structure cannot provide a plane for bearing a film electrode at the top, so that the problem that the process flow is incompatible with the traditional device planarization process flow needs to be solved when the device is manufactured. Moreover, the nanowire prepared by the micro-etching technology inevitably depends on the existing etching technology and process, and the precise control of the diameter, length and other dimensions of the nanowire is difficult to realize, so that the problems of nonuniform radial dimension, limited aspect ratio, degraded crystal quality and the like of the nanowire exist. On the other hand, the micro-nano structure which grows disorderly and is stacked has larger randomness, is difficult to realize accurate and flexible control, and a subsequent complex technology of aligning the rows of the micro-nano structure into a transverse array is often needed when a function integrated device is constructed. However, these techniques are often complicated, inefficient, and of poor utility. Moreover, due to the introduction of the heterogeneous catalyst metal material, atoms of the heterogeneous material inevitably diffuse in the growth process, the purity of the micro-nano wire is damaged, and the performance of the micro-nano wire and devices thereof is influenced. Therefore, the GaN micro-nano wire can be transversely and controllably grown in order, the preparation process of the micro-nano device can be compatible with the process of the traditional planar device, an important idea can be provided for solving the practical application problem of the GaN-based micro-nano wire device, and the GaN micro-nano wire device has potential application in practical integrated micro-nano material photoelectric devices.
Disclosure of Invention
In view of the problems of the prior art, it is an object of the present invention to provide a laterally ordered array of GaN nanowires. The micron line array can be used for manufacturing micro-nano devices, is compatible with the traditional planar device process, and can solve the practical application problem of the GaN-based micro-nano device.
The invention also aims to provide the preparation method of the transverse ordered GaN nanowire array, which is simple and easy to operate, and the prepared GaN nanowire array crystal has high quality, is periodically and transversely ordered arranged on the substrate surface, and can realize large-area preparation.
The invention adopts the following technical scheme:
a laterally ordered GaN microwire array, comprising: the array of GaN microwires includes a substrate and an array of GaN microwires, the GaN microwire having an axial direction that makes an angle with the plane in which the substrate 1 lies of no more than 15 °, preferably no more than 10 °, more preferably no more than 5 °, for example, 1 °, 2 °, 3 °, 4 °. More preferably, the GaN microwire has an axis parallel to the plane of the substrate.
The term "lateral" as used herein refers to an axial direction of the array of microwires parallel or substantially parallel to the plane in which the substrate lies. By "substantially parallel" it is meant that the axis of the array of microwires (in the direction of the microwires) is at an angle of no more than 15 ° to the plane of the substrate.
Furthermore, the cross section of the upper part of the single GaN micron line is triangular, and the cross section of the lower part of the GaN micron line is two triangles. The upper and lower portions of the single GaN microwire are bonded together or grown together.
Further, the side length of the bottom side of the triangle of the cross section of the upper part of the single GaN micron line is equal to the sum of the side lengths of the two triangles of the cross section of the lower part of the GaN micron line in contact with the upper part of the triangle.
Further, the preparation method of the transverse ordered GaN micron line array comprises the following steps:
(A) forming a mask layer on a substrate;
(B) etching the mask layer to form a pattern, and etching the pattern to form a groove;
(C) and growing a transversely ordered GaN micron line array in the groove.
Further, in the step (B), a pattern is formed on the mask layer by photolithography, and a groove is formed by wet etching of the pattern.
Further, the pattern is a stripe pattern (or a stripe pattern), and the cross section of the groove is in an inverted trapezoid shape. Preferably, the trapezoid is an isosceles trapezoid. Optionally, the depth of the groove is 200-1000nm, optionally 300-800nm, such as 400nm, 500nm, 600 nm.
Further, the grooves are etched by a wet chemical solution, and the chemical solution can be at least one of a KOH (30-50 wt%, for example, 40 wt%) aqueous solution and a NaOH (30-50 wt%, for example, 40 wt%) aqueous solution.
Further, the process of forming the mask layer may be that the mask layer is prepared on the substrate by using PECVD, after acetone, isopropanol and deionized water are respectively ultrasonically cleaned in sequence, the substrate is dried by using nitrogen, and then the substrate plated with the mask is baked on a 100-plus-150 ℃ hot bench;
further, the step of forming a pattern substrate (patterned substrate):
and (3) photoetching process: and (3) placing the cleaned substrate in a spin coater, sucking a sufficient amount of photoresist by using a liquid-transferring gun, dripping the photoresist on the substrate, and standing for 5-10s until the photoresist is completely spread. After a substrate is placed on a spin coater, setting spin coater parameters before photoresist is dropped, wherein the spin coater parameters are set as follows: the rotating speed and time of the low speed and the high speed can be respectively set to be 600r/min, 12s, 4000r/min and 50 s;
taking down the substrate with the uniform glue, placing the substrate on a hot table at the temperature of 80-120 ℃, and pre-drying for 10-20 min;
taking down the baked substrate, and placing the substrate in an ultraviolet exposure machine for exposure, wherein the exposure parameters can be as follows: the ultraviolet power is 5-15mW, and the exposure time is 10-20 s;
soaking the exposed substrate in a developing solution, and developing for 1-5 min;
taking out the substrate, placing on a hot table at 100 ℃, and hardening for 10-20 min;
preparing a standard BOE (buffered oxide etching solution) solution, and immersing the baked substrate in the BOE solution for 1-5 min.
Taking out the substrate, putting the substrate into acetone solution, and ultrasonically cleaning for 3-10min to remove the photoresist.
And (3) placing the substrate in an anisotropic etching solution, wherein the etching solution can be 40 wt% of KOH aqueous solution, keeping the temperature at 30-50 ℃, and performing ultrasonic treatment to obtain a groove pattern with an inverted trapezoid cross section and a depth of 500 nm.
Further, by adopting an epitaxial growth process, transversely ordered triangular GaN nanowire arrays are grown on two side walls of the inverted trapezoidal grooves. Specifically, the epitaxial growth process is a metal organic vapor phase epitaxy process, and a molecular beam epitaxy process can be selected. More specifically, in the epitaxial growth process, a silicon pattern groove two-side-wall triangular GaN micron line array growth process is adopted. "triangle" means that the cross-section of the GaN microwire is triangular.
Further, by adopting an epitaxial growth process, the transversely ordered triangular GaN nanowire arrays grown on the two side walls of the inverted trapezoidal groove are combined to obtain the combined GaN nanowire array. Optionally, the shape and size of the transverse ordered triangular GaN micrometer line arrays grown on the two side walls of the groove are the same, the groove is in an isosceles inverted trapezoid shape, and the transverse ordered triangular GaN micrometer line arrays grown on the two side walls are combined to form a GaN micrometer line array with a triangular shape at the top. Specifically, the epitaxial growth process is a metal organic vapor phase epitaxy process, and a molecular beam epitaxy process can be selected. More specifically, in the epitaxial growth process, a growth process is performed in which triangular GaN microwires on both side walls of a groove are merged at the top of one corner point (a point where the triangles on both sides of the groove are close (or connected or closest)).
Placing the etched pattern substrate in acetone, isopropanol and deionized water, sequentially ultrasonically cleaning, blowing to dry by using a nitrogen gun, loading into an MOCVD reaction chamber, and setting an MOCVD growth menu, wherein trimethyl gallium (TMGa), trimethyl aluminum (TMAl) and ammonia (NH) are added in the growth process3) Respectively as a gallium source, an aluminum source and a nitrogen source, and nitrogen as a carrier gas;
the process of growing the lower part of the GaN micron line: (a) depositing an AlN insert layer with the thickness of 30-80nm on the substrate at the temperature of 800-850 ℃; (b) then growing GaN micron line array, TMGa and NH under high pressure (300-3The flow rates are respectively 40-80sccm and 2000-3500sccmThe process is to grow triangular micron lines, and the radial growth rate is high;
then, adjusting growth parameters, and growing the upper part of the GaN microwire: reducing the pressure in the reaction chamber to normal pressure, TMGa and NH3The flow rate is adjusted to 20-30sccm and 4000-6000sccm, the temperature of the reaction chamber is raised to 1080-1150 ℃, so that the GaN microwire array is combined at the top (the combination means that the upper part of the GaN microwire is grown on the lower part of the GaN microwire and the upper part and the lower part are combined together), the pressure of the reaction chamber is reduced in the process, the ratio of TMGa/NH3 is increased, the transverse growth can be promoted, and the GaN microwire array is finally combined.
Further, the width of the stripe pattern is 1-20 μm, and the length is 10-30000 μm.
Further, the pitch between the stripe patterns is 1 to 20 μm.
After the pattern is formed on the mask layer by photoetching, the stripe pattern is formed by spacing the mask and the substrate, the stripe spacing distance (at the time of alternately spacing the mask and the substrate) can be selected to be 3 mu m/5 mu m, 3 mu m/10 mu m or 5 mu m/10 mu m, and the stripe length can be selected to be 10-30000 mu m and can be adjusted. The individual mask stripes and the individual substrate stripes may have widths of 3 μm, 5 μm, alternatively 3 μm, 10 μm, or 5 μm, 10 μm, respectively. Or the single mask stripe and the single substrate stripe may have the same width.
Further, the substrate is an n-type (100) or p-type (100) silicon substrate, the resistivity is 5-1000 Ω -cm, and the thickness is 300-430 μm (for example, 350 μm); the mask layer is a silicon oxide mask layer with a thickness of 100-300nm (e.g. 200 nm).
Further, the stripe pattern is formed by spacing silicon and silicon oxide, and the distance between stripes is selected to be 3 μm/5 μm, 3 μm/10 μm or 5 μm/10 μm.
Further, the photolithographic process forms Si and SiO2The Si stripes without the mask on the patterns formed by the spacing are etched down by the subsequent alkaline solution wet etching, and grooves with inverted trapezoidal sections are formed due to the anisotropic etching of Si under an alkaline system and relative to the crystal orientation.
A transverse ordered GaN micron line array is prepared by the preparation method. Specifically, the array comprises a silicon substrate and a mask on the substrate, stripe patterns are formed on the mask through photoetching, inverted trapezoidal groove arrays are formed through wet etching of the stripe patterns, transverse ordered GaN microwires grow on two side walls of the inverted trapezoidal grooves, a single microwire in the transverse ordered GaN microwire arrays is formed by combining two microwires with triangular cross sections, and the tops of the transverse ordered GaN microwire arrays are in triangular cross section shapes.
Further, the ordered array of microwire wires is horizontally grown on the substrate surface.
Optionally, the laterally ordered GaN nanowire array is grown on two sidewalls of the patterned silicon substrate with the inverted trapezoidal groove.
Optionally, the transverse ordered GaN microwire array is formed by merging microwires with triangular cross-sectional shapes on two side walls.
Furthermore, the top of the transverse ordered GaN micron line array is in a triangular shape.
Compared with the prior art, the invention has the beneficial effects that:
(1) the method combines wet chemical etching and MOCVD (metal organic chemical vapor deposition) technology, utilizes the heteroepitaxial characteristics of GaN materials on different crystal faces of silicon, and prepares the GaN micron line array with horizontal order on the silicon pattern substrate on the premise of not introducing any catalyst. The method can prepare crystals with high quality and large aspect ratio, and the characteristics of density, size and the like are flexible and adjustable;
(2) the GaN micron-sized wire array prepared by the method is transversely ordered in the substrate surface and serves as a core material of a micro-nano device, the device preparation process is compatible with the traditional planar device process, the difficult problem that the GaN-based micro-nano device is difficult to apply in practice can be solved, and the GaN micron-sized wire array has potential application in practical integrated micro-nano material photoelectric devices.
Drawings
FIG. 1 is a schematic representation of an array of laterally ordered GaN microwires of the invention (only the lower portion has been grown);
FIG. 2 is a schematic representation of an array of laterally ordered GaN micro-wires of the invention (after growth of the upper portion);
FIG. 3 is an SEM cross-sectional view of an array of laterally ordered GaN microwires of the invention;
FIG. 4 is a SEM top view of an array of laterally ordered GaN microwires of the invention.
Detailed Description
For better explanation of the present invention, the following specific examples are further illustrated, but the present invention is not limited to the specific examples.
Example 1
A transversely ordered GaN nanowire array is prepared by the following steps:
(1) preparing a 150nm silicon oxide mask layer on an n-type (100) silicon (with the resistivity of 1000 omega cm) substrate by utilizing PECVD (plasma enhanced chemical vapor deposition), respectively ultrasonically cleaning for 5 minutes in sequence by using acetone, isopropanol and deionized water, blow-drying by using nitrogen, and then baking the silicon substrate plated with the silicon oxide mask for 5 minutes at a 120 ℃ hot stage;
placing the cleaned silicon substrate in a spin coater, wherein the parameters of the spin coater are as follows: the rotating speed and time of the low speed and the high speed are respectively set to be 600r/min, 12s, 4000r/min and 50 s; and sucking a sufficient amount of photoresist by using a liquid transfer gun, dripping the photoresist on the silicon substrate, and standing for 5-10s until the photoresist is completely spread.
Taking down the silicon substrate with the uniform glue, placing the silicon substrate on a heating table at 100 ℃, and pre-baking for 30 min;
taking down the baked silicon substrate, and placing the silicon substrate in an ultraviolet exposure machine for exposure, wherein the exposure parameters are as follows: the ultraviolet power is 9mW, and the exposure time is 13 s;
soaking the exposed silicon substrate in a developing solution, and developing for 3 min;
taking out the silicon substrate, placing on a hot table at 100 ℃, and hardening for 15 min;
and preparing a standard BOE (buffered oxide etching solution) solution, and immersing the baked silicon substrate in the BOE solution for 3 min.
(2) Taking out the silicon substrate, putting the silicon substrate into an acetone solution, carrying out ultrasonic cleaning for 5min, removing the photoresist, and obtaining a stripe pattern which is formed by silicon and silicon oxide at intervals and along the silicon < -110> direction on the surface of the silicon substrate;
and (3) placing the silicon substrate in an anisotropic etching solution, wherein the etching solution is 40 wt% KOH aqueous solution, maintaining the temperature at 40 ℃, and performing ultrasonic treatment for 5min to obtain a groove pattern with an inverted trapezoid cross section and a depth of 500 nm.
(3) Placing the etched silicon pattern substrate in acetone, isopropanol and deionized water, sequentially carrying out ultrasonic cleaning for 5min respectively, blow-drying by using a nitrogen gun, and loading into an MOCVD reaction chamber;
setting an MOCVD growth menu, and during the growth process, trimethyl gallium (TMGa), trimethyl aluminum (TMAl) and ammonia gas (NH)3) Respectively as a gallium source, an aluminum source and a nitrogen source, and nitrogen as a carrier gas. Firstly, growing a GaN micron line array with a triangular section appearance, and adopting a two-step growth method: (a) depositing a layer of 50nm AlN insert layer on the substrate at 820 ℃; (b) subsequently growing arrays of GaN nanowire, TMGa and NH at high pressure (400mbar), high temperature (1030 deg.C)3The flow rates are 50sccm and 3000sccm respectively;
then, the growth parameters are adjusted to reduce the pressure of the reaction chamber to normal pressure, TMGa and NH3The flow was adjusted to 25sccm and 5000sccm and the chamber temperature was raised to 1100 ℃ to merge the GaN microwire array on top.
Referring to the drawings in combination, FIG. 1 shows a lower portion 3 of a GaN microwire 4 obtained on a patterned substrate composed of a silicon substrate 1 and a silicon oxide mask layer 2; fig. 2 shows that the upper part of the GaN microwire 4 is grown on its lower part 3 and the upper and lower parts are bonded together, resulting in a microwire array.
The SEM photographs shown in fig. 3 and 4 are a cross-sectional view and a top view, respectively, of the prepared laterally ordered GaN microwire array.
Example 2
This example prepared laterally ordered arrays of GaN nanowires using a procedure similar to that of example 1.
(1) Forming a mask layer on a substrate, wherein a p-type (100) silicon (with the resistivity of 1000 omega cm) substrate is selected;
(2) etching a pattern on the mask layer to form a groove, wherein the section of the groove is an isosceles inverted trapezoid, and the depth of the groove is 600 nm;
(3) growing a transversely ordered GaN micrometer wire array in the groove, wherein an MOCVD growth menu is arranged, and trimethyl gallium (TMGa), trimethyl aluminum (TMAl) and ammonia are added in the growth processGas (NH)3) Respectively as a gallium source, an aluminum source and a nitrogen source, and nitrogen as a carrier gas. Firstly, growing a GaN micron line array with a triangular section appearance, and adopting a two-step growth method: (a) depositing a 40nm AlN insert layer on the substrate at 800 ℃; (b) subsequently growing arrays of GaN nanowires, TMGa and NH, at high pressure (350mbar), high temperature (1000 ℃ C.)3The flow rates are 40sccm and 2500sccm respectively;
then, the growth parameters are adjusted to reduce the pressure of the reaction chamber to normal pressure, TMGa and NH3The flow was adjusted to 20sccm and 4000sccm, the chamber temperature was raised to 1080 ℃ to merge the GaN microwire array at the top.
Example 3
This example prepared laterally ordered arrays of GaN nanowires using a procedure similar to that of example 1.
(1) Forming a mask layer on a substrate, wherein an n-type (100) silicon (with the resistivity of 1000 omega cm) substrate is selected;
(2) etching a pattern on the mask layer to form a groove, wherein the section of the groove is an isosceles inverted trapezoid, and the depth of the groove is 400 nm;
(3) growing a GaN micrometer line array in the groove, setting MOCVD growth menu, and growing trimethyl gallium (TMGa), trimethyl aluminum (TMAl) and ammonia (NH)3) Respectively as a gallium source, an aluminum source and a nitrogen source, and nitrogen as a carrier gas. Firstly, growing a GaN micron line array with a triangular section appearance, and adopting a two-step growth method: (a) depositing a 60nm AlN insert layer on the substrate at 850 deg.C; (b) subsequently growing arrays of GaN nanowire, TMGa and NH at high pressure (450mbar), high temperature (1050 ℃ C.)3The flow rates are 60sccm and 3500sccm respectively;
then, the growth parameters are adjusted to reduce the pressure of the reaction chamber to normal pressure, TMGa and NH3The flow rate was adjusted to 30sccm and 5500sccm, and the chamber temperature was raised to 1120 ℃ to merge the GaN microwire array on top.
The above description is only exemplary of the present invention and is not intended to limit the scope of the present invention, which is defined by the claims appended hereto, as well as the appended claims.
Claims (1)
1. A method for preparing a transverse ordered GaN nanowire array is characterized by comprising the following steps:
(A) forming a mask layer (2) on a substrate (1);
(B) etching the mask layer (2) to form a pattern, and etching the pattern to form a groove;
(C) growing a transverse ordered GaN micron line array in the groove;
the photoetching process comprises the following steps:
(i) homogenizing the substrate (1) with the mask layer (2) by a homogenizing machine, and then drying for 10-20min at 80-120 ℃;
(ii) placing the mixture in an ultraviolet exposure machine for exposure, wherein the exposure parameters are as follows: the ultraviolet power is 5-15mW, and the exposure time is 10-20 s;
(iii) soaking in developer solution, and developing for 1-5 min; taking out, and hardening at 90-110 deg.C for 10-20 min;
(iv) then immersing the substrate in BOE solution for 1-5min, taking out and cleaning for 3-10min, and removing the photoresist;
the lower part (3) of a GaN micron line (4) is grown on two side walls of the inverted trapezoidal groove by adopting an epitaxial growth process, wherein trimethyl gallium, trimethyl aluminum and ammonia are respectively used as a gallium source, an aluminum source and a nitrogen source, and nitrogen is used as a carrier gas; process for growing the lower part (3) of the GaN microwire (4): (a) depositing an AlN insert layer of 30-80nm on the substrate (1) at 800-; (b) then growing a GaN micron line array under the pressure of 300-;
next, a process of growing the upper portion of the GaN microwire (4): reducing the pressure of the reaction chamber to normal pressure, respectively adjusting the flow rates of trimethyl gallium and ammonia gas to 20-30sccm and 4000-6000sccm, raising the temperature of the reaction chamber to 1080-1150 ℃, and growing the upper part of the GaN micron line (4) on the lower part (3) of the GaN micron line (4) and combining the GaN micron line and the ammonia gas together;
in the step (B), photoetching is carried out on the mask layer (2) to form a pattern, and the pattern is etched by a wet method to form a groove;
the pattern is a strip pattern, and the section of the groove is in an inverted trapezoid shape;
the GaN nanowire array comprises a substrate (1) and a GaN nanowire array, wherein the included angle between the axial direction of the GaN nanowire (4) and the plane where the substrate (1) is located is not more than 5 degrees;
the section of the upper part of the single GaN micron line (4) is triangular, the section of the lower part (3) of the GaN micron line (4) is two triangles, the upper part and the lower part of the single GaN micron line (4) are combined together or grow together, and the side length of the bottom side of the section triangle at the upper part of the single GaN micron line is equal to the sum of the side lengths of the two triangles of the section at the lower part of the GaN micron line and the contact of the upper part of the two triangles;
the width of the strip pattern is 1-20 μm, and the length is 10-30000 μm;
the distance between the bar patterns is 1-20 μm;
the substrate (1) is an n-type (100) or p-type (100) silicon substrate, the resistivity is 5-1000 omega-cm, and the thickness is 300-430 mu m; the mask layer (2) is a silicon oxide mask layer with the thickness of 100-300 nm.
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