CN109975680A - The source VI measurement data acquisition display methods - Google Patents
The source VI measurement data acquisition display methods Download PDFInfo
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- CN109975680A CN109975680A CN201910114607.5A CN201910114607A CN109975680A CN 109975680 A CN109975680 A CN 109975680A CN 201910114607 A CN201910114607 A CN 201910114607A CN 109975680 A CN109975680 A CN 109975680A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
- G01R31/2603—Apparatus or methods therefor for curve tracing of semiconductor characteristics, e.g. on oscilloscope
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- Tests Of Electronic Circuits (AREA)
Abstract
The present invention relates to a kind of source VI measurement data acquisition display methods, solve the deficiencies in the prior art, its technical solution is suitable for the end PC configured with PCI_E high-speed interface card, the end PC is connect by PCI_E high-speed interface card with fpga chip, the fpga chip obtains the source the VI measurement data of hardware resource board by AD sample circuit, the following steps are included: step 1, the data that AD sample circuit acquires are transmitted to the end PC by PCI_E high-speed interface card by fpga chip;Step 2, the end PC process data into patterned way and are shown, and provide visualized operation mode and check analysis data for user.
Description
Technical field
The present invention relates to semiconductor test technical fields, more particularly, to a kind of source VI measurement data acquisition display methods.
Background technique
In semiconductor test field, for the measurement under a certain specified conditions of circuit, the scheme of most manufacturers is all
It is to be taken multiple measurements under equal conditions, and sample these test results, then calculates according to special algorithm and handle these surveys
Test result, the value after the final calculating are the data result for being used as this measurement of test macro.
Above-mentioned final measurement, each test machine can be supplied to user in different ways and check, use and save.
But for before algorithm process multiple repairing weld obtain initial data, at present save, in terms of or there are many not
Foot place.
Check the pilot process of measurement if necessary, each manufacturer be generally taken through hardware interface card (such as PCI_E or
RJ45 interface), the collected process data of test system hardware board is transferred to the end PC application program, is then applied by the end PC
Program serves data to user by user interface function, or data is deposited into specified text by reading and writing of files operation
Use is checked for user in part.
But there are the followings to be difficult to the shortcomings that overcoming for such mode.One is the process for entirely obtaining data is complicated,
Need the place of user's operation (programming) very much, ease for use is bad;The second is the data got are not intuitive enough, it is all using one
The mode of a data shows and records, and when the amount of data is large, checks that data can be time-consuming and laborious;The third is different batches
The comparing of measurement is difficult, without effective intuitive alignments, if necessary to graphic software platform data and associated change trend,
It generally requires by third party's tool software (such as excel of Microsoft) Lai Jinhang.
Summary of the invention
There is the complexity for measurement process data acquisition acquisition modes for the above-mentioned prior art, and in data
Intuitive to show deficiency existing for aspect, the present invention provides a kind of source VI measurement data acquisition display methods.
In order to solve the above technical problems, the technical solution used in the present invention are as follows: a kind of source VI measurement data acquisition is shown
Method, which is characterized in that suitable for being configured with the end PC of PCI_E high-speed interface card, the end PC passes through PCI_E high-speed interface card
It being connect with fpga chip, the fpga chip obtains the source the VI measurement data of hardware resource board by AD sample circuit, including
Following steps:
The data that AD sample circuit acquires are transmitted to the end PC by PCI_E high-speed interface card by step 1, fpga chip;
Step 2, the end PC process data into patterned way and are shown, and provide visualized operation mode and check for user
Analyze data.
Preferably, the end PC operation has the following three steps: the end PC rate-determining steps, PC end data step, the end PC are aobvious
Show step,
In step 1, the end PC executes the end PC rate-determining steps, sends notice and designated hardware resource board measures movement,
Fpga chip receives signal, and can control AD sample circuit according to received signal and carry out data collection task, and according to being connect
The data being stored in FPGA RAM are converted to electric signal and are transferred to the end PC by the collection of letters number;
In step 2, the end PC executes PC end data step, processes data into graphical;
Then, the end PC executes the end PC and shows step, graphics data is shown, and provide visualized operation mode for user
Check analysis data.
Preferably, in step 1 into step 3, PCI_E high-speed interface card by data the end PC and hardware bus end it
Between transmitted, fpga chip receive the signal from hardware bus end.
Preferably, the end PC, which executes, self determines whether to have passed through the acquisition of PCI_E interface card firmly in PC end data step
Part measurement data obtains hard ware measure data marquis execution step 2 when judgement has passed through PCI_E interface card.
Preferably, instructing and being obtained by PCI_E interface card specified according to automatic send of setting in PC end data step
Hardware resource board measurement data.
Preferably, the measurement data of the hardware resource board obtained in PC end data step saves as preset data knot
Structure.
Substantial effect of the invention is measurement data acquisition and display methods used in the present invention, can it is automatic and
AD sample circuit data are efficiently transmitted to the end PC, and is shown by patterned mode and is supplied to user.It can greatly reduce
The difficulty of complicated process and the data analysis of data acquisition.
Detailed description of the invention
Fig. 1 is that present invention progress tester hardware resource measurement, sampling and data are stored to the method flow of FPGA RAM
Figure;
Fig. 2 is the method flow diagram that the present invention is obtained measurement process data from FPGA RAM by the end PC and shown at the end PC.
Specific embodiment
Below by specific embodiment, and in conjunction with attached drawing, a specific embodiment of the invention is further described in detail.
A kind of end the source VI measurement data acquisition display methods (referring to attached drawing 1) PC software includes executing the end PC rate-determining steps
The end PC control module executes the PC end data module of PC end data step, executes the end the PC display module that the end PC shows step.
A kind of source VI measurement data acquisition display methods, which is characterized in that be suitable for being configured with PCI_E high-speed interface card
The end PC, the end PC connect by PCI_E high-speed interface card with fpga chip, and the fpga chip is obtained by AD sample circuit
Take the source the VI measurement data of hardware resource board, comprising the following steps:
The data that AD sample circuit acquires are transmitted to the end PC by PCI_E high-speed interface card by step 1, fpga chip;
Step 2, the end PC process data into patterned way and are shown, and provide visualized operation mode and check for user
Analyze data.The end PC operation has the following three steps: the end PC rate-determining steps, PC end data step, the end PC show step,
In step 1, the end PC executes the end PC rate-determining steps, sends notice and designated hardware resource board measures movement,
Fpga chip receives signal, and can control AD sample circuit according to received signal and carry out data collection task, and according to being connect
The data being stored in FPGA RAM are converted to electric signal and are transferred to the end PC by the collection of letters number;
In step 2, the end PC executes PC end data step, processes data into graphical;
Then, the end PC executes the end PC and shows step, graphics data is shown, and provide visualized operation mode for user
Check analysis data.
In step 1 into step 3, PCI_E high-speed interface card passes data between the end PC and hardware bus end
Defeated, fpga chip receives the signal from hardware bus end.
In PC end data step, the end PC, which executes, self determines whether to have passed through PCI_E interface card acquisition hard ware measure number
According to when judgement has passed through PCI_E interface card acquisition hard ware measure data marquis execution step 2.
In PC end data step, is instructed according to the automatic transmission of setting and designated hardware resource is obtained by PCI_E interface card
Board measurement data.
The measurement data of the hardware resource board obtained in PC end data step saves as preset data structure.
More specifically citing are as follows:
After the software starting first of the end PC, the control module that user can be applied by the end PC is sent to a certain particular hardware module
Measurement sampling instruction.
The instruction is transferred on hardware bus by PCI_E high speed signal card, and is controlled program by FPGA and received.Then
FPGA control program can control corresponding AD sampling A/D chip work, complete the data sampling work of specified quantity.
FPGA controls program after getting these sampled datas, can store data to fpga chip according to procedure stipulation
RAM in.So far data sampling process is completed.
The end PC obtains measurement process data from FPGA RAM and the software flow that is shown in display module is (referring to attached drawing
2), first after software starting, PC end data module can determine whether to get sampled data automatically.
If getting sampled data not yet, PC end data module can send acquisition data command, which passes through
PCI_E high speed signal card is transmitted on hardware bus, and is controlled program by FPGA and received.If having got sampled data,
It then jumps directly to the end PC and shows that step executes.
It receives after obtaining data command, FPGA control program can will be stored in the data in FPGA RAM, pass through PCI_E
High speed signal card passes to PC end data module.
After getting data, PC end data module can automatically update state, inform that user has obtained measurement of correlation mistake
Number of passes evidence.After user selects related data, graphical data can be displayed on the screen by the end PC display module according to assignment algorithm.
User can operate graphics data by the end PC display module, and the operation of support is analogous to hardware oscillography
Device has whole scaling, part is checked, translates, showing the functions such as data point, measurement data points.
User can carry out the operation of file preservation by the end PC display module to data, can also be direct to graphics data
It carries out picture and saves operation.
Measurement data acquisition and display methods used in the present invention, can be automatic and efficiently by AD sample circuit data
It is transmitted to the end PC, and is shown by patterned mode and is supplied to user.The complexity of data acquisition, and number can greatly be reduced
According to the difficulty of analysis.
Above-mentioned embodiment is only a preferred solution of the present invention, not the present invention is made in any form
Limitation, there are also other variations and modifications on the premise of not exceeding the technical scheme recorded in the claims.
Claims (6)
1. a kind of source VI measurement data acquisition display methods, which is characterized in that suitable for being configured with PCI_E high-speed interface card
The end PC, the end PC are connect by PCI_E high-speed interface card with fpga chip, and the fpga chip is obtained by AD sample circuit
The source the VI measurement data of hardware resource board, comprising the following steps:
The data that AD sample circuit acquires are transmitted to the end PC by PCI_E high-speed interface card by step 1, fpga chip;
Step 2, the end PC process data into patterned way and are shown, and provide visualized operation mode and check for user
Analyze data.
2. the source VI measurement data acquisition display methods according to claim 1, which is characterized in that
The end PC operation has the following three steps: the end PC rate-determining steps, PC end data step, the end PC show step,
In step 1, the end PC executes the end PC rate-determining steps, sends notice and designated hardware resource board measures movement,
Fpga chip receives signal, and can control AD sample circuit according to received signal and carry out data collection task, and according to being connect
The data being stored in FPGA RAM are converted to electric signal and are transferred to the end PC by the collection of letters number;
In step 2, the end PC executes PC end data step, processes data into graphical;
Then, the end PC executes the end PC and shows step, graphics data is shown, and provide visualized operation mode for user
Check analysis data.
3. the source VI measurement data acquisition display methods according to claim 2, which is characterized in that in step 1 to step 3
In, PCI_E high-speed interface card transmits data between the end PC and hardware bus end, and fpga chip receives total from hardware
The signal of line end.
4. the source VI measurement data acquisition display methods according to claim 2, which is characterized in that in PC end data step,
The end PC, which executes, self determines whether to have passed through PCI_E interface card acquisition hard ware measure data, when judgement has been connect by PCI_E
Mouth card obtains hard ware measure data marquis and executes step 2.
5. the source VI measurement data acquisition display methods according to claim 2, which is characterized in that in PC end data step,
It is instructed according to the automatic transmission of setting and designated hardware resource board measurement data is obtained by PCI_E interface card.
6. the source VI measurement data acquisition display methods according to claim 5, which is characterized in that obtained in PC end data step
The measurement data of the hardware resource board taken saves as preset data structure.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115144637A (en) * | 2022-09-02 | 2022-10-04 | 苏州联讯仪器有限公司 | Display method and related device of volt-ampere characteristic measurement data |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101937385A (en) * | 2010-08-30 | 2011-01-05 | 浪潮电子信息产业股份有限公司 | System for monitoring running state of RAID card |
CN102879732A (en) * | 2012-09-14 | 2013-01-16 | 记忆科技(深圳)有限公司 | Method and system for testing board card |
CN203149576U (en) * | 2013-01-11 | 2013-08-21 | 上海倍益酷电子科技有限公司 | Signal analyzer based on combination of FPGA (field programmable gate array) and computer |
CN103294836A (en) * | 2013-05-13 | 2013-09-11 | 西安电子科技大学 | PCIE (peripheral component interconnect express) based radar data acquisition displaying and controlling system and method thereof |
CN103353725A (en) * | 2013-03-19 | 2013-10-16 | 中国科学院声学研究所 | PCI interface protocol based array expandable data collection system realized by adopting FPGA (field programmable gate array) |
CN104408008A (en) * | 2014-11-27 | 2015-03-11 | 成都龙腾中远信息技术有限公司 | Multi-channel interference signal acquiring, processing and verifying method |
-
2019
- 2019-02-14 CN CN201910114607.5A patent/CN109975680A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101937385A (en) * | 2010-08-30 | 2011-01-05 | 浪潮电子信息产业股份有限公司 | System for monitoring running state of RAID card |
CN102879732A (en) * | 2012-09-14 | 2013-01-16 | 记忆科技(深圳)有限公司 | Method and system for testing board card |
CN203149576U (en) * | 2013-01-11 | 2013-08-21 | 上海倍益酷电子科技有限公司 | Signal analyzer based on combination of FPGA (field programmable gate array) and computer |
CN103353725A (en) * | 2013-03-19 | 2013-10-16 | 中国科学院声学研究所 | PCI interface protocol based array expandable data collection system realized by adopting FPGA (field programmable gate array) |
CN103294836A (en) * | 2013-05-13 | 2013-09-11 | 西安电子科技大学 | PCIE (peripheral component interconnect express) based radar data acquisition displaying and controlling system and method thereof |
CN104408008A (en) * | 2014-11-27 | 2015-03-11 | 成都龙腾中远信息技术有限公司 | Multi-channel interference signal acquiring, processing and verifying method |
Non-Patent Citations (4)
Title |
---|
张建忠: "《传感器与检测技术》", 31 August 2014, 北京邮电大学出版社 * |
张彪 等: ""基于PCIE接口的高速数据传输系统设计"", 《电子测量技术》 * |
朱伟杰 等: ""FPGA的双缓冲模式PCI_Express总线设计"", 《技术纵横》 * |
王伟 等: ""基于PCIe总线的超高速信号采集卡的设计"", 《电子设计工程》 * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115144637A (en) * | 2022-09-02 | 2022-10-04 | 苏州联讯仪器有限公司 | Display method and related device of volt-ampere characteristic measurement data |
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