CN109960468A - A kind of non-volatile memory cells method for deleting having authentication function and system - Google Patents

A kind of non-volatile memory cells method for deleting having authentication function and system Download PDF

Info

Publication number
CN109960468A
CN109960468A CN201910086120.0A CN201910086120A CN109960468A CN 109960468 A CN109960468 A CN 109960468A CN 201910086120 A CN201910086120 A CN 201910086120A CN 109960468 A CN109960468 A CN 109960468A
Authority
CN
China
Prior art keywords
flash memory
erasing
erasing operation
ssl
string
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201910086120.0A
Other languages
Chinese (zh)
Inventor
缪向水
闫鹏
童浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huazhong University of Science and Technology
Original Assignee
Huazhong University of Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huazhong University of Science and Technology filed Critical Huazhong University of Science and Technology
Priority to CN201910086120.0A priority Critical patent/CN109960468A/en
Publication of CN109960468A publication Critical patent/CN109960468A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0646Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
    • G06F3/0652Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)

Abstract

The invention discloses a kind of non-volatile memory cells method for deleting for having authentication function and systems, comprising: step S1. receives erasing operation instruction and address information;Step S2. initializes flash memory SSL value, erasing operation time numerical value and erasing voltage;Step S3. carries out whole erasing operation to selected block;Step S4. control flash memory SSL verifies the erasing result of flash memory string, if being proved to be successful, enters step S5, otherwise, enters step S6;Step S5. judges whether flash memory SSL value reaches maximum value, if so, the erasing operation for having authentication function is completed, terminates;Otherwise, flash memory SSL value adds 1, enters step S4, verifies to next flash memory string;Step S6. judges whether erasing operation number reaches maximum value, if so, flash memory SSL value adds 1, enters step S4, verifies to next flash memory string, until the flash memory string for selecting all in block was all verified;Otherwise, increase erasing operation time numerical value and increase erasing voltage, enter step S3, whole erasing operation is re-started to selected block.

Description

A kind of non-volatile memory cells method for deleting having authentication function and system
Technical field
The invention belongs to technical field of semiconductor memory, have the non-volatile of authentication function more particularly, to a kind of Storage unit method for deleting and system.
Background technique
Flash memory (Flash) can be divided into two class of nand flash memory and NOR flash memory as a kind of nonvolatile memory.NOR Each storage unit of flash memory is independently connect with bit line and wordline, therefore shows good random storage characteristic;Nand flash memory Multiple storage units be cascaded progress, thus show good Integrated Trait, be usually used in the reality of high density flash memory array It is existing.With the reduction of characteristic size, the flash array of planar structure will be in face of closing on unit crosstalk exacerbation, floating gate storage electronics The problems such as number is very few.In order to continue to improve storage density, the flash array of three-dimensional perpendicular stacked structure is developed.It is three-dimensional Vertical nand storage string is first public in 2001.
In the prior art, Miao Xiangshui et al. proposes a kind of non-volatile high density three dimensional semiconductor memory device and its preparation Method, as shown in Figure 1, the memory device includes the storage string array being made of the three dimensional NAND storage string of multiple vertical direction; Each three dimensional NAND storage string includes semiconductor regions and four layers of package structure around semiconductor regions;Semiconductor regions packet The source electrode and drain electrode for including channel and being connect respectively with channel both ends;Source electrode is linked with drain series;Channel is square column type structure; Four layers of package structure are followed successively by tunnel dielectric layer, charge storage layer, barrier dielectric layer and control grid electrode from the inside to surface; Obstructing dielectric layer has different thickness in different directions.Barrier dielectric in the same storage unit has inconsistent Thickness, and the different region of dielectric thickness is obstructed, write-in voltage is different, and amount of charge stored increases or subtracts with voltage increase is write Small, a storage unit can at least deposit two bits.
But flash array carry out in blocks when erasing operation, in order to efficiently and accurately complete to every The erasing of a unit needs to carry out verification operation, wipes halfway problem however, existing in existing scrub techniques.
Summary of the invention
In view of the drawbacks of the prior art, it is an object of the invention to solve the prior art to wipe halfway technical problem.
To achieve the above object, in a first aspect, having the non-volatile of authentication function the embodiment of the invention provides a kind of Storage unit method for deleting, method includes the following steps:
Step S1. receives erasing operation instruction and address information;
Step S2. initializes flash memory SSL value, erasing operation time numerical value and erasing voltage;
Step S3. carries out whole erasing operation to selected block;
Step S4. control flash memory SSL verifies the erasing result of flash memory string, if being proved to be successful, enters step S5, no Then, S6 is entered step;
Step S5. judges whether flash memory SSL value reaches maximum value, if so, the erasing operation for having authentication function is completed, knot Beam;Otherwise, flash memory SSL value adds 1, enters step S4, verifies to next flash memory string;
Step S6. judges whether erasing operation number reaches maximum value, if so, flash memory SSL value adds 1, enters step S4, right Next flash memory string is verified, until the flash memory string for selecting all in block was all verified;Otherwise, increase erasing operation number It is worth and increases erasing voltage, enter step S3, whole erasing operation is re-started to selected block.
Specifically, in step S4, different flash memory strings is gated by control flash memory SSL, and verify corresponding flash memory string State.
Specifically, the verifying is the threshold voltage by reading flash memory string, and whether judgment threshold voltage reaches minimum Value, if so, being proved to be successful;Otherwise, authentication failed.
Specifically, in step S6, increase erasing voltage by fixed step size, erasing voltage increment has with erasing operation number It closes.
To achieve the above object, second aspect has the non-volatile of authentication function the embodiment of the invention provides a kind of Storage unit erasing system, the system comprises: non-volatile memory cells and peripheral circuit, peripheral circuit include: erasing control Unit, detection control unit, counting control unit, data I/O, read/write circuit, driving voltage generator and address decoder processed;
After the erasing control unit is for the instruction of receiving host erasing operation, on the one hand control data information passes through described Data I/O is transmitted to the read/write circuit from memory, on the one hand controls the driving voltage generator and generates voltage drive signals;
The address decoder is used for the address information that receiving host provides, and under voltage drive signals driving, Address information is handled;
Read/write circuit information for receiving data, and under voltage drive signals driving, the data are believed Breath passes to the non-volatile memory cells, completes the erasing operation to selected block structure;
The detection control unit and the counting control unit are used for after the completion of erasing operation, control SSL pairs of flash memory The erasing result of flash memory string is verified in selected block.
Specifically, different flash memory strings is gated by control flash memory SSL, and verifies the state of corresponding flash memory string.
Specifically, the verifying is the threshold voltage by reading flash memory string, and whether judgment threshold voltage reaches minimum Value, if so, being proved to be successful;Otherwise, authentication failed.
Specifically, when the control flash memory SSL verifies the erasing result of flash memory string in selected block, if erasing operation Number reaches maximum, then illustrates that this flash memory string can not complete erasing under current impose a condition, flash memory SSL value adds 1, to next Flash memory string is verified, until the flash memory string for selecting all in block was all verified.
To achieve the above object, the third aspect, the embodiment of the invention provides the embodiment of the invention provides a kind of calculating Machine readable storage medium storing program for executing is stored with computer program on the computer readable storage medium, which is held by processor Non-volatile memory cells method for deleting described in above-mentioned first aspect is realized when row.
In general, through the invention it is contemplated above technical scheme is compared with the prior art, have below beneficial to effect Fruit:
The present invention is not thorough problem for erasing, introduces verification operation, by flash memory SSL to the erasing result of flash memory string into Row traversal verifying, by reading the threshold voltage of flash memory string, and whether judgment threshold voltage reaches minimum, if so, verifying Success;Otherwise, authentication failed makes the erasing success rate of the flash memory string of selected block reach maximum, it is ensured that verification operation covers entirely Gai Xingyu high efficiency.
Detailed description of the invention
Fig. 1 is non-volatile high density three dimensional semiconductor memory device structures schematic diagram in the prior art;
Fig. 2 is the block structure and line related connection schematic diagram of three-dimensional flash memory array provided in an embodiment of the present invention;
Fig. 3 is three-dimensional flash memory array periphery electrical block diagram provided in an embodiment of the present invention;
Fig. 4 is a kind of non-volatile memory cells method for deleting process for having authentication function provided in an embodiment of the present invention Figure.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and It is not used in the restriction present invention.
As shown in Fig. 2, CSL is common source polar curve in the block structure of three-dimensional flash memory array, GSL is ground connection selection line, Layer1~layer8 is 8 flash memory planes, and WL1~WL8 is corresponding 8 wordline of this 8 planes, flash memory SSL1~flash memory SSL3 is 3 string selection lines, and BL1~BL3 is 3 bit lines.Erasing behaviour is carried out by basic unit of block structure as shown in Figure 2 Make, traversal verifying is carried out to the erasing result of flash memory string by flash memory SSL (flash memory string selection line).It is dodged when being verified by control SSL is deposited to gate different flash memory strings.
As shown in figure 3, in addition to 3D flash array, other parts collectively form peripheral circuit.When carrying out erasing operation, erasing The erasing operation instruction that control unit receiving host provides, the address information that address decoder receiving host provides.Erasing control On the one hand unit controls data information and is transmitted to read/write circuit from memory by data I/O, on the one hand control driving voltage and generate Device generates voltage drive signals.Voltage drive signals are divided into two parts, and a part driving address decoder carries out address information Data information is transmitted to 3D flash array by processing, a part driving read/write circuit.Read/write circuit is finally completed to selected agllutination The erasing operation of structure.After the completion of all flash memory string erasing operations, then verified.Detection control unit and counting control unit according to It is secondary that different flash memory strings is gated by control flash memory SSL, and verify the state of different flash memory strings.Flash memory SSL is string selection line, Verifying is exactly to read the threshold voltage state of flash memory, and threshold voltage reaches minimum, illustrates that erasing thoroughly, is proved to be successful.If shape State is qualified, then wipes success;If state is unqualified, change the erasing operation that erasing voltage carries out block structure again, it is subsequent Continuous verifying.
As shown in figure 4, a kind of non-volatile memory cells method for deleting for having authentication function, this method include following step It is rapid:
Step S1. receives erasing operation instruction and address information;
Step S2. initializes flash memory SSL value, erasing operation time numerical value and erasing voltage;
Step S3. carries out whole erasing operation to selected block;
Step S4. control flash memory SSL verifies the erasing result of flash memory string, if being proved to be successful, enters step S5, no Then, S6 is entered step;
Step S5. judges whether flash memory SSL value reaches maximum value, if so, the erasing operation for having authentication function is completed, knot Beam;Otherwise, flash memory SSL value adds 1, enters step S4, verifies to next flash memory string;
Step S6. judges whether erasing operation number reaches maximum value, if so, flash memory SSL value adds 1, enters step S4, right Next flash memory string is verified, until the flash memory string for selecting all in block was all verified;Otherwise, increase erasing operation number It is worth and increases erasing voltage, enter step S3, whole erasing operation is re-started to selected block.
Different flash memory string progress result verifications is selected by changing flash memory SSL value.If erasing operation number reaches maximum, Then illustrate that this flash memory string can not complete erasing under current impose a condition.Flash memory SSL value adds 1, tests next flash memory string Card, until the flash memory string for selecting all in block was all verified.Read/write circuit, which is pressed, increases erasing voltage, erasing voltage to fixed step size Increment is related with erasing operation number.
The present invention can carry out initial erasing voltage, erasing voltage increment, flash memory SSL maximum value and maximum erasing times Setting, erasing operation total time-consuming of trading off and the thorough degree of erasing operation, obtain optimal case.
The erasing operation for having authentication function can be realized according to the method described above, make the erasing success rate of the flash memory string of selected block Reach maximum.It is worth noting that, the present invention can by make in verification process erasing times reach maximum value flash memory string address Deposit is got up, and carries out specific operation to these flash memory strings after convenient.
More than, the only preferable specific embodiment of the application, but the protection scope of the application is not limited thereto, and it is any Within the technical scope of the present application, any changes or substitutions that can be easily thought of by those familiar with the art, all answers Cover within the scope of protection of this application.Therefore, the protection scope of the application should be subject to the protection scope in claims.

Claims (9)

1. a kind of non-volatile memory cells method for deleting for having authentication function, which is characterized in that this method includes following step It is rapid:
Step S1. receives erasing operation instruction and address information;
Step S2. initializes flash memory SSL value, erasing operation time numerical value and erasing voltage;
Step S3. carries out whole erasing operation to selected block;
Step S4. control flash memory SSL verifies the erasing result of flash memory string, if being proved to be successful, enters step S5, otherwise, Enter step S6;
Step S5. judges whether flash memory SSL value reaches maximum value, if so, the erasing operation for having authentication function is completed, terminates; Otherwise, flash memory SSL value adds 1, enters step S4, verifies to next flash memory string;
Step S6. judges whether erasing operation number reaches maximum value, if so, flash memory SSL value adds 1, S4 is entered step, to next A flash memory string is verified, until the flash memory string for selecting all in block was all verified;Otherwise, increase erasing operation time numerical value simultaneously Increase erasing voltage, enters step S3, whole erasing operation is re-started to selected block.
2. non-volatile memory cells method for deleting as described in claim 1, which is characterized in that in step S4, pass through control Flash memory SSL gates different flash memory strings, and verifies the state of corresponding flash memory string.
3. non-volatile memory cells method for deleting as described in claim 1, which is characterized in that the verifying is to pass through reading The threshold voltage of flash memory string, and whether judgment threshold voltage reaches minimum, if so, being proved to be successful;Otherwise, authentication failed.
4. non-volatile memory cells method for deleting as described in claim 1, which is characterized in that in step S6, by given step Long to increase erasing voltage, erasing voltage increment is related with erasing operation number.
5. a kind of non-volatile memory cells erasing system for having authentication function, which is characterized in that the system comprises: it is non-easy The property lost storage unit and peripheral circuit, peripheral circuit include: erasing control unit, detection control unit, counting control unit, number According to I/O, read/write circuit, driving voltage generator and address decoder;
After the erasing operation instruction that the erasing control unit is provided for receiving host, on the one hand controls data information and pass through institute It states data I/O and is transmitted to the read/write circuit from memory, on the one hand control the driving voltage generator and generate voltage driving letter Number;
The address decoder is used for the address information that receiving host provides, and under voltage drive signals driving, over the ground Location information is handled;
Read/write circuit information for receiving data, and under voltage drive signals driving, the data information is passed To the non-volatile memory cells, the erasing operation to selected block structure is completed;
The detection control unit and the counting control unit are used for after the completion of erasing operation, and control flash memory SSL is to selected The erasing result of flash memory string is verified in block.
6. non-volatile memory cells erasing system as claimed in claim 5, which is characterized in that by control flash memory SSL come Different flash memory strings is gated, and verifies the state of corresponding flash memory string.
7. non-volatile memory cells erasing system as claimed in claim 5, which is characterized in that the verifying is to pass through reading The threshold voltage of flash memory string, and whether judgment threshold voltage reaches minimum, if so, being proved to be successful;Otherwise, authentication failed.
8. non-volatile memory cells erasing system as claimed in claim 5, which is characterized in that SSL pairs of flash memory of the control When the erasing result of flash memory string is verified in selected block, if erasing operation number reaches maximum, illustrate that this flash memory string can not Erasing is completed under current impose a condition, flash memory SSL value adds 1, verifies to next flash memory string, owns until in selected block Flash memory string be all verified.
9. a kind of computer readable storage medium, which is characterized in that be stored with computer on the computer readable storage medium Program realizes such as Claims 1-4 described in any item non-volatile memories lists when the computer program is executed by processor First method for deleting.
CN201910086120.0A 2019-01-29 2019-01-29 A kind of non-volatile memory cells method for deleting having authentication function and system Pending CN109960468A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910086120.0A CN109960468A (en) 2019-01-29 2019-01-29 A kind of non-volatile memory cells method for deleting having authentication function and system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910086120.0A CN109960468A (en) 2019-01-29 2019-01-29 A kind of non-volatile memory cells method for deleting having authentication function and system

Publications (1)

Publication Number Publication Date
CN109960468A true CN109960468A (en) 2019-07-02

Family

ID=67023520

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910086120.0A Pending CN109960468A (en) 2019-01-29 2019-01-29 A kind of non-volatile memory cells method for deleting having authentication function and system

Country Status (1)

Country Link
CN (1) CN109960468A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111782145A (en) * 2020-06-30 2020-10-16 深圳市芯天下技术有限公司 Answer-type or-type flash memory digital verification method, system, storage medium and terminal
CN114296652A (en) * 2021-12-29 2022-04-08 长江存储科技有限责任公司 Data erasing method, memory and memory system
CN116386703A (en) * 2023-03-15 2023-07-04 西南交通大学 Optimization method, device, equipment and medium of multi-stage NAND flash memory

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1945743A (en) * 2005-10-08 2007-04-11 晶豪科技股份有限公司 Erasing method for reducing erasing time and preventing over erasing
KR20100064005A (en) * 2008-12-04 2010-06-14 주식회사 하이닉스반도체 Method for erasing a flash memory device
CN102385919A (en) * 2010-08-26 2012-03-21 三星电子株式会社 nonvolatile memory device, operating method thereof and memory system including the same
CN102881329A (en) * 2011-07-12 2013-01-16 三星电子株式会社 Erase system and method of nonvolatile memory device
CN104008777A (en) * 2013-02-25 2014-08-27 北京兆易创新科技股份有限公司 Erasing method of nonvolatile memory, and apparatus thereof
KR20150087008A (en) * 2014-01-21 2015-07-29 삼성전자주식회사 Memory system including nonvolatile memory device and erase method thereof
CN106158034A (en) * 2016-07-06 2016-11-23 北京兆易创新科技股份有限公司 A kind of method for deleting of memory cell
CN107293325A (en) * 2016-04-11 2017-10-24 爱思开海力士有限公司 Storage device and its operating method

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1945743A (en) * 2005-10-08 2007-04-11 晶豪科技股份有限公司 Erasing method for reducing erasing time and preventing over erasing
KR20100064005A (en) * 2008-12-04 2010-06-14 주식회사 하이닉스반도체 Method for erasing a flash memory device
CN102385919A (en) * 2010-08-26 2012-03-21 三星电子株式会社 nonvolatile memory device, operating method thereof and memory system including the same
CN102881329A (en) * 2011-07-12 2013-01-16 三星电子株式会社 Erase system and method of nonvolatile memory device
CN104008777A (en) * 2013-02-25 2014-08-27 北京兆易创新科技股份有限公司 Erasing method of nonvolatile memory, and apparatus thereof
KR20150087008A (en) * 2014-01-21 2015-07-29 삼성전자주식회사 Memory system including nonvolatile memory device and erase method thereof
CN107293325A (en) * 2016-04-11 2017-10-24 爱思开海力士有限公司 Storage device and its operating method
CN106158034A (en) * 2016-07-06 2016-11-23 北京兆易创新科技股份有限公司 A kind of method for deleting of memory cell

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111782145A (en) * 2020-06-30 2020-10-16 深圳市芯天下技术有限公司 Answer-type or-type flash memory digital verification method, system, storage medium and terminal
CN114296652A (en) * 2021-12-29 2022-04-08 长江存储科技有限责任公司 Data erasing method, memory and memory system
CN114296652B (en) * 2021-12-29 2024-04-16 长江存储科技有限责任公司 Data erasing method, memory and memory system
CN116386703A (en) * 2023-03-15 2023-07-04 西南交通大学 Optimization method, device, equipment and medium of multi-stage NAND flash memory
CN116386703B (en) * 2023-03-15 2023-11-07 西南交通大学 Optimization method, device, equipment and medium of multi-stage NAND flash memory

Similar Documents

Publication Publication Date Title
KR102408858B1 (en) A nonvolatile memory device, a memory system including the same and a method of operating a nonvolatile memory device
CN102385919B (en) Nonvolatile semiconductor memory member, its operational approach and include its storage system
CN102385918B (en) Nonvolatile memory device, operating method thereof and memory system including the same
US9053794B2 (en) Nonvolatile memory device and related method of operation
CN105122372B (en) The selection of data for the redundant computation in three dimensional nonvolatile memory
CN103219040B (en) Nonvolatile semiconductor memory member and storage system and its programmed method and control method
KR102277652B1 (en) Memory device including a circuit for detecting word line defect and operating method of the memory device
KR101448169B1 (en) Tree dimentional memory device of multi-pln achitechure
CN105122215B (en) The adaptation operation of three-dimensional storage
KR102376505B1 (en) Detection of erase fail wordline in non-volatile memory device
CN109960468A (en) A kind of non-volatile memory cells method for deleting having authentication function and system
CN103050149A (en) Nonvalatile memory device and programming method and memory device system including the nonvalatile memory device
KR101325492B1 (en) Nand flash memory array having 3d star structure and operation method thereof
CN109817266A (en) Non-volatile memory device and its method for deleting
CN105938725A (en) Data storage device and method of driving the same
CN110265079A (en) The method of data in erasable nonvolatile memory device
TW201523625A (en) Bad block reconfiguration in nonvolatile memory
US11721655B2 (en) Memory device including memory chip and peripheral memory chip and method of manufacturing the memory device
CN107731252A (en) Non-volatile memory devices and the storage device for including it
CN109841254A (en) Non-volatile memory device and its programmed method
KR20200036653A (en) A memory device and a storage system using the same
CN109410999A (en) Nonvolatile memory device and the method for operating it
CN104916324A (en) Semiconductor device and programming method thereof
CN110047548A (en) Non-volatile memory device and wherein execute erasing operation method
US11823753B2 (en) Non-volatile memory device, programming method thereof, and storage device having the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
RJ01 Rejection of invention patent application after publication
RJ01 Rejection of invention patent application after publication

Application publication date: 20190702