CN109936347B - High-voltage compensation device of pulse modulator - Google Patents
High-voltage compensation device of pulse modulator Download PDFInfo
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Abstract
The invention discloses a pulse modulator high-voltage compensation device, which uses a high-voltage dividing probe to collect the voltage of a PFN pulse forming network and processes and monitors the voltage signal. After the charging of the charging power supply is completed, comparing the PFN voltage with the actual set voltage. If the PFN voltage is smaller than the actual set voltage, the charging power supply voltage is increased, the PFN voltage is guaranteed to be compensated, and PFN voltage stability is achieved.
Description
Technical Field
The invention relates to a device for compensating voltage stability of a pulse modulator, in particular to the field of the pulse modulator applied to the front end of an accelerator microwave power source.
Background
Combines the requirements of technical advancement, stability and reliability, spending budget and time schedule, and the klystron tube of the large-connection coherent light source adopts two types of E3730A and E3712 produced by Toshiba company. The pulse modulator is designed into a technical scheme of direct charging of high-voltage constant-current power supply current, capacitor energy storage, switch discharge of a hydrogen thyratron, PFN pulse formation and boost output of a pulse transformer, and can enable the microwave pulse amplitude stability of a klystron to reach 0.06% rms. The PEN charging power supply adopts a capacitor constant current charging power supply with the highest working voltage of 50 kV. In order to ensure that the stability of the microwave power amplitude is better than 0.06%, the output stability of the charging power supply is required to be better than 0.03%, and the design index of the large continuous coherent light source is that the large continuous coherent light source works at 50Hz. At the working frequency of 50Hz, the output stability of the charging power supply is required to be better than 0.03%, the charging current is adjustable, the power supply parameter is 50kV,1500mA, and at present, almost no product reaching the index exists in the world. Because the repetition frequency of the pulse modulator and the charging power supply is 50Hz, the charging power supply can hardly charge the PFN in the pulse modulator to a required value within 20ms, so that the microwave power output stability of the klystron is affected. Therefore, it is necessary to provide a pulse high voltage compensation stabilization device for improving the stability of the high voltage charging power supply and the output high voltage of the pulse modulator system at a repetition frequency of 50Hz.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, and provides a compensation device capable of improving the voltage stability of a pulse modulator, so as to meet the requirement of a free electronic laser device on the stability of a microwave power source.
The technical scheme of the invention is as follows: and acquiring the voltage of the PFN pulse forming network by using a high-voltage dividing probe, and processing and monitoring the voltage signal. After the charging of the charging power supply is completed, comparing the PFN voltage with the actual set voltage. If the PFN voltage is smaller than the actual set voltage, the charging power supply voltage is increased, the PFN voltage is guaranteed to be compensated, and PFN voltage stability is achieved.
A pulse modulator high voltage compensation apparatus comprising: the device comprises a voltage acquisition device, a voltage comparison device and a voltage compensation device;
the voltage acquisition device comprises a high-voltage dividing probe 5 and a signal acquisition device 6; the input end of the high-voltage dividing probe 5 is connected to the PFN4 and used for acquiring voltage signals of the PFN4, and the output end of the high-voltage dividing probe 5 is connected to the signal acquisition device 6 through a data transmission line;
the input end of the signal collector 6 is used for collecting a voltage signal output by the high-voltage dividing probe 5, the output end of the signal collector 6 is connected with the voltage comparison device, and the signal collector 6 converts an analog signal collected by the high-voltage dividing probe 5 into a digital signal;
the voltage comparison device comprises a signal demodulator 7 and a signal comparator 8; the input end of the signal demodulator 7 is connected with the output end of the signal collector 6, the output end of the signal demodulator 7 is connected with the signal comparator 8, and the signal demodulator 7 demodulates the digital signal converted by the signal collector 6 into a binary number value which can be compared by the signal comparator 8;
the signal comparator 8 is provided with three input ports, namely a readback voltage port 14, a set value acquisition port 15, a comparison starting port 16, an internal charging time port 17 and an error output port 18;
the readback voltage port 14 is connected with the output end of the signal demodulator 7, the set value acquisition port 15 reads the set value of the high-voltage charging power supply 3, the comparison starting port 16 is used for receiving a charging completion signal provided by the high-voltage charging power supply 3, and the error output port 18 is used for outputting an error signal to the voltage compensation device;
the voltage compensation device comprises a voltage compensation controller 9 and a charging power supply controller bottom layer circuit communication interface 19; the input end of the voltage compensation controller 9 is used for receiving an error signal output by an error output port 18 in the signal comparator 8, and the output end of the voltage compensation controller 9 is connected with a bottom layer circuit communication interface 19 of the charging power supply controller and is used for controlling the output voltage of the high-voltage charging power supply 3.
Preferably: the signal collector 6 is an ADC collecting card.
The invention has the following beneficial effects:
the invention monitors the high voltage of the PFN in the pulse high voltage modulator, compares the difference between the high voltage in the PFN and the set value of the high voltage charging power supply and feeds back, thereby playing a role in stabilizing the high voltage of the pulse modulator. Has remarkable effect on improving the output stability of the pulse modulator with the repetition frequency of 50Hz. The invention has the advantages of simple structure, clear principle, low realization cost and the like.
Drawings
FIG. 1 is a schematic block diagram of the present invention;
FIG. 2 is a schematic diagram of the structure of the present invention;
in the figure: 1. a klystron; 2. a pulse modulator; 3. a high voltage charging source; 4. PFN; 5. a high pressure partial pressure probe; 6. a signal collector; 7. a signal demodulator; 8. a signal comparator; 9. a voltage compensation controller; 10. a charging power supply controller; 11. a bottom layer circuit of the charging power supply controller; 12. a high voltage cable; 13. a charging power supply module; 14. a read-back voltage port; 15. a set value acquisition port; 16. comparing the start ports; 17. an internal charging time port; 18. an error output port; 19. and a bottom layer circuit communication interface of the charging power supply controller.
Detailed Description
The invention is described in detail below with reference to the drawings and examples.
As shown in fig. 1 and 2, the pulse modulator high voltage compensation apparatus includes: the device comprises a voltage acquisition device, a voltage comparison device and a voltage compensation device;
the voltage acquisition device comprises a high-voltage dividing probe 5 and a signal acquisition device 6; the input end of the high-voltage dividing probe 5 is connected to the PFN4 and used for acquiring voltage signals of the PFN4, and the output end of the high-voltage dividing probe 5 is connected to the signal acquisition device 6 through a data transmission line;
the input end of the signal collector 6 is used for collecting a voltage signal output by the high-voltage dividing probe 5, the output end of the signal collector 6 is connected with the voltage comparison device, and the signal collector 6 converts an analog signal collected by the high-voltage dividing probe 5 into a digital signal;
the voltage comparison device comprises a signal demodulator 7 and a signal comparator 8, and the functions of the signal demodulator and the signal comparator can be realized in the same FPGA; the input end of the signal demodulator 7 is connected with the output end of the signal collector 6, the output end of the signal demodulator 7 is connected with the signal comparator 8, and the signal demodulator 7 demodulates the digital signal converted by the signal collector 6 into a binary number value which can be compared by the signal comparator 8;
the signal comparator 8 is provided with three input ports, namely a readback voltage port 14, a set value acquisition port 15, a comparison starting port 16, an internal charging time port 17 and an error output port 18;
the read-back voltage port 14 is connected with the output end of the signal demodulator 7, the set value acquisition port 15 reads the set value of the high-voltage charging power supply 3, the comparison starting port 16 is used for receiving a charging completion signal provided by the high-voltage charging power supply 3, and the error output port 18 is used for outputting an error signal to the voltage compensation device;
the set point acquisition port 15 may select two connection modes: in the first mode, in a charging power supply controller 10 connected to a high-voltage charging power supply 3, a voltage set value is read from the charging power supply controller 10; a second mode, connected to the charging power supply controller bottom layer circuit 11, reads the voltage set value from the charging power supply bottom layer circuit 11; the two are dependent on whether the high-voltage charging power supply 3 completely opens the bottom layer circuit interface, and if so, the second use mode has better effect;
the comparison start port 16 should be connected to a charge completion signal interface in the bottom layer circuit 11 of the charge power supply controller, or the charge completion signal interface provided by the charge power supply controller 10, but since part of the high-voltage charge power supply 3 does not open the relevant interface of the bottom layer circuit 11, or there is no charge completion signal, the comparison start port 16 needs to be connected to the internal charge time port 17, so that the invention works normally;
an internal charging time port 17, which is used for connecting with the comparison start port 16 when the high-voltage charging power supply 3 does not open the relevant interface of the bottom layer circuit 11 or has no charging completion signal, so as to realize the function of replacing the charging completion signal;
the voltage compensation device comprises a voltage compensation controller 9 and a charging power supply controller bottom layer circuit communication interface 19; the input end of the voltage compensation controller 9 is used for receiving an error signal output by the error output port 18 in the signal comparator 8, and the output end of the voltage compensation controller 9 is connected with the bottom layer circuit communication interface 19 of the charging power supply controller and used for controlling the output voltage of the high-voltage charging power supply 3.
Wherein: the signal collector 6 is an ADC collecting card.
A method of high voltage compensation according to a pulse modulator, comprising the steps of:
the first step: when the pulse modulator 2 starts to charge, the compensation device receives a trigger signal and starts to work;
and a second step of: collecting a high-voltage signal of PNF4 by using a high-voltage partial pressure probe 5;
and a third step of: transmitting the PNF4 high-voltage signal acquired by the high-voltage dividing probe 5 to the signal acquisition device 6, and converting the PNF4 high-voltage analog signal into a digital signal by the signal acquisition device 6;
fourth step: demodulating the PNF4 high-voltage digital signal through a signal demodulator 7 to obtain a required voltage amplitude signal;
fifth step: after the trigger signal comes, the signal comparator 8 reads the set value of the high-voltage charging power supply 3 and stores the set value into a register, and the set value is not read before the next trigger pulse;
there are three methods for reading the set value:
(1) If the high-voltage charging power supply opens the circuit interface of the bottom layer of the controller, the circuit interface can be directly read from the bottom layer;
(2) If the interface is not opened, reading from the charging power supply controller;
(3) And gate circuits may also be used for simultaneous reading;
method 3 is preferred over methods 1 and 2, but methods 1 and 3 can be performed depending on whether the high voltage charging source provides the controller floor circuit interface.
Sixth step: when the high-voltage charging power supply 3 finishes charging the PNF4 in the pulse modulator 2, the high-voltage charging power supply 3 generates a charging completion signal;
this signal can be obtained in three ways:
(1) Directly reading the bottom layer circuit of the charging power supply controller;
(2) The charging power is given by an upper controller;
(3) After receiving the trigger signal, the signal comparator 8 generates an 18ms delay signal internally, and when the delay signal is over, an internal charging completion signal is output to the outside;
among the three methods, method 1 is optimal and method 3 is the worst, and the three methods are difficult to realize: method 3 is easiest and method 1 is most difficult to implement, depending on whether the high voltage charging source provides a corresponding signal or interface.
Seventh step: after receiving the charging completion signal, the signal comparator 8 starts to start, compares the set value of the high-voltage charging power supply 3 in the register with the PNF4 high-voltage amplitude signal obtained by demodulation to obtain a difference value of the set value and the PNF4 high-voltage amplitude signal, and transmits the difference value as an error signal to the voltage compensation controller 9;
eighth step: the pulse modulator 2 is subjected to voltage compensation through the voltage compensation controller 9, after the voltage compensation controller 9 obtains an error signal of the signal comparator 8, a command is transmitted to the bottom layer circuit communication interface 19 of the charging power supply controller, the set voltage of the high-voltage charging power supply is improved, and the value of the improved set voltage is equal to the current set voltage plus the error value;
ninth step: the high-voltage charging power supply 3 with the increased charging high-voltage value charges the PFN4 with additional charges, and the step 7 and the step 8 are repeated continuously to feed back the pulse modulator 2 when the pulse modulator 2 is highly compacted before the next trigger signal arrives, so that the error signal is finally 0, the pulse modulator 2 discharges, the high-voltage output of the pulse modulator 2 is a stable value, and the pulse modulator continues to enter the next working period.
The above embodiments are provided to illustrate the technical concept and features of the present invention and are intended to enable those skilled in the art to understand the content of the present invention and implement the same, and are not intended to limit the scope of the present invention. All equivalent changes or modifications made in accordance with the spirit of the present invention should be construed to be included in the scope of the present invention.
Claims (1)
1. The pulse modulator high-voltage compensation device is characterized in that: comprising the following steps: the device comprises a voltage acquisition device, a voltage comparison device and a voltage compensation device;
the voltage acquisition device comprises a high-voltage dividing probe (5) and a signal acquisition device (6); the input end of the high-voltage dividing probe (5) is connected to the PFN (4) and used for collecting voltage signals of the PFN (4), and the output end of the high-voltage dividing probe (5) is connected to the signal collector (6) through a data transmission line;
the input end of the signal collector (6) is used for collecting voltage signals output by the high-voltage dividing probe (5), the output end of the signal collector (6) is connected with the voltage comparison device, and the signal collector (6) is used for converting analog signals collected by the high-voltage dividing probe (5) into digital signals;
the voltage comparison device comprises a signal demodulator (7) and a signal comparator (8); the input end of the signal demodulator (7) is connected with the output end of the signal collector (6), the output end of the signal demodulator (7) is connected with the signal comparator (8), and the signal demodulator (7) demodulates the digital signal converted by the signal collector (6) into a binary number which can be compared by the signal comparator (8);
the signal comparator (8) is provided with three input ports, namely a readback voltage port (14), a set value acquisition port (15), a comparison starting port (16), an internal charging time port (17) and an error output port (18);
the readback voltage port (14) is connected with the output end of the signal demodulator (7), the set value acquisition port (15) reads the set value of the high-voltage charging power supply (3), the comparison starting port (16) is used for receiving a charging completion signal provided by the high-voltage charging power supply (3), and the error output port (18) is used for outputting an error signal to the voltage compensation device;
the voltage compensation device comprises a voltage compensation controller (9) and a charging power supply controller bottom layer circuit communication interface (19); the input end of the voltage compensation controller (9) is used for receiving an error signal output by an error output port (18) in the signal comparator (8), and the output end of the voltage compensation controller (9) is connected with a bottom layer circuit communication interface (19) of the charging power supply controller and is used for controlling the output voltage of the high-voltage charging power supply (3);
the signal collector (6) is an ADC collecting card;
the set value acquisition port (15) selects two connection modes: in the first mode, in a charging power supply controller (10) connected to a high-voltage charging power supply (3), a voltage set value is read from the charging power supply controller (10); in a second mode, the voltage setting value is read from the bottom layer circuit (11) of the charging power supply controller, and the voltage setting value is connected to the bottom layer circuit (11) of the charging power supply controller; if the high-voltage charging power supply (3) completely opens the bottom layer circuit interface, the second mode is used;
the comparison starting port (16) is connected to a charging completion signal interface in a bottom circuit (11) of the charging power supply controller, or a charging completion signal interface provided by the charging power supply controller (10); if part of the high-voltage charging power supply (3) does not open the related interface of the bottom circuit (11), or no charging completion signal is generated, connecting a comparison starting port (16) to an internal charging time port (17);
and the internal charging time port (17) is used for connecting the comparison starting port (16) when the high-voltage charging power supply (3) does not open the related interface of the bottom circuit (11) or does not have a charging completion signal, so as to realize the function of replacing the charging completion signal.
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| CN109936345A (en) * | 2017-12-18 | 2019-06-25 | 中国科学院大连化学物理研究所 | Pulse-modulator high-pressure compensating device and method |
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| CN104297553A (en) * | 2014-10-28 | 2015-01-21 | 矽力杰半导体技术(杭州)有限公司 | Output voltage detection circuit, control circuit and switch-type converter |
| CN105050308A (en) * | 2015-08-04 | 2015-11-11 | 北京无线电测量研究所 | Device and method for modulating hyper-stable high power pulse |
| CN207743948U (en) * | 2017-12-18 | 2018-08-17 | 中国科学院大连化学物理研究所 | Pulse-modulator high-pressure compensating device |
| CN109936345A (en) * | 2017-12-18 | 2019-06-25 | 中国科学院大连化学物理研究所 | Pulse-modulator high-pressure compensating device and method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US10548665B2 (en) * | 2016-02-29 | 2020-02-04 | Pulse Biosciences, Inc. | High-voltage analog circuit pulser with feedback control |
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| CN104297553A (en) * | 2014-10-28 | 2015-01-21 | 矽力杰半导体技术(杭州)有限公司 | Output voltage detection circuit, control circuit and switch-type converter |
| CN105050308A (en) * | 2015-08-04 | 2015-11-11 | 北京无线电测量研究所 | Device and method for modulating hyper-stable high power pulse |
| CN207743948U (en) * | 2017-12-18 | 2018-08-17 | 中国科学院大连化学物理研究所 | Pulse-modulator high-pressure compensating device |
| CN109936345A (en) * | 2017-12-18 | 2019-06-25 | 中国科学院大连化学物理研究所 | Pulse-modulator high-pressure compensating device and method |
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