The dynamically synchronized control circuit of satellite sailboard power array simulator
Technical field
The present invention relates to PWM dynamically synchronized control field, especially a kind of dynamically synchronized control circuit of satellite sailboard power array simulator.
Background technology
Satellite sailboard power array simulation system is based on unit module power supply, usually be made up of multiple stage satellite sailboard power array simulator, owing to also there is multiple switch converters in system, and each switch converters has the operating switch frequency of oneself, not only increase the design difficulty of the various key parameter of switch converters, and each switch converters has different electromagnetic interference frequency, the electromagnetic Compatibility Design of system also becomes very complicated.In addition, between multiple switch converters, there is mutual intermodulation distortion, produce low-frequency beats noise, make the electromagnetic interference problem of whole system become more serious.Therefore, must carry out accurate synchronous process between synchronised clock, accessory power supply, each unit of main converter, each intermodule of system realizes mutual Synchronization Control.
Based on above reason, at present in traditional switch power supply, the easy major-minor synchronous control technique of many employings, the resistor of a low resistance of namely connecting on the time capacitor of oscillating circuit, lock-out pulse is added on the ramp voltage of oscillator, to realize the synchronizing function of power supply.This control procedure is comparatively simple, and synchronizing signal is comparatively faint, and by the impact of synchronizing signal amplitude, locking range is less; And synchronizing signal is very easily interfered in transmitting procedure, signal easily produces time delay.If synchronizing signal is amplified, change the amplitude of oscillator ramp, easily cause the phase bit loss of voltage control and slope compensation circuit, the control precision of frequency is greatly reduced.Therefore, above-mentioned control mode is in the Synchronization Control of pwm signal, and response speed is low, and locking range is very little, and transmission range is near, cannot realize the Fast synchronization adjustment of each output voltage.Thus, also still there is certain low-frequency beats intermodulation distortion phenomenon between major-minor converter.
Summary of the invention
The object of the present invention is to provide a kind of strong interference immunity, greatly improve the dynamically synchronized control circuit of the satellite sailboard power array simulator of synchronous transmission of signal ability.
For achieving the above object, present invention employs following technical scheme: a kind of dynamically synchronized control circuit of satellite sailboard power array simulator, comprise the pulse shaper for receiving synchronous clock pulse voltage signal, its output is connected with the input of main pwm control circuit, the output of main pwm control circuit is connected with the input of waveform transformation match circuit, the output of waveform transformation match circuit is connected with the input of pulse dynamically synchronized control circuit, and the output of pulse dynamically synchronized control circuit is connected with the input of auxiliary pwm control circuit; The synchronised clock frequency of pulse dynamically synchronized control circuit is greater than the natural frequency of vibration, and the pulse duration that pulse dynamically synchronized control circuit exports is 5% of switch periods.
Described main pwm control circuit comprises main PWM controller U2, described pulse shaper comprises difference sending/receiving device U1, its input termination synchronous clock pulse voltage signal, its power supply termination+15V direct current, its output is connected with the 4th pin of main PWM controller U2; The positive power source terminal of difference sending/receiving device U1 is by electric capacity C14 ground connection; Resistance R1 and electric capacity C1 is in parallel, and after in parallel, one end connects the output of difference sending/receiving device U1, other end ground connection.
Described pulse dynamically synchronized control circuit comprises triode Q1, its base stage is connected with the output of waveform transformation match circuit, its collector electrode is connected with resistance R11, electric capacity C6 respectively, the other end ground connection of resistance R11, electric capacity C6 is connected with the 2nd pin of diode array V2, the 1st pin ground connection of diode array V2, the 3rd pin of diode array V2 is connected with the input of auxiliary pwm control circuit; The other end of described electric capacity C6 is connected with resistance R12, and resistance R12 and resistance R11 altogether; Resistance R10, electric capacity C5 are in parallel, and the emitter of a termination triode Q1 of parallel connected end, another termination+5V direct current.
Described auxiliary pwm control circuit comprises auxiliary PWM controller U3, its the 4th pin is connected with the output of pulse dynamically synchronized control circuit, in parallel and the parallel connected end of electric capacity C8, resistance R14 respectively with the 1st of auxiliary PWM controller U3,2 pins are connected, and connect the 3rd pin of auxiliary PWM controller U3 after resistance R16, electric capacity C10 parallel connection; 8 pin of auxiliary PWM controller U3 meet+5V direct current, electric capacity C19 and resistance R3 respectively, the other end ground connection of electric capacity C19, and the other end of resistance R3 is connected with 4 pin of auxiliary PWM controller U3, one end of electric capacity C3 respectively, the other end ground connection of electric capacity C3; 7 pin of auxiliary PWM controller U3 meet+15V direct current, electric capacity C16 respectively, the other end ground connection of electric capacity C16.
Described waveform transformation match circuit comprises operational amplifier U4, the 2nd of described main PWM controller U2, by electric capacity C17 ground connection after 16 pins are connected, resistance R13, electric capacity C7 is in parallel and parallel connected end is connected across the 1st of main PWM controller U2, on 3 pins, 5th pin of main PWM controller U2 is by resistance R2 ground connection, electric capacity C2, in parallel and the parallel connected end one end of C4 is connected with the 6th pin of main PWM controller U2, the other end is connected with the normal phase input end of operational amplifier U4 by resistance R5, 15 pin of main PWM controller U2 are by electric capacity C15 ground connection, 13 pin of main PWM controller U2 are by electric capacity C13 ground connection, resistance R17, in parallel and the parallel connected end of electric capacity C11 is connected with the 7th pin of main PWM controller U2, resistance R15, in parallel and the parallel connected end of electric capacity C9 is connected with the 9th pin of main PWM controller U2, the normal phase input end of operational amplifier U4 is successively by resistance R6, R8 ground connection, the inverting input of operational amplifier U4 is connected with its output by resistance R7, the output of operational amplifier U4 is connected with the input of pulse dynamically synchronized control circuit by resistance R9, and the positive power source terminal of operational amplifier U4 is by electric capacity C18 ground connection.
Described difference sending/receiving device U1 adopts 26LS31/32 chip, and described main PWM controller U2 adopts UC3825AN chip.
Described auxiliary PWM controller U3 adopts UC3843AN chip.
Described operational amplifier U4 adopts LT1013CN chip.
As shown from the above technical solution, the present invention utilizes unified synchronous clock pulse voltage signal, and is improved the antijamming capability of synchronous clock pulse voltage signal by pulsewidth shaping circuit, and signal transmission capabilities also strengthens greatly; Meanwhile, between each circuit module of native system, adopt shielded type cable as transmission line, avoid the faint synchronizing signal long range propagation problem of PWM.In addition, difference sending/receiving device U1 is adopted to realize the transmission of synchronization pulse, solve the relative time delay problem of output voltage settling time, effectively improve the locking range between each circuit of satellite sailboard power array simulator, significantly reduce a series of Switching Power Supply problems such as beat interference, electromagnetic compatibility, the transient state load capacity of system there has also been and improves significantly.
Accompanying drawing explanation
Fig. 1 is circuit block diagram of the present invention.
Fig. 2 is circuit theory diagrams of the present invention.
Embodiment
A kind of dynamically synchronized control circuit of satellite sailboard power array simulator, comprise the pulse shaper 1 for receiving synchronous clock pulse voltage signal, its output is connected with the input of main pwm control circuit 2, the output of main pwm control circuit 2 is connected with the input of waveform transformation match circuit 3, the output of waveform transformation match circuit 3 is connected with the input of pulse dynamically synchronized control circuit 4, the output of pulse dynamically synchronized control circuit 4 is connected with the input of auxiliary pwm control circuit 5, the synchronised clock frequency of pulse dynamically synchronized control circuit 4 is greater than the natural frequency of vibration, the pulse duration that pulse dynamically synchronized control circuit 4 exports is 5% of switch periods, as shown in Figure 1.Standard block synchronizing signal after shaping, through pulse shaper 1, is delivered to the clock pins of main pwm control circuit 2 by synchronous clock pulse voltage signal, locks the frequency of oscillation of main pwm control circuit 2; The triangular wave oscillation signal of locking is carried out signal transacting by waveform transformation match circuit 3, converts required square wave control signal to, solves the resistance matching problem of weak signal simultaneously; Pulse dynamically synchronized control circuit 4 amplifies this weak signal and after AC coupled process, realize the dynamic tracking of amplitude and frequency, deliver to the Rt/Ct vibration pin of auxiliary pwm control circuit 5, finally reach the object of the dynamically synchronized control function realizing main pwm control circuit 2, auxiliary pwm control circuit 5 and whole system.
As shown in Figure 2, described main pwm control circuit 2 comprises main PWM controller U2, and described pulse shaper 1 comprises difference sending/receiving device U1, its input termination synchronous clock pulse voltage signal, its power supply termination+15V direct current, its output is connected with the 4th pin of main PWM controller U2; The positive power source terminal of difference sending/receiving device U1 is by electric capacity C14 ground connection; Resistance R1 and electric capacity C1 is in parallel, and after in parallel, one end connects the output of difference sending/receiving device U1, other end ground connection.Described pulse dynamically synchronized control circuit 4 comprises triode Q1, its base stage is connected with the output of waveform transformation match circuit 3, its collector electrode is connected with resistance R11, electric capacity C6 respectively, the other end ground connection of resistance R11, electric capacity C6 is connected with the 2nd pin of diode array V2, the 1st pin ground connection of diode array V2, the 3rd pin of diode array V2 is connected with the input of auxiliary pwm control circuit 5; The other end of described electric capacity C6 is connected with resistance R12, and resistance R12 and resistance R11 altogether; Resistance R10, electric capacity C5 are in parallel, and the emitter of a termination triode Q1 of parallel connected end, another termination+5V direct current.Described difference sending/receiving device U1 adopts 26LS31/32 chip, and described main PWM controller U2 adopts UC3825AN chip.
As shown in Figure 2, described auxiliary pwm control circuit 5 comprises auxiliary PWM controller U3, its the 4th pin is connected with the output of pulse dynamically synchronized control circuit 4, electric capacity C8, in parallel and the parallel connected end of resistance R14 respectively with the 1st of auxiliary PWM controller U3, 2 pins are connected, resistance R16, the 3rd pin of auxiliary PWM controller U3 is connect after electric capacity C10 parallel connection, 8 pin of auxiliary PWM controller U3 connect+5V direct current respectively, electric capacity C19 and resistance R3, the other end ground connection of electric capacity C19, the other end of resistance R3 respectively with 4 pin of auxiliary PWM controller U3, one end of electric capacity C3 is connected, the other end ground connection of electric capacity C3, 7 pin of auxiliary PWM controller U3 meet+15V direct current, electric capacity C16 respectively, the other end ground connection of electric capacity C16.Described auxiliary PWM controller U3 adopts UC3843AN chip.Described waveform transformation match circuit 3 comprises operational amplifier U4, the 2nd of described main PWM controller U2, by electric capacity C17 ground connection after 16 pins are connected, resistance R13, electric capacity C7 is in parallel and parallel connected end is connected across the 1st of main PWM controller U2, on 3 pins, 5th pin of main PWM controller U2 is by resistance R2 ground connection, electric capacity C2, in parallel and the parallel connected end one end of C4 is connected with the 6th pin of main PWM controller U2, the other end is connected with the normal phase input end of operational amplifier U4 by resistance R5, 15 pin of main PWM controller U2 are by electric capacity C15 ground connection, 13 pin of main PWM controller U2 are by electric capacity C13 ground connection, resistance R17, in parallel and the parallel connected end of electric capacity C11 is connected with the 7th pin of main PWM controller U2, resistance R15, in parallel and the parallel connected end of electric capacity C9 is connected with the 9th pin of main PWM controller U2, the normal phase input end of operational amplifier U4 is successively by resistance R6, R8 ground connection, the inverting input of operational amplifier U4 is connected with its output by resistance R7, the output of operational amplifier U4 is connected with the input of pulse dynamically synchronized control circuit 4 by resistance R9, and the positive power source terminal of operational amplifier U4 is by electric capacity C18 ground connection.Described operational amplifier U4 adopts LT1013CN chip.
Below in conjunction with Fig. 1,2 the present invention is further illustrated.
Pulse shaper 1 adopts difference to send/receive mode, and its cumulative delay is only 1ns, and the pulse duration of synchronised clock is about 250ns, and the ratio that the time delay of difference sending/receiving device U1 accounts for pulse duration is only 0.4%, so negligible; Main PWM controller U2 control unit module operating frequency in the standby state; Auxiliary PWM controller U3 controls the operating state of accessory power supply; Operational amplifier U4 and triode Q1 completes the phase-locked adjustment of main PWM controller U2 to auxiliary PWM controller U3, by changing the charging current of oscillator ramp in auxiliary PWM controller U3, realizes the Synchronization Control of wide region.The pulse clock signal of main PWM controller U2 is after operational amplifier U4 shaping, and both stopped wave distortion problem, and further increased driving force again, therefore system cascade ability is strengthened further.
By introducing the synchronised clock after shaping, being controlled the charging of main PWM controller U2 time capacitor by synchronised clock, making the output of oscillating circuit follow external clock.By pulse shaper 1 set oscillating circuit can be synchronous frequency range, make the trailing edge of clock signal and the trailing edge that oscillator exports keep synchronous, realize and the Synchronization Control of external clock.Auxiliary PWM controller U3 synchronized oscillation controls then to have employed phase-locked link, the charging current of adjustment oscillator ramp, complete the precise synchronization of main PWM controller U2, auxiliary PWM controller U3, thus realize synchronised clock, Synchronization Control real-time between main PWM controller U2 and auxiliary PWM controller U3.
In the present invention, the self-oscillating frequency of main PWM controller U2 is 150kHz, and outer synchronised clock frequency must be greater than the natural frequency of vibration, therefore, selects clock synchronous scope to be 160kHz to 200kHz.Because the power of circuit is comparatively large, for guaranteeing to realize synchronously, there is particular/special requirement to the pulse duration of the outer burst frequency signal of power supply---the width of lock-out pulse is narrow, cannot realize reliable synchronization; And the width of lock-out pulse is excessive, control chip Dead Time can be caused to increase, cause converter regulation step-down.Therefore, the pulse duration choosing the output of outer synchronization control circuit in circuit is 5% of switch periods.In the present invention, the highest frequency of lock-out pulse is taken as 200kHz, and therefore the pulse duration of synchronised clock is taken as 250ns.
In the present invention, the maximum synchronism test value of the highest output frequency is 200kHz, and smallest synchronization test value is 160kHz, is demarcated as follows by circuit work frequency fc, by model machine circuit test data result in table 1:
As can be seen from Table 1, when not adding synchronised clock, the synchronization accuracy of main PWM controller U2, auxiliary PWM controller U3 is 0.39%, and circuit has higher master-slave synchronisation control ability; After adding outer synchronizing clock signals, can realize the inter-sync of 160kHz to 200kHz scope and control, the maximum departure of output frequency is 0.51%, illustrates that circuit has very wide locking range and good dynamically synchronized control function, reaches object of the present invention.
Table 1 test data
In sum, the present invention utilizes unified synchronous clock pulse voltage signal, and is improved the antijamming capability of synchronous clock pulse voltage signal by pulsewidth shaping circuit 1, and signal transmission capabilities also strengthens greatly; Meanwhile, between each circuit module of native system, adopt shielded type cable as transmission line, avoid the faint synchronizing signal long range propagation problem of PWM.In addition, difference sending/receiving device U1 is adopted to realize the transmission of synchronization pulse, solve the relative time delay problem of output voltage settling time, effectively improve the locking range between each circuit of satellite sailboard power array simulator, significantly reduce a series of Switching Power Supply problems such as beat interference, electromagnetic compatibility, the transient state load capacity of system there has also been and improves significantly.