CN109888068B

CN109888068B - Near ultraviolet light emitting diode epitaxial wafer and preparation method thereof

Info

Publication number: CN109888068B
Application number: CN201910061709.5A
Authority: CN
Inventors: 苏晨; 肖扬; 王慧; 蒋媛媛; 吕蒙普; 胡加辉; 李鹏
Original assignee: HC Semitek Zhejiang Co Ltd
Current assignee: HC Semitek Zhejiang Co Ltd
Priority date: 2019-01-23
Filing date: 2019-01-23
Publication date: 2020-04-14
Anticipated expiration: 2039-01-23
Also published as: CN109888068A

Abstract

The invention discloses a near ultraviolet light emitting diode epitaxial wafer and a preparation method thereof, belonging to the field of light emitting diodes. The epitaxial wafer includes: the multilayer quantum barrier structure comprises a substrate, and an AlN buffer layer, a non-doped AlGaN layer, an N-type doped AlGaN layer, a low-temperature stress release layer, a multi-quantum well layer, an electronic barrier layer, a P-type doped AlGaN layer and a P-type contact layer which are sequentially deposited on the substrate, wherein the multi-quantum well layer comprises a plurality of quantum well layers and a plurality of quantum barrier layers, the quantum well layers and the quantum barrier layers alternately grow in a laminated manner, and the quantum barrier layers comprise B_xAl_1‑xAn N sublayer, the quantum well layer comprising In_yGa_1‑yN sublayer, x is more than or equal to 0.13 and less than or equal to 0.15, and y is more than or equal to 0<0.1。

Description

Near ultraviolet light emitting diode epitaxial wafer and preparation method thereof

Technical Field

The invention relates to the field of light emitting diodes, in particular to a near ultraviolet light emitting diode epitaxial wafer and a preparation method thereof.

Background

An LED (Light Emitting Diode) generally includes an epitaxial wafer and an electrode prepared on the epitaxial wafer. For a near ultraviolet light emitting diode epitaxial wafer, the epitaxial wafer generally comprises: the semiconductor device comprises a substrate, and a buffer layer, an undoped AlGaN layer, an N-type AlGaN layer, an MQW (Multiple Quantum Well) layer, an electron blocking layer, a P-type AlGaN layer and a contact layer which are sequentially stacked on the substrate. When current is injected into the LED, electrons in an N-type region such as an N-type AlGaN layer and holes in a P-type region such as a P-type AlGaN layer enter the MQW active region and recombine, and visible light is emitted. The MQW layer is a periodic structure formed by alternately growing InGaN quantum wells and AlGaN quantum barriers.

In the process of implementing the invention, the inventor finds that the prior art has at least the following problems: although the electron blocking layer can block most of the electrons from leaking, due to the high number and moving speed of the electrons, more electrons still overflow from the MQW layer to the P-type AlGaN layer, which affects the recombination luminous efficiency of the carriers.

Disclosure of Invention

The embodiment of the invention provides a near ultraviolet light emitting diode epitaxial wafer and a preparation method thereof, which can better limit electrons from flowing into a P-type region and improve the composite luminous efficiency of carriers. The technical scheme is as follows:

in a first aspect, a near ultraviolet light emitting diode epitaxial wafer is provided, where the epitaxial wafer includes: the multilayer quantum barrier structure comprises a substrate, and an AlN buffer layer, a non-doped AlGaN layer, an N-type doped AlGaN layer, a low-temperature stress release layer, a multi-quantum well layer, an electronic barrier layer, a P-type doped AlGaN layer and a P-type contact layer which are sequentially deposited on the substrate, wherein the multi-quantum well layer comprises a plurality of quantum well layers and a plurality of quantum barrier layers, the quantum well layers and the quantum barrier layers alternately grow in a laminated manner, and the quantum barrier layers comprise B_xAl_1-xAn N sublayer, the quantum well layer comprising In_yGa_1-yN sublayer, x is more than or equal to 0.13 and less than or equal to 0.15, and y is more than or equal to 0<0.1。

Optionally, the quantum barrier layer further includes a first GaN sublayer, and in the same quantum barrier layer, the first GaN sublayer is larger than the B sublayer_xAl_1-xThe N sublayer is closer to the low-temperature stress release layer.

Optionally, the quantum barrier layer further includes a second GaN sublayer, and in the same quantum barrier layer, B is_xAl_1-xThe N sublayer is located between the first GaN sublayer and the second GaN sublayer, and the first GaN sublayer is closer to the low-temperature stress release layer than the second GaN sublayer.

Optionally, the first GaN sublayer is doped with Al, and a ratio of a molar concentration of Al to a molar concentration of Ga in the first GaN sublayer is 1.5 to 4.

Optionally, the thicknesses of the first GaN sublayer and the second GaN sublayer are the same, and B is_xAl_1-xThe thickness of the N sublayer is 1.5-2 times that of the first GaN sublayer.

Optionally, the thickness of the quantum well layer is 1-3 nm, and the thickness of the quantum barrier layer is 9-20 nm.

Optionally, the low-temperature stress release layer is a superlattice structure in which InGaN sublayers and third GaN sublayers alternately grow.

In a second aspect, a method for preparing a near ultraviolet light emitting diode epitaxial wafer is provided, the method comprising:

providing a substrate;

depositing an AlN buffer layer, a non-doped AlGaN layer, an N-type doped AlGaN layer, a low-temperature stress release layer, a multi-quantum well layer, an electronic barrier layer, a P-type doped AlGaN layer and a P-type contact layer on the substrate in sequence, wherein the multi-quantum well layer comprises a plurality of quantum well layers and a plurality of quantum barrier layers, the quantum well layers and the quantum barrier layers alternately grow, and the quantum barrier layers comprise B_xAl_1-xAn N sublayer, the quantum well layer comprising In_yGa_1-yN sublayer, x is more than or equal to 0.13 and less than or equal to 0.15, and y is more than or equal to 0<0.1。

Optionally, the growth temperature of the quantum well layer is 720-829 ℃, and the growth temperature of the quantum barrier layer is 850-959 ℃.

Optionally, the growth pressure of the quantum well layer and the quantum barrier layer is 100-500 Torr.

The technical scheme provided by the embodiment of the invention has the following beneficial effects: by using B_xAl_1-xN quantum barrier layer and In_yGa_1-yCompared with the traditional multiple quantum well layer, when x is more than or equal to 0.13 and less than or equal to 0.15, the valence band order of the multiple quantum well layer is-0.2 +/-0.3 eV and is close to 0, the conduction band order of the multiple quantum well layer is 2.1 +/-0.3 eV and is higher, and the energy band structure with the valence band order close to 0 and the conduction band order higher is realized; when the valence band offset is close to 0, the hole injection into the MQW layer is not blocked, and when the conduction band offset is higher, the hole injection is blockedKeep off electron and flow into P type district, when blockking the electron with the cooperation of electron barrier layer, can strengthen the effect of blockking of electron, can also improve the efficiency that the hole was injected to the space recombination probability in promotion electron and hole that can be better improves the internal quantum efficiency of device.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 and fig. 2 are flow charts of a method for preparing a near ultraviolet light emitting diode epitaxial wafer according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of a near ultraviolet light emitting diode epitaxial wafer according to an embodiment of the present invention;

fig. 4 and 5 are schematic structural views of a multiple quantum well layer provided by an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Fig. 1 illustrates a method for preparing a near ultraviolet light emitting diode epitaxial wafer according to an embodiment of the present invention. Referring to fig. 1, the process flow includes the following steps.

Step 101, providing a substrate.

And 102, sequentially depositing an AlN buffer layer, a non-doped AlGaN layer, an N-type doped AlGaN layer, a low-temperature stress release layer, a multi-quantum well layer, an electron blocking layer, a P-type doped AlGaN layer and a P-type contact layer on the substrate.

Wherein the multiple quantum well layer comprises multiple quantum well layers and multiple quantum barrier layers, the quantum well layers and the quantum barrier layers alternately grow, and the quantum barrier layers comprise B_xAl_1-xN sub-layer, quantum well layer including In_yGa_1-yN sublayer, x is more than or equal to 0.13 and less than or equal to 0.15，0≤y<0.1。

The embodiment of the invention adopts B_xAl_1-xN quantum barrier layer and In_yGa_1-yCompared with the traditional multiple quantum well layer, when x is more than or equal to 0.13 and less than or equal to 0.15, the valence band order of the multiple quantum well layer is-0.2 +/-0.3 eV and is close to 0, the conduction band order of the multiple quantum well layer is 2.1 +/-0.3 eV and is higher, and the energy band structure with the valence band order close to 0 and the conduction band order higher is realized; when the valence band order is close to 0, the hole injection multi-quantum well layer is not blocked, and when the conduction band order is higher, electrons are blocked from flowing into the P-type region, and when the conduction band order is matched with the electron blocking layer to block the electrons, the blocking effect of the electrons can be enhanced, and the hole injection efficiency can be improved, so that the space recombination probability of the electrons and the holes can be better improved, and the internal quantum efficiency of the device is improved.

Fig. 2 shows a method for preparing a near ultraviolet light emitting diode epitaxial wafer according to an embodiment of the present invention. Referring to fig. 2, the process flow includes the following steps.

Step 201, a substrate is provided.

Illustratively, the substrate may be a (0001) orientation sapphire substrate (Al)₂O₃)。

Step 202, placing the substrate on a substrate tray in a reaction chamber of an MOCVD (Metal-organic Chemical Vapor Deposition) equipment, heating the substrate tray and driving the substrate tray to rotate.

Illustratively, the substrate tray may be a graphite tray. As the substrate tray rotates, the substrate will rotate with the substrate tray.

Specifically, when the epitaxial material is grown by the MOCVD method, high-purity nitrogen and/or hydrogen can be used as a carrier gas, ammonia gas can be used as a nitrogen source, trimethyl gallium or trimethyl ethyl can be used as a gallium source, trimethyl indium can be used as an indium source, trimethyl aluminum can be used as an aluminum source, trimethyl boron can be used as a boron source, silane can be used as an N-type dopant, and magnesium diclocide can be used as a P-type dopant.

It should be noted that the temperature and pressure controlled in the growth process described below actually refer to the temperature and pressure in the reaction chamber of the MOCVD equipment.

Step 203, annealing the substrate.

When the MOCVD method is adopted to deposit the buffer layer, the annealing treatment mode comprises the following steps: the substrate is placed in a reaction cavity of MOCVD equipment, then annealing treatment is carried out for 10 minutes in a hydrogen atmosphere, the surface of the substrate is cleaned, the annealing temperature is between 1000 ℃ and 1100 ℃, the pressure is between 200torr and 500torr, and then nitridation treatment is carried out.

Step 204, depositing an AlN buffer layer on the substrate.

Growing the AlN buffer layer by using an MOCVD method, comprising the following steps of: firstly, the temperature in the reaction chamber of the MOCVD equipment is adjusted to 400-600 ℃, an AlN buffer layer with the thickness of 15-35 nm is grown, and the growth pressure interval is 200-600 Torr. Secondly, the buffer layer is annealed in situ at 1000-1200 ℃ for 5-10 minutes under 400-600 Torr.

Step 205, depositing an undoped AlGaN layer on the buffer layer.

Illustratively, the undoped AlGaN layer is grown at a temperature of 1000 ℃ to 1150 ℃, a thickness of 1 to 3 μm, and a growth pressure of 100Torr to 200 Torr.

And step 206, depositing an N-type doped AlGaN layer on the undoped AlGaN layer.

Illustratively, the thickness of the N-type doped AlGaN layer is 1-2 microns, the growth temperature is 1100-1150 ℃, the growth pressure is about 200Torr, and the Si doping concentration is 1 x 10¹⁸cm^-3～5×10¹⁹cm^-3In the meantime.

And step 207, depositing a low-temperature stress release layer on the N-type doped AlGaN layer.

Illustratively, the low-temperature stress relief layer is a superlattice structure in which InGaN sublayers and third GaN sublayers are alternately grown. The growth temperature is 800-900 ℃, and the growth pressure is 100-500 Torr. The thickness of the InGaN sublayer is 10-20 nm, and the thickness of the third GaN sublayer is 30-70 nm. The thickness of the low temperature stress release layer can be 100-300 nm.

And step 208, depositing a multi-quantum well layer on the low-temperature stress release layer.

The multiple quantum well layer comprises multiple quantum well layers and multiple quantum barrier layers, the quantum well layers and the quantum barrier layers alternately grow in a laminated mode, and the quantum barrier layers comprise B_xAl_1-xN sub-layer, quantum well layer including In_yGa_1-yN sublayer, x is more than or equal to 0.13 and less than or equal to 0.15, and y is more than or equal to 0<0.1。

Illustratively, the thickness of the quantum well layer is 1-3 nm, the thickness of the quantum barrier layer is 9-20 nm, and the number of the quantum well layer and the quantum barrier layer is 5-15. The quantum well layer and the quantum barrier layer may be the same or different in number, and the quantum well layer or the quantum barrier layer may be grown first. The growth temperature of the quantum well layer is 720-829 ℃, and the growth temperature of the quantum barrier layer is 850-959 ℃. The growth pressure of the quantum well layer and the quantum barrier layer is 100-500 Torr.

Table 1 shows the use of B_xAl_1-xMulti-quantum well layer of N quantum barrier layer and Al_1-aGa_aAnd the energy band parameters of the traditional multi-quantum well layer of the N quantum barrier layer are compared. Referring to table 1, compared with the valence band step of 0.5 ± 0.3eV and the conduction band step of 1.4 ± 0.3eV of the quantum barrier layer in the conventional multiple quantum well layer, when x is 0.13 or more and 0.15 or less, the valence band step of the quantum barrier layer in the multiple quantum well layer is-0.2 ± 0.3eV and is close to 0, the conduction band step of the quantum barrier layer in the multiple quantum well layer is 2.1 ± 0.3eV and is higher, and an energy band structure with the valence band step close to 0 and the conduction band step higher is realized. When the valence band order is close to 0, the hole injection multi-quantum well layer is not blocked, and when the conduction band order is higher, electrons are blocked from flowing into the P-type region, and when the conduction band order is matched with the electron blocking layer to block the electrons, the blocking effect of the electrons can be enhanced, and the hole injection efficiency can be improved, so that the space recombination probability of the electrons and the holes can be better improved, and the internal quantum efficiency of the device is improved.

TABLE 1

Illustratively, x is 0.13, 0.14, or 0.15.

In an alternative embodiment, in addition to B_xAl_1-xBesides the N sublayer, the quantum barrier layer also comprises a first GaN sublayer. Wherein, in the same quantum barrier layer, the first GaN sublayer is higher than B_xAl_1-xThe N sublayer is closer to the low temperature stress release layer.

Through the introduction of the first GaN sublayer, the quantum barrier layer is more matched with the crystal lattice of the InGaN quantum well layer on the crystal lattice, and the crystal quality is improved.

According to an alternative embodiment, in addition to B_xAl_1-xBesides the N sublayer and the first GaN sublayer, the quantum barrier layer further comprises a second GaN sublayer. Wherein in the same quantum barrier layer, B_xAl_1-xThe N sublayer is located between the first GaN sublayer and the second GaN sublayer, and the first GaN sublayer is closer to the low-temperature stress release layer than the second GaN sublayer.

Through the introduction of the second GaN sublayer, the InGaN quantum well layer clamped between the two quantum barrier layers is specifically clamped between the first GaN sublayer and the second GaN sublayer, and GaN is more matched with the crystal lattice of the InGaN quantum well layer on the crystal lattice, so that the crystal quality is further improved.

According to another alternative embodiment, the first GaN sublayer is doped with Al. Wherein, in the first GaN sub-layer, the ratio of the molar concentration of Al to the molar concentration of Ga is 1.5-4.

By doping Al in the first GaN sublayer, the barrier height of the first GaN sublayer is higher than that of pure GaN and lower than that of BALN, and the first GaN sublayer is closer to the low-temperature stress release layer, so that electrons in the N-type region firstly pass through the first GaN sublayer with higher barrier height, the migration rate of the electrons is slowed down, then the electrons pass through the BALN sublayer with higher barrier height, the electrons are less prone to pass through the BALN sublayer, and finally the electrons are limited in a quantum well adjacent to the quantum barrier layer, and the electron blocking effect is enhanced.

Illustratively, the thickness of the quantum barrier layer is 9-20 nm, the thicknesses of the first GaN sublayer and the second GaN sublayer are the same, and B_xAl_1-xThe thickness of the N sublayer is 1.5-2 times of that of the first GaN sublayer.

And step 209, depositing an electron barrier layer on the multi-quantum well layer.

The electron blocking layer may be an AlGaN electron blocking layer. Illustratively, when the electron blocking layer grows, the rotation speed of the substrate tray is 800-1000 rpm, the temperature of the reaction chamber is 900-1000 ℃, and the pressure of the reaction chamber is 20-200 torr. The thickness of the electron blocking layer is between 20nm and 100 nm.

Step 210, depositing a P-type doped AlGaN layer on the electron blocking layer.

Illustratively, the growth temperature of the P-type doped AlGaN layer is 950 ℃ to 1000 ℃, the growth pressure is 200torr, and the thickness of the P-type doped AlGaN layer can be 100nm to 300 nm.

Step 211, depositing a P-type contact layer on the P-type doped AlGaN layer.

Illustratively, the P-type contact layer is a GaN or InGaN layer with a thickness of 50nm to 100nm, a growth temperature range of 850 ℃ to 950 ℃, and a growth pressure range of 200Torr to 500 Torr.

Illustratively, after the growth of the P-type contact layer is finished, the temperature in a reaction cavity of the MOCVD equipment is reduced, annealing treatment is carried out in a nitrogen atmosphere, the annealing temperature range is 650-850 ℃, the annealing treatment is carried out for 5-15 minutes, and the temperature is reduced to room temperature, so that the epitaxial growth is finished.

Fig. 3 shows a near-ultraviolet light emitting diode epitaxial wafer according to an embodiment of the present invention. Referring to fig. 3, the near-ultraviolet light emitting diode epitaxial wafer includes: the solar cell comprises a substrate 1, and an AlN buffer layer 2, an undoped AlGaN layer 3, an N-type doped AlGaN layer 4, a low-temperature stress relief layer 5, a multi-quantum well layer 6, an electron blocking layer 7, a P-type doped AlGaN layer 8 and a P-type contact layer 9 which are sequentially deposited on the substrate 1. The multiple quantum well layer 6 includes a plurality of quantum well layers 61 and a plurality of quantum barrier layers 62. The quantum well layers 61 and the quantum barrier layers 62 are alternately grown in layers. The quantum barrier layer 62 includes B_xAl_1-xN sublayers 62 a. The quantum well layer 61 includes In_yGa_1-yN sublayer, x is more than or equal to 0.13 and less than or equal to 0.15, and y is more than or equal to 0<0.1。

By using B_xAl_1-xN quantum barrier layer and In_yGa_1-yWhen x is 0.13-0.15, the MQwell layer of the N quantum well layer is larger than that of the conventional MQwell layerThe valence band offset of the multi-quantum well layer is-0.2 +/-0.3 eV and close to 0, the conduction band offset of the multi-quantum well layer is 2.1 +/-0.3 eV and is higher, and an energy band structure with the valence band offset close to 0 and the conduction band offset higher is realized; when the valence band order is close to 0, the hole injection multi-quantum well layer is not blocked, and when the conduction band order is higher, electrons are blocked from flowing into the P-type region, and when the conduction band order is matched with the electron blocking layer to block the electrons, the blocking effect of the electrons can be enhanced, and the hole injection efficiency can be improved, so that the space recombination probability of the electrons and the holes can be better improved, and the internal quantum efficiency of the device is improved.

Illustratively, the method illustrated in fig. 1 or fig. 2 may be used to prepare the near-ultraviolet light emitting diode epitaxial wafer illustrated in fig. 3.

Illustratively, x is 0.13, 0.14, or 0.15.

Illustratively, referring to fig. 4, the quantum barrier layer 62 further includes a first GaN sublayer 62 b. In the same quantum barrier layer 62, the first GaN sub-layer 62B is larger than B_xAl_1-x The N sublayer 62a is closer to the low temperature stress relief layer 5.

Illustratively, referring to fig. 5, the quantum barrier layer 62 further includes a second GaN sublayer 62 c. In the same quantum barrier layer 62, B_xAl_1-x The N sublayer 62a is located between the first GaN sublayer 62b and the second GaN sublayer 62c, and the first GaN sublayer 62b is closer to the low temperature stress relief layer 5 than the second GaN sublayer 62 c.

Illustratively, the first GaN sublayer 62b is doped with Al; in the first GaN sub-layer 62b, the ratio of the molar concentration of Al to the molar concentration of Ga is 1.5 to 4.

Illustratively, the first GaN sub-layer 62B and the second GaN sub-layer 62c are the same thickness, B_xAl_1-xThe thickness of the N sublayer 62a is 1.5 to 2 times the thickness of the first GaN sublayer 62 b.

Illustratively, the thickness of the quantum well layer 61 is 1 to 3nm, and the thickness of the quantum barrier layer 62 is 9 to 20 nm.

Illustratively, the low-temperature stress relief layer 5 is a superlattice structure in which InGaN sublayers and third GaN sublayers are alternately grown.

Illustratively, the substrate 1 is a sapphire substrate; the AlN buffer layer 2 may have a thickness of 15 to 35 nm; the thickness of the undoped AlGaN layer 3 can be 1-3 mu m; the thickness of the N-type doped AlGaN layer 4 can be 1-2 μm; the thickness of the low-temperature stress release layer 5 can be 100-300 nm; the thickness of the electron blocking layer 7 can be 20-100 nm; the thickness of the high-temperature P-type AlGaN layer 8 can be 100nm to 300 nm; the P-type contact layer 9 may be a GaN or InGaN layer, and the thickness thereof may be 50-100 nm.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims

1. A near ultraviolet light emitting diode epitaxial wafer is characterized in that the epitaxial wafer comprises: the multilayer quantum barrier structure comprises a substrate, and an AlN buffer layer, a non-doped AlGaN layer, an N-type doped AlGaN layer, a low-temperature stress release layer, a multi-quantum well layer, an electronic barrier layer, a P-type doped AlGaN layer and a P-type contact layer which are sequentially deposited on the substrate, wherein the multi-quantum well layer comprises a plurality of quantum well layers and a plurality of quantum barrier layers, the quantum well layers and the quantum barrier layers alternately grow in a laminated manner, and the quantum barrier layers comprise B_xAl_1-xAn N sublayer, the quantum well layer comprising In_yGa_1-yN sublayer, x is more than or equal to 0.13 and less than or equal to 0.15, and y is more than or equal to 0<0.1。

2. The epitaxial wafer of claim 1, wherein the quantum barrier layer further comprises a first GaN sublayer, wherein the first GaN sublayer is larger than the B sublayer in the same quantum barrier layer_xAl_1-xThe N sublayer is closer to the low-temperature stress release layer.

3. The epitaxial wafer of claim 2, wherein the quantum barrier layer further comprises a second GaN sublayer, and in the same quantum barrier layer, B is_xAl_1-xThe N sublayer is located between the first GaN sublayer and the second GaN sublayer, and the first GaN sublayer is closer to the low-temperature stress release layer than the second GaN sublayer.

4. The epitaxial wafer of claim 3, wherein the first GaN sub-layer is doped with Al, and the ratio of the molar concentration of Al to the molar concentration of Ga in the first GaN sub-layer is 1.5-4.

5. The epitaxial wafer of claim 3, wherein the first GaN sublayer and the second GaN sublayer are of the same thickness, and B is_xAl_1-xThe thickness of the N sublayer is 1.5-2 times that of the first GaN sublayer.

6. The epitaxial wafer of any of claims 1-5, wherein the quantum well layer has a thickness of 1-3 nm and the quantum barrier layer has a thickness of 9-20 nm.

7. The epitaxial wafer according to any of claims 1 to 5, wherein the low temperature stress relief layer is a superlattice structure with InGaN sublayers and third GaN sublayers grown alternately.

8. A preparation method of a near ultraviolet light emitting diode epitaxial wafer is characterized by comprising the following steps:

providing a substrate;

9. The method of claim 8, wherein the growth temperature of the quantum well layer is 720-829 ℃ and the growth temperature of the quantum barrier layer is 850-959 ℃.

10. The method of claim 8, wherein the quantum well layer and the quantum barrier layer are grown at a pressure of 100to 500 Torr.